libpayload: Add x86_64 (64-bit) support
This patch introduces x86_64 (64-bit) support to the payload, building upon the existing x86 (32-bit) architecture. Files necessary for 64-bit compilation are now guarded by the `CONFIG_LP_ARCH_X86_64` Kconfig option. BUG=b:242829490 TEST=Able to verify all valid combinations between coreboot and payload with this patch. Payload Entry Point Behavior with below code. +----------------+--------------------+----------------------------+ | LP_ARCH_X86_64 | Payload Entry Mode | Description | +----------------+--------------------+----------------------------+ | No | 32-bit | Direct protected mode init | +----------------+--------------------+----------------------------+ | Yes | 32-bit | Protected to long mode | +----------------+--------------------+----------------------------+ | Yes | 64-bit | Long mode initialization | +----------------+--------------------+----------------------------+ Change-Id: I69fda47bedf1a14807b1515c4aed6e3a1d5b8585 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81968 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -15,6 +15,7 @@
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#include <exception.h>
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#include <gdb.h>
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#include <libpayload.h>
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#include <stddef.h>
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static const u8 type_to_signal[] = {
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[EXC_DE] = GDB_SIGFPE,
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@ -53,12 +54,15 @@ void gdb_arch_init(void)
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void gdb_arch_enter(void)
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{
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u32 *esp;
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asm volatile ("mov %%esp, %0" : "=r"(esp) );
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u8 *stack_pointer;
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#if CONFIG(LP_ARCH_X86_64)
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asm volatile ("movq %%rsp, %0" : "=r"(stack_pointer));
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#else
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asm volatile ("mov %%esp, %0" : "=r"(stack_pointer));
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#endif
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/* Avoid reentrant exceptions, just call the hook if in one already. */
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if (esp >= exception_stack && esp <= exception_stack_end)
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if (stack_pointer >= exception_stack && stack_pointer <= exception_stack_end)
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gdb_exception_hook(EXC_BP);
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else
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asm volatile ("int3");
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@ -66,12 +70,12 @@ void gdb_arch_enter(void)
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int gdb_arch_set_single_step(int on)
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{
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const u32 tf_bit = 1 << 8;
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const size_t tf_bit = 1 << 8;
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if (on)
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exception_state->regs.eflags |= tf_bit;
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exception_state->regs.reg_flags |= tf_bit;
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else
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exception_state->regs.eflags &= ~tf_bit;
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exception_state->regs.reg_flags &= ~tf_bit;
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return 0;
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}
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