libpayload: Add x86_64 (64-bit) support
This patch introduces x86_64 (64-bit) support to the payload, building upon the existing x86 (32-bit) architecture. Files necessary for 64-bit compilation are now guarded by the `CONFIG_LP_ARCH_X86_64` Kconfig option. BUG=b:242829490 TEST=Able to verify all valid combinations between coreboot and payload with this patch. Payload Entry Point Behavior with below code. +----------------+--------------------+----------------------------+ | LP_ARCH_X86_64 | Payload Entry Mode | Description | +----------------+--------------------+----------------------------+ | No | 32-bit | Direct protected mode init | +----------------+--------------------+----------------------------+ | Yes | 32-bit | Protected to long mode | +----------------+--------------------+----------------------------+ | Yes | 64-bit | Long mode initialization | +----------------+--------------------+----------------------------+ Change-Id: I69fda47bedf1a14807b1515c4aed6e3a1d5b8585 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81968 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik
@@ -106,17 +106,22 @@ menu "Architecture Options"
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choice
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prompt "Target Architecture"
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default ARCH_X86
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default ARCH_X86_32
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config ARCH_ARM
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bool "ARM"
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help
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Support the ARM architecture
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config ARCH_X86
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bool "x86"
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config ARCH_X86_32
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bool "x86_32"
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help
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Support the x86 architecture
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Support the x86_32 architecture
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config ARCH_X86_64
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bool "x86_64"
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help
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Support the x86_64 architecture
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config ARCH_ARM64
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bool "ARM64"
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@@ -133,6 +138,12 @@ config ARCH_MOCK
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endchoice
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config ARCH_X86
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bool
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default y if ARCH_X86_32 || ARCH_X86_64
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help
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Support the x86 architecture
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config MULTIBOOT
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bool "Multiboot header support"
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depends on ARCH_X86
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@@ -118,7 +118,8 @@ ARCH-y := $(ARCHDIR-y)
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# override here.
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ARCH-$(CONFIG_LP_ARCH_ARM) := arm
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ARCH-$(CONFIG_LP_ARCH_ARM64) := arm64
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ARCH-$(CONFIG_LP_ARCH_X86) := x86_32
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ARCH-$(CONFIG_LP_ARCH_X86_32) := x86_32
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ARCH-$(CONFIG_LP_ARCH_X86_64) := x86_64
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ARCH-$(CONFIG_LP_ARCH_MOCK) := mock
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# Five cases where we don't need fully populated $(obj) lists:
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@@ -96,7 +96,7 @@ $(obj)/libpayload-config.h: $(KCONFIG_AUTOHEADER) $(obj)/libpayload.config
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cmp $@ $< 2>/dev/null || cp $< $@
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library-targets = $(addsuffix .a,$(addprefix $(obj)/,$(libraries))) $(obj)/libpayload.a
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lib: $$(library-targets)
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lib: $$(library-targets) $(obj)/libpayload.ldscript
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extract_nth=$(word $(1), $(subst |, ,$(2)))
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@@ -115,11 +115,15 @@ $(obj)/%.a: $$(%-objs)
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printf " AR $(subst $(CURDIR)/,,$(@))\n"
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printf "create $@\n$(foreach objc,$(filter-out %.a,$^),addmod $(objc)\n)$(foreach lib,$(filter %.a,$^),addlib $(lib)\n)save\nend\n" | $(AR) -M
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$(obj)/libpayload.ldscript: arch/$(ARCHDIR-y)/libpayload.ldscript
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@printf " LDSCRIPT $@\n"
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$(CC) $(CFLAGS) $(EXTRA_CFLAGS) -E -P -x assembler-with-cpp -undef -o $@ $<
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install: real-target
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printf " INSTALL $(DESTDIR)/libpayload/lib\n"
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install -m 755 -d $(DESTDIR)/libpayload/lib
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install -m 644 $(library-targets) $(DESTDIR)/libpayload/lib/
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install -m 644 arch/$(ARCHDIR-y)/libpayload.ldscript $(DESTDIR)/libpayload/lib/
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install -m 644 $(obj)/libpayload.ldscript $(DESTDIR)/libpayload/lib/
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install -m 755 -d $(DESTDIR)/libpayload/lib/$(ARCHDIR-y)
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printf " INSTALL $(DESTDIR)/libpayload/include\n"
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install -m 755 -d $(DESTDIR)/libpayload/include
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@@ -27,16 +27,26 @@
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##
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ifneq ($(CONFIG_LP_COMPILER_LLVM_CLANG),y)
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ifeq ($(CONFIG_LP_ARCH_X86_64),y)
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CFLAGS += -mpreferred-stack-boundary=4
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else
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CFLAGS += -mpreferred-stack-boundary=2
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endif
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endif
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libc-y += head.S
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libc-$(CONFIG_LP_ARCH_X86_32) += head.S
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libc-$(CONFIG_LP_ARCH_X86_64) += head_64.S
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libc-$(CONFIG_LP_ARCH_X86_64) += pt.S
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libc-y += main.c sysinfo.c
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libc-y += timer.c coreboot.c util.S
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libc-y += exec.S virtual.c
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libc-y += virtual.c
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libc-y += selfboot.c cache.c
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libc-y += exception_asm.S exception.c
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libc-y += exception.c
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libc-y += delay.c
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libc-$(CONFIG_LP_ARCH_X86_32) += exec.c
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libc-$(CONFIG_LP_ARCH_X86_32) += exec.S
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libc-$(CONFIG_LP_ARCH_X86_32) += exception_asm.S
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libc-$(CONFIG_LP_ARCH_X86_64) += exception_asm_64.S
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# Will fall back to default_memXXX() in libc/memory.c if GPL not allowed.
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libc-$(CONFIG_LP_GPL) += string.c
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@@ -34,7 +34,13 @@
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#define IF_FLAG (1 << 9)
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u32 exception_stack[0x400] __attribute__((aligned(8)));
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#if CONFIG(LP_ARCH_X86_64)
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#define REGISTER_FMT "0x%016zx"
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#else
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#define REGISTER_FMT "0x%08zx"
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#endif
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u8 exception_stack[0x400] __aligned(16);
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static interrupt_handler handlers[256];
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@@ -143,17 +149,27 @@ static void dump_exception_state(void)
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break;
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}
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printf("\n");
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printf("EIP: 0x%08x\n", exception_state->regs.eip);
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printf("REG_IP: " REGISTER_FMT "\n", exception_state->regs.reg_ip);
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printf("REG_FLAGS: " REGISTER_FMT "\n", exception_state->regs.reg_flags);
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printf("REG_AX: " REGISTER_FMT "\n", exception_state->regs.reg_ax);
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printf("REG_BX: " REGISTER_FMT "\n", exception_state->regs.reg_bx);
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printf("REG_CX: " REGISTER_FMT "\n", exception_state->regs.reg_cx);
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printf("REG_DX: " REGISTER_FMT "\n", exception_state->regs.reg_dx);
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printf("REG_SP: " REGISTER_FMT "\n", exception_state->regs.reg_sp);
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printf("REG_BP: " REGISTER_FMT "\n", exception_state->regs.reg_bp);
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printf("REG_SI: " REGISTER_FMT "\n", exception_state->regs.reg_si);
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printf("REG_DI: " REGISTER_FMT "\n", exception_state->regs.reg_di);
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#if CONFIG(LP_ARCH_X86_64)
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printf("REG_R8: 0x%016zx\n", exception_state->regs.reg_r8);
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printf("REG_R9: 0x%016zx\n", exception_state->regs.reg_r9);
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printf("REG_R10: 0x%016zx\n", exception_state->regs.reg_r10);
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printf("REG_R11: 0x%016zx\n", exception_state->regs.reg_r11);
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printf("REG_R12: 0x%016zx\n", exception_state->regs.reg_r12);
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printf("REG_R13: 0x%016zx\n", exception_state->regs.reg_r13);
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printf("REG_R14: 0x%016zx\n", exception_state->regs.reg_r14);
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printf("REG_R15: 0x%016zx\n", exception_state->regs.reg_r15);
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#endif
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printf("CS: 0x%04x\n", exception_state->regs.cs);
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printf("EFLAGS: 0x%08x\n", exception_state->regs.eflags);
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printf("EAX: 0x%08x\n", exception_state->regs.eax);
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printf("ECX: 0x%08x\n", exception_state->regs.ecx);
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printf("EDX: 0x%08x\n", exception_state->regs.edx);
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printf("EBX: 0x%08x\n", exception_state->regs.ebx);
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printf("ESP: 0x%08x\n", exception_state->regs.esp);
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printf("EBP: 0x%08x\n", exception_state->regs.ebp);
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printf("ESI: 0x%08x\n", exception_state->regs.esi);
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printf("EDI: 0x%08x\n", exception_state->regs.edi);
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printf("DS: 0x%04x\n", exception_state->regs.ds);
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printf("ES: 0x%04x\n", exception_state->regs.es);
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printf("SS: 0x%04x\n", exception_state->regs.ss);
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@@ -164,7 +180,7 @@ static void dump_exception_state(void)
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void exception_dispatch(void)
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{
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die_if(exception_state->vector >= ARRAY_SIZE(handlers),
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"Invalid vector %u\n", exception_state->vector);
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"Invalid vector %zu\n", exception_state->vector);
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u8 vec = exception_state->vector;
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@@ -184,7 +200,7 @@ void exception_dispatch(void)
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vec);
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dump_exception_state();
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dump_stack(exception_state->regs.esp, 512);
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dump_stack(exception_state->regs.reg_sp, 512);
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/* We don't call apic_eoi because we don't want to ack the interrupt and
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allow another interrupt to wake the processor. */
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halt();
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@@ -197,6 +213,10 @@ success:
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void exception_init(void)
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{
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/* TODO: Add exception init code for x64, currently only supporting 32-bit code */
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if (CONFIG(LP_ARCH_X86_64))
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return;
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exception_stack_end = exception_stack + ARRAY_SIZE(exception_stack);
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exception_init_asm();
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}
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@@ -206,6 +226,17 @@ void set_interrupt_handler(u8 vector, interrupt_handler handler)
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handlers[vector] = handler;
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}
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#if CONFIG(LP_ARCH_X86_64)
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static uint64_t eflags(void)
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{
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uint64_t eflags;
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asm volatile(
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"pushfq\n\t"
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"popq %0\n\t"
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: "=rm" (eflags));
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return eflags;
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}
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#else
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static uint32_t eflags(void)
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{
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uint32_t eflags;
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@@ -215,6 +246,7 @@ static uint32_t eflags(void)
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: "=rm" (eflags));
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return eflags;
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}
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#endif
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void enable_interrupts(void)
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{
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221
payloads/libpayload/arch/x86/exception_asm_64.S
Normal file
221
payloads/libpayload/arch/x86/exception_asm_64.S
Normal file
@@ -0,0 +1,221 @@
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/*
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*
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* Copyright 2024 Google Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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.align 16
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.global exception_stack_end
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exception_stack_end:
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.quad 0
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.global exception_state
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exception_state:
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.quad 0
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/* Some temporary variables which are used while saving exception state. */
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vector:
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.quad 0
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error_code:
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.quad 0
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old_rsp:
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.quad 0
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old_rax:
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.quad 0
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.align 16
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/*
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* Each exception vector has a small stub associated with it which sets aside
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* the error code, if any, records which vector we entered from, and calls
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* the common exception entry point. Some exceptions have error codes and some
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* don't, so we have a macro for each type.
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*/
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.macro stub num
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exception_stub_\num:
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movq $0, error_code
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movq $\num, vector
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jmp exception_common
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.endm
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.macro stub_err num
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exception_stub_\num:
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pop error_code
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movq $\num, vector
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jmp exception_common
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.endm
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.altmacro
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.macro user_defined_stubs from, to
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stub \from
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.if \to-\from
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user_defined_stubs %(from+1),\to
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.endif
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.endm
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stub 0
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stub 1
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stub 2
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stub 3
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stub 4
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stub 5
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stub 6
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stub 7
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stub_err 8
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stub 9
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stub_err 10
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stub_err 11
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stub_err 12
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stub_err 13
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stub_err 14
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stub 15
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stub 16
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stub_err 17
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stub 18
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stub 19
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stub 20
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stub 21
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stub 22
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stub 23
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stub 24
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stub 25
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stub 26
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stub 27
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stub 28
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stub 29
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stub_err 30
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stub 31
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/* Split the macro so we avoid a stack overflow. */
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user_defined_stubs 32, 63
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user_defined_stubs 64, 127
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user_defined_stubs 128, 191
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user_defined_stubs 192, 255
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exception_common:
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/* Return from the exception. */
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iretl
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/*
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* We need segment selectors for the IDT, so we need to know where things are
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* in the GDT. We set one up here which is pretty standard and largely copied
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* from coreboot.
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*/
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.align 16
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gdt:
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/* selgdt 0, unused */
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.word 0x0000, 0x0000
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.byte 0x00, 0x00, 0x00, 0x00
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/* selgdt 8, unused */
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.word 0x0000, 0x0000
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.byte 0x00, 0x00, 0x00, 0x00
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/* selgdt 0x10, flat 4GB code segment */
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.word 0xffff, 0x0000
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.byte 0x00, 0x9b, 0xcf, 0x00
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/* selgdt 0x18, flat 4GB data segment */
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.word 0xffff, 0x0000
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.byte 0x00, 0x92, 0xcf, 0x00
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/* selgdt 0x20, flat x64 code segment */
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.word 0xffff, 0x0000
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.byte 0x00, 0x9b, 0xaf, 0x00
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gdt_end:
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/* GDT pointer for use with lgdt */
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.global gdt_ptr
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gdt_ptr:
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.word gdt_end - gdt - 1
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.quad gdt
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/*
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* Record the target and construct the actual entry at init time. This
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* is necessary because the linker doesn't want to construct the entry
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* for us.
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*/
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.macro interrupt_gate target
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.quad \target
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.quad \target
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.endm
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.altmacro
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.macro user_defined_gates from, to
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interrupt_gate exception_stub_\from
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.if \to-\from
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user_defined_gates %(from+1),\to
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.endif
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||||
.endm
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.align 16
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.global idt
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idt:
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interrupt_gate exception_stub_0
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interrupt_gate exception_stub_1
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interrupt_gate exception_stub_2
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interrupt_gate exception_stub_3
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interrupt_gate exception_stub_4
|
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interrupt_gate exception_stub_5
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interrupt_gate exception_stub_6
|
||||
interrupt_gate exception_stub_7
|
||||
interrupt_gate exception_stub_8
|
||||
interrupt_gate exception_stub_9
|
||||
interrupt_gate exception_stub_10
|
||||
interrupt_gate exception_stub_11
|
||||
interrupt_gate exception_stub_12
|
||||
interrupt_gate exception_stub_13
|
||||
interrupt_gate exception_stub_14
|
||||
interrupt_gate exception_stub_15
|
||||
interrupt_gate exception_stub_16
|
||||
interrupt_gate exception_stub_17
|
||||
interrupt_gate exception_stub_18
|
||||
interrupt_gate exception_stub_19
|
||||
interrupt_gate exception_stub_20
|
||||
interrupt_gate exception_stub_21
|
||||
interrupt_gate exception_stub_22
|
||||
interrupt_gate exception_stub_23
|
||||
interrupt_gate exception_stub_24
|
||||
interrupt_gate exception_stub_25
|
||||
interrupt_gate exception_stub_26
|
||||
interrupt_gate exception_stub_27
|
||||
interrupt_gate exception_stub_28
|
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interrupt_gate exception_stub_29
|
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interrupt_gate exception_stub_30
|
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interrupt_gate exception_stub_31
|
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user_defined_gates 32, 63
|
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user_defined_gates 64, 127
|
||||
user_defined_gates 128, 191
|
||||
user_defined_gates 192, 255
|
||||
idt_end:
|
||||
|
||||
/* IDT pointer for use with lidt */
|
||||
idt_ptr:
|
||||
.word idt_end - idt - 1
|
||||
.quad idt
|
||||
|
||||
.global exception_init_asm
|
||||
exception_init_asm:
|
||||
ret
|
||||
@@ -29,8 +29,10 @@
|
||||
#include <libpayload-config.h>
|
||||
#include <libpayload.h>
|
||||
|
||||
#if CONFIG(LP_ARCH_X86)
|
||||
#if CONFIG(LP_ARCH_X86_32)
|
||||
extern void i386_do_exec(long addr, int argc, char **argv, int *ret);
|
||||
#else
|
||||
#error "exec does not currently support x86_64."
|
||||
#endif
|
||||
|
||||
/**
|
||||
@@ -45,7 +47,7 @@ int exec(long addr, int argc, char **argv)
|
||||
{
|
||||
int val = -1;
|
||||
|
||||
#if CONFIG(LP_ARCH_X86)
|
||||
#if CONFIG(LP_ARCH_X86_32)
|
||||
i386_do_exec(addr, argc, argv, &val);
|
||||
#endif
|
||||
return val;
|
||||
@@ -15,6 +15,7 @@
|
||||
#include <exception.h>
|
||||
#include <gdb.h>
|
||||
#include <libpayload.h>
|
||||
#include <stddef.h>
|
||||
|
||||
static const u8 type_to_signal[] = {
|
||||
[EXC_DE] = GDB_SIGFPE,
|
||||
@@ -53,12 +54,15 @@ void gdb_arch_init(void)
|
||||
|
||||
void gdb_arch_enter(void)
|
||||
{
|
||||
u32 *esp;
|
||||
|
||||
asm volatile ("mov %%esp, %0" : "=r"(esp) );
|
||||
u8 *stack_pointer;
|
||||
#if CONFIG(LP_ARCH_X86_64)
|
||||
asm volatile ("movq %%rsp, %0" : "=r"(stack_pointer));
|
||||
#else
|
||||
asm volatile ("mov %%esp, %0" : "=r"(stack_pointer));
|
||||
#endif
|
||||
|
||||
/* Avoid reentrant exceptions, just call the hook if in one already. */
|
||||
if (esp >= exception_stack && esp <= exception_stack_end)
|
||||
if (stack_pointer >= exception_stack && stack_pointer <= exception_stack_end)
|
||||
gdb_exception_hook(EXC_BP);
|
||||
else
|
||||
asm volatile ("int3");
|
||||
@@ -66,12 +70,12 @@ void gdb_arch_enter(void)
|
||||
|
||||
int gdb_arch_set_single_step(int on)
|
||||
{
|
||||
const u32 tf_bit = 1 << 8;
|
||||
const size_t tf_bit = 1 << 8;
|
||||
|
||||
if (on)
|
||||
exception_state->regs.eflags |= tf_bit;
|
||||
exception_state->regs.reg_flags |= tf_bit;
|
||||
else
|
||||
exception_state->regs.eflags &= ~tf_bit;
|
||||
exception_state->regs.reg_flags &= ~tf_bit;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
141
payloads/libpayload/arch/x86/head_64.S
Normal file
141
payloads/libpayload/arch/x86/head_64.S
Normal file
@@ -0,0 +1,141 @@
|
||||
/*
|
||||
*
|
||||
* Copyright (C) 2024 Google Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#define IA32_EFER 0xC0000080
|
||||
#define EFER_LME (1 << 8)
|
||||
|
||||
.code32
|
||||
.global _entry
|
||||
.section .text._entry
|
||||
.align 4
|
||||
|
||||
/*
|
||||
* WARNING: Critical Code Section - 32/64-bit Compatibility
|
||||
* This code between `_entry` and `jnz _init64` is executed during system initialization.
|
||||
* It MUST function correctly regardless of whether the system is booting in:
|
||||
* - 32-bit protected mode
|
||||
* - 64-bit long mode
|
||||
* To achieve this, ONLY use instructions that produce identical binary output in both modes.
|
||||
* Thoroughly test ALL modifications to this section in BOTH 32-bit and 64-bit boot
|
||||
* environments.
|
||||
*/
|
||||
|
||||
_entry:
|
||||
|
||||
/* Add multiboot header and jump around it when building with multiboot support. */
|
||||
#if CONFIG(LP_MULTIBOOT)
|
||||
#include "multiboot_header.inc"
|
||||
#endif
|
||||
/* No interrupts, please. */
|
||||
cli
|
||||
|
||||
movl $IA32_EFER, %ecx
|
||||
rdmsr
|
||||
testl $EFER_LME, %eax
|
||||
jnz _init64
|
||||
|
||||
lgdt %cs:gdt_ptr
|
||||
|
||||
/* save pointer to coreboot tables */
|
||||
movl 4(%esp), %eax
|
||||
/*
|
||||
* NOTE: coreboot tables has passed over the top of the stack
|
||||
* while calling in protected mode.
|
||||
*/
|
||||
movl %eax, cb_header_ptr
|
||||
|
||||
call init_page_table
|
||||
movl $pm4le, %eax
|
||||
|
||||
/* load identity mapped page tables */
|
||||
movl %eax, %cr3
|
||||
|
||||
/* enable PAE */
|
||||
movl %cr4, %eax
|
||||
btsl $5, %eax
|
||||
movl %eax, %cr4
|
||||
|
||||
/* enable long mode */
|
||||
movl $(IA32_EFER), %ecx
|
||||
rdmsr
|
||||
btsl $8, %eax
|
||||
wrmsr
|
||||
|
||||
/* enable paging */
|
||||
movl %cr0, %eax
|
||||
btsl $31, %eax
|
||||
movl %eax, %cr0
|
||||
|
||||
/* Jump to selgdt 0x20, flat x64 code segment */
|
||||
ljmp $0x20, $_entry64
|
||||
|
||||
.code64
|
||||
.align 16
|
||||
_init64:
|
||||
movabs $gdt_ptr, %rax
|
||||
lgdt (%rax)
|
||||
|
||||
/*
|
||||
* Note: The `cb_header_ptr` has passed as the first argument
|
||||
* to the x86-64 calling convention.
|
||||
*/
|
||||
movq %rdi, cb_header_ptr
|
||||
|
||||
call init_page_table
|
||||
movq $pm4le, %rax
|
||||
|
||||
/* load identity mapped page tables */
|
||||
movq %rax, %cr3
|
||||
|
||||
_entry64:
|
||||
/* Store current stack pointer and set up new stack. */
|
||||
movq %rsp, %rax
|
||||
movabs $_estack, %rsp
|
||||
|
||||
push %rax
|
||||
|
||||
fninit
|
||||
movq %cr0, %rax
|
||||
andq $0xFFFFFFFFFFFFFFFB, %rax /* clear EM */
|
||||
orq $0x00000022, %rax /* set MP, NE */
|
||||
movq %rax, %cr0
|
||||
|
||||
movq %cr4, %rax
|
||||
orq $0x00000600, %rax /* set OSFXSR, OSXMMEXCPT */
|
||||
movq %rax, %cr4
|
||||
|
||||
/* Let's rock. */
|
||||
call start_main
|
||||
|
||||
/* %rax has the return value - pass it on unmolested */
|
||||
_leave:
|
||||
/* Restore old stack. */
|
||||
pop %rsp
|
||||
|
||||
/* Return to the original context. */
|
||||
ret
|
||||
@@ -26,8 +26,13 @@
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#if CONFIG(LP_ARCH_X86_64)
|
||||
OUTPUT_FORMAT(elf64-x86-64)
|
||||
OUTPUT_ARCH(x86_64)
|
||||
#else
|
||||
OUTPUT_FORMAT(elf32-i386)
|
||||
OUTPUT_ARCH(i386)
|
||||
#endif
|
||||
|
||||
ENTRY(_entry)
|
||||
|
||||
|
||||
149
payloads/libpayload/arch/x86/pt.S
Normal file
149
payloads/libpayload/arch/x86/pt.S
Normal file
@@ -0,0 +1,149 @@
|
||||
/*
|
||||
*
|
||||
* Copyright 2024 Google Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* For reference see "AMD64 Architecture Programmer's Manual Volume 2",
|
||||
* Document 24593-Rev. 3.31-July 2019 Chapter 5.3.4
|
||||
*
|
||||
* Page table attributes: WB, User+Supervisor, Present, Writeable, Accessed, Dirty
|
||||
*/
|
||||
|
||||
.section .bss
|
||||
#define _PRES (1ULL << 0)
|
||||
#define _RW (1ULL << 1)
|
||||
#define _US (1ULL << 2)
|
||||
#define _A (1ULL << 5)
|
||||
#define _D (1ULL << 6)
|
||||
#define _PS (1ULL << 7)
|
||||
|
||||
.section .bss.pm4le
|
||||
.global pm4le
|
||||
.align 4096
|
||||
pm4le:
|
||||
.skip 8
|
||||
|
||||
.section .bss.main_page_table
|
||||
.global main_page_table
|
||||
.align 4096
|
||||
main_page_table:
|
||||
.skip 8192
|
||||
|
||||
.section .bss.extra_page_table
|
||||
.global extra_page_table
|
||||
.align 4096
|
||||
extra_page_table:
|
||||
.skip 32
|
||||
|
||||
/*
|
||||
* WARNING: 32-bit/64-bit Mode Compatibility for Page Table Initialization
|
||||
* This `init_page_table` function is designed to work in both 32-bit protected
|
||||
* mode AND 64-bit long mode.
|
||||
*
|
||||
* Key Considerations:
|
||||
* - Assembly Instructions: Use ONLY instructions that have the SAME binary representation
|
||||
* in both 32-bit and 64-bit modes.
|
||||
* - `.code64` Directive: We're compiling with `.code64` to ensure the assembler uses
|
||||
* the correct 64-bit version of instructions (e.g., `inc`).
|
||||
* - Register Notation:
|
||||
* - Use 64-bit register names (like `%rsi`) for register-indirect addressing to avoid
|
||||
* incorrect address size prefixes.
|
||||
* - It's safe to use `%esi` with `mov` instructions, as the high 32 bits are zeroed
|
||||
* in 64-bit mode.
|
||||
*
|
||||
* IMPORTANT:
|
||||
* Thoroughly test ANY changes to this function in BOTH 32-bit and 64-bit boot environments.
|
||||
*/
|
||||
|
||||
.code64
|
||||
.section .text.init_page_table
|
||||
.globl init_page_table
|
||||
.type init_page_table, @function
|
||||
|
||||
init_page_table:
|
||||
mov $0x80000001, %eax
|
||||
cpuid
|
||||
test $(1 << 26), %edx
|
||||
jnz setup_1gb
|
||||
|
||||
setup_2mb:
|
||||
mov $2048, %edi
|
||||
mov $(_PRES + _RW + _US + _PS + _A + _D), %eax
|
||||
mov $0, %ecx
|
||||
mov $main_page_table, %esi
|
||||
|
||||
loop_2mb:
|
||||
mov %eax, (%rsi, %rcx, 8)
|
||||
mov $0, 4(%rsi, %rcx, 8)
|
||||
add $0x200000, %eax
|
||||
inc %ecx
|
||||
cmp %edi, %ecx
|
||||
jb loop_2mb
|
||||
|
||||
mov $4, %edi
|
||||
mov $main_page_table, %eax
|
||||
add $(_PRES + _RW + _US + _A), %eax
|
||||
mov $0, %ecx
|
||||
mov $extra_page_table, %esi
|
||||
|
||||
fill_extra_page_table:
|
||||
mov %eax, (%rsi, %rcx, 8)
|
||||
mov $0, 4(%rsi, %rcx, 8)
|
||||
add $4096, %eax
|
||||
inc %ecx
|
||||
cmp %edi, %ecx
|
||||
jb fill_extra_page_table
|
||||
|
||||
mov $extra_page_table, %eax
|
||||
jmp leave
|
||||
|
||||
setup_1gb:
|
||||
mov $512, %edi
|
||||
mov $(_PRES + _RW + _US + _PS + _A + _D), %eax
|
||||
mov $0, %ebx
|
||||
mov $0, %ecx
|
||||
mov $main_page_table, %esi
|
||||
|
||||
loop_1gb:
|
||||
mov %eax, (%rsi, %rcx, 8)
|
||||
mov %ebx, 4(%rsi, %rcx, 8)
|
||||
add $0x40000000, %eax
|
||||
cmp $0x40000000, %eax
|
||||
ja no_overflow_1gb
|
||||
inc %ebx
|
||||
no_overflow_1gb:
|
||||
inc %ecx
|
||||
cmp %edi, %ecx
|
||||
jb loop_1gb
|
||||
|
||||
mov $main_page_table, %eax
|
||||
|
||||
leave:
|
||||
or $(_PRES + _RW + _US + _A), %eax
|
||||
mov %eax, pm4le
|
||||
|
||||
ret
|
||||
@@ -81,6 +81,16 @@ void *memcpy(void *dest, const void *src, size_t n)
|
||||
{
|
||||
unsigned long d0, d1, d2;
|
||||
|
||||
#if CONFIG(LP_ARCH_X86_64)
|
||||
asm volatile(
|
||||
"rep ; movsq\n\t"
|
||||
"mov %4,%%rcx\n\t"
|
||||
"rep ; movsb\n\t"
|
||||
: "=&c" (d0), "=&D" (d1), "=&S" (d2)
|
||||
: "0" (n >> 3), "g" (n & 7), "1" (dest), "2" (src)
|
||||
: "memory"
|
||||
);
|
||||
#else
|
||||
asm volatile(
|
||||
"rep ; movsl\n\t"
|
||||
"movl %4,%%ecx\n\t"
|
||||
@@ -89,6 +99,7 @@ void *memcpy(void *dest, const void *src, size_t n)
|
||||
: "0" (n >> 2), "g" (n & 3), "1" (dest), "2" (src)
|
||||
: "memory"
|
||||
);
|
||||
#endif
|
||||
|
||||
return dest;
|
||||
}
|
||||
|
||||
@@ -84,7 +84,11 @@ if [ "$CONFIG_LP_ARCH_ARM64" = "y" ]; then
|
||||
fi
|
||||
if [ "$CONFIG_LP_ARCH_X86" = "y" ]; then
|
||||
_ARCHDIR=x86
|
||||
if [ "$CONFIG_LP_ARCH_X86_32" = "y" ]; then
|
||||
_ARCHEXTRA="-m32 "
|
||||
else
|
||||
_ARCHEXTRA="-m64 "
|
||||
fi
|
||||
fi
|
||||
if [ "$CONFIG_LP_ARCH_MOCK" = "y" ]; then
|
||||
_ARCHDIR=mock
|
||||
@@ -122,13 +126,10 @@ CMDLINE=
|
||||
|
||||
while [ $# -gt 0 ]; do
|
||||
case $1 in
|
||||
-m32|-fno-stack-protector)
|
||||
-m32|-fno-stack-protector|-m64)
|
||||
shift
|
||||
continue
|
||||
;;
|
||||
-m64)
|
||||
error "Invalid option --64 - only 32 bit architectures are supported"
|
||||
;;
|
||||
-c)
|
||||
DOLINK=0
|
||||
;;
|
||||
|
||||
@@ -66,7 +66,7 @@ static u8 *ahci_prdbuf_init(ahci_dev_t *const dev,
|
||||
u8 *const user_buf, const size_t len,
|
||||
const int out)
|
||||
{
|
||||
if ((u32)user_buf & 1) {
|
||||
if ((uintptr_t)user_buf & 1) {
|
||||
printf("ahci: Odd buffer pointer (%p).\n", user_buf);
|
||||
if (dev->buf) /* orphaned buffer */
|
||||
free(dev->buf - *(dev->buf - 1));
|
||||
@@ -76,7 +76,7 @@ static u8 *ahci_prdbuf_init(ahci_dev_t *const dev,
|
||||
dev->user_buf = user_buf;
|
||||
dev->write_back = !out;
|
||||
dev->buflen = len;
|
||||
if ((u32)dev->buf & 1) {
|
||||
if ((uintptr_t)dev->buf & 1) {
|
||||
dev->buf[0] = 1;
|
||||
dev->buf += 1;
|
||||
} else {
|
||||
|
||||
@@ -274,7 +274,7 @@ uhci_stop(hci_t *controller)
|
||||
|
||||
#define UHCI_SLEEP_TIME_US 30
|
||||
#define UHCI_TIMEOUT (USB_MAX_PROCESSING_TIME_US / UHCI_SLEEP_TIME_US)
|
||||
#define GET_TD(x) ((void*)(((unsigned int)(x))&~0xf))
|
||||
#define GET_TD(x) ((void *)(((unsigned long)(x))&~0xf))
|
||||
|
||||
static td_t *
|
||||
wait_for_completed_qh(hci_t *controller, qh_t *qh)
|
||||
|
||||
@@ -29,6 +29,7 @@
|
||||
#ifndef _ARCH_EXCEPTION_H
|
||||
#define _ARCH_EXCEPTION_H
|
||||
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
|
||||
void exception_init_asm(void);
|
||||
@@ -38,20 +39,28 @@ void disable_interrupts(void);
|
||||
/** Returns 1 if interrupts are enabled. */
|
||||
int interrupts_enabled(void);
|
||||
|
||||
struct exception_state
|
||||
{
|
||||
#if CONFIG(LP_ARCH_X86_64)
|
||||
struct exception_state {
|
||||
/* Careful: x86/gdb.c currently relies on the size and order of regs. */
|
||||
struct {
|
||||
u32 eax;
|
||||
u32 ecx;
|
||||
u32 edx;
|
||||
u32 ebx;
|
||||
u32 esp;
|
||||
u32 ebp;
|
||||
u32 esi;
|
||||
u32 edi;
|
||||
u32 eip;
|
||||
u32 eflags;
|
||||
size_t reg_ax;
|
||||
size_t reg_bx;
|
||||
size_t reg_cx;
|
||||
size_t reg_dx;
|
||||
size_t reg_si;
|
||||
size_t reg_di;
|
||||
size_t reg_bp;
|
||||
size_t reg_sp;
|
||||
size_t reg_r8;
|
||||
size_t reg_r9;
|
||||
size_t reg_r10;
|
||||
size_t reg_r11;
|
||||
size_t reg_r12;
|
||||
size_t reg_r13;
|
||||
size_t reg_r14;
|
||||
size_t reg_r15;
|
||||
size_t reg_ip;
|
||||
size_t reg_flags;
|
||||
u32 cs;
|
||||
u32 ss;
|
||||
u32 ds;
|
||||
@@ -59,13 +68,39 @@ struct exception_state
|
||||
u32 fs;
|
||||
u32 gs;
|
||||
} regs;
|
||||
u32 error_code;
|
||||
u32 vector;
|
||||
size_t error_code;
|
||||
size_t vector;
|
||||
} __packed;
|
||||
#else
|
||||
struct exception_state {
|
||||
/* Careful: x86/gdb.c currently relies on the size and order of regs. */
|
||||
struct {
|
||||
size_t reg_ax;
|
||||
size_t reg_cx;
|
||||
size_t reg_dx;
|
||||
size_t reg_bx;
|
||||
size_t reg_sp;
|
||||
size_t reg_bp;
|
||||
size_t reg_si;
|
||||
size_t reg_di;
|
||||
size_t reg_ip;
|
||||
size_t reg_flags;
|
||||
u32 cs;
|
||||
u32 ss;
|
||||
u32 ds;
|
||||
u32 es;
|
||||
u32 fs;
|
||||
u32 gs;
|
||||
} regs;
|
||||
size_t error_code;
|
||||
size_t vector;
|
||||
} __packed;
|
||||
#endif
|
||||
|
||||
extern struct exception_state *exception_state;
|
||||
|
||||
extern u32 exception_stack[];
|
||||
extern u32 *exception_stack_end;
|
||||
extern u8 exception_stack[];
|
||||
extern u8 *exception_stack_end;
|
||||
|
||||
enum {
|
||||
EXC_DE = 0, /* Divide by zero */
|
||||
|
||||
@@ -29,7 +29,7 @@
|
||||
|
||||
libc-$(CONFIG_LP_LIBC) += malloc.c printf.c console.c string.c
|
||||
libc-$(CONFIG_LP_LIBC) += memory.c ctype.c lib.c libgcc.c
|
||||
libc-$(CONFIG_LP_LIBC) += rand.c time.c exec.c
|
||||
libc-$(CONFIG_LP_LIBC) += rand.c time.c
|
||||
libc-$(CONFIG_LP_LIBC) += readline.c getopt_long.c sysinfo.c
|
||||
libc-$(CONFIG_LP_LIBC) += args.c
|
||||
libc-$(CONFIG_LP_LIBC) += strlcpy.c
|
||||
|
||||
@@ -15,7 +15,8 @@ vboot-fixup-includes = $(filter -I$(coreboottop)/%, $(1)) \
|
||||
$(filter-out -I$(coreboottop)/%,$(1)))))
|
||||
|
||||
VBOOT_FIRMWARE_ARCH-$(CONFIG_LP_ARCH_ARM) := arm
|
||||
VBOOT_FIRMWARE_ARCH-$(CONFIG_LP_ARCH_X86) := x86
|
||||
VBOOT_FIRMWARE_ARCH-$(CONFIG_LP_ARCH_X86_32) := x86
|
||||
VBOOT_FIRMWARE_ARCH-$(CONFIG_LP_ARCH_X86_64) := x86_64
|
||||
VBOOT_FIRMWARE_ARCH-$(CONFIG_LP_ARCH_ARM64) := arm64
|
||||
|
||||
ifneq ($(CONFIG_LP_ARCH_MOCK),)
|
||||
|
||||
Reference in New Issue
Block a user