libpayload/apic: Only ACK interrupts triggered by the APIC
Only set end of interrupt (EOI) when the APIC In-Service vector matches the interrupt vector. This makes it so we don't EOI a non APIC interrupt. BUG=b:116777191 TEST=Booted grunt with APIC enabled and verified depthcharge still works. Change-Id: I00bd1e7a0fcf2fc004feadc40d22ebfefe68b384 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/28879 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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						Martin Roth
					
				
			
			
				
	
			
			
			
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			@@ -58,6 +58,8 @@
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#define APIC_TIMER_INIT_COUNT		0x380
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					#define APIC_TIMER_INIT_COUNT		0x380
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#define APIC_TIMER_CUR_COUNT		0x390
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					#define APIC_TIMER_CUR_COUNT		0x390
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#define APIC_TIMER_DIV_CFG		0x3E0
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					#define APIC_TIMER_DIV_CFG		0x3E0
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					#define APIC_ISR_0			0x100
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					#define APIC_ISR_OFFSET			0x010
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#define APIC_LVT_SIZE			0x010
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					#define APIC_LVT_SIZE			0x010
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@@ -141,11 +143,28 @@ static void timer_interrupt_handler(u8 vector)
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	timer_waiting = 0;
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						timer_waiting = 0;
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}
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					}
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void apic_eoi(void)
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					void apic_eoi(uint8_t vector)
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{
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					{
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	die_if(!apic_bar, "APIC is not initialized");
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						die_if(!apic_bar, "APIC is not initialized");
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	apic_write32(APIC_EOI, 0);
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						/*
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						 * Local and I/O APICs support 240 vectors (in the range of 16 to 255)
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						 * as valid interrupts.
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						 */
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						if (vector <= 15)
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							return;
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						/* Each bank handles 32 vectors */
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						uint8_t bank = vector / 32;
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						uint32_t offset = APIC_ISR_0 + bank * APIC_ISR_OFFSET;
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						uint32_t mask = apic_read32(offset);
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						uint8_t shift = vector % 32;
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						if (mask & (1 << shift))
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							apic_write32(APIC_EOI, 0);
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}
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					}
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static enum APIC_CAPABILITY apic_capabilities(void)
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					static enum APIC_CAPABILITY apic_capabilities(void)
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@@ -34,13 +34,6 @@
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#include <arch/apic.h>
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					#include <arch/apic.h>
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#define IF_FLAG				(1 << 9)
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					#define IF_FLAG				(1 << 9)
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/*
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 * Local and I/O APICs support 240 vectors (in the range of 16 to 255) as valid
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 * interrupts. The Intel 64 and IA-32 architectures reserve vectors 16
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 * through 31 for predefined interrupts, exceptions, and Intel-reserved
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 * encodings.
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*/
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#define FIRST_USER_DEFINED_VECTOR	32
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u32 exception_stack[0x400] __attribute__((aligned(8)));
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					u32 exception_stack[0x400] __attribute__((aligned(8)));
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@@ -173,15 +166,15 @@ static void dump_exception_state(void)
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void exception_dispatch(void)
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					void exception_dispatch(void)
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{
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					{
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	u32 vec = exception_state->vector;
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						die_if(exception_state->vector >= ARRAY_SIZE(handlers),
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						       "Invalid vector %u\n", exception_state->vector);
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	die_if(vec >= ARRAY_SIZE(handlers), "Invalid vector %u\n", vec);
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						u8 vec = exception_state->vector;
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	if (handlers[vec]) {
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						if (handlers[vec]) {
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		handlers[vec](vec);
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							handlers[vec](vec);
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		if (IS_ENABLED(CONFIG_LP_ENABLE_APIC)
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							if (IS_ENABLED(CONFIG_LP_ENABLE_APIC))
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				&& vec >= FIRST_USER_DEFINED_VECTOR)
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								apic_eoi(vec);
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			apic_eoi();
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		return;
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							return;
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	}
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						}
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@@ -38,7 +38,7 @@ void apic_init(void);
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uint8_t apic_id(void);
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					uint8_t apic_id(void);
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/** Signal the end of the interrupt handler. */
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					/** Signal the end of the interrupt handler. */
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void apic_eoi(void);
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					void apic_eoi(uint8_t vector);
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void apic_delay(unsigned int usec);
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					void apic_delay(unsigned int usec);
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