AGESA fam14: Use AMD_ACPIMMIO_GPIO_BASE_100

Use the pre-defined constant address directly.

Change-Id: I29fbc82fffc69b864adb4ddbda1425db98e2e48a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42708
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Kyösti Mälkki
2020-06-23 02:50:00 +03:00
committed by Patrick Georgi
parent 19edbf640b
commit b0ae42b5bb
7 changed files with 12 additions and 48 deletions

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@@ -30,7 +30,6 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigP
AGESA_STATUS Status; AGESA_STATUS Status;
UINTN FcnData; UINTN FcnData;
MEM_DATA_STRUCT *MemData; MEM_DATA_STRUCT *MemData;
UINT32 AcpiMmioAddr;
UINT32 GpioMmioAddr; UINT32 GpioMmioAddr;
UINT8 Data8; UINT8 Data8;
UINT8 TempData8; UINT8 TempData8;
@@ -39,8 +38,7 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigP
MemData = ConfigPtr; MemData = ConfigPtr;
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
AcpiMmioAddr = AMD_SB_ACPI_MMIO_ADDR; GpioMmioAddr = ACPIMMIO_GPIO_BASE_100;
GpioMmioAddr = AcpiMmioAddr + GPIO_BASE;
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
Data8 &= ~BIT5; Data8 &= ~BIT5;
@@ -107,13 +105,11 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi
PCIe_SLOT_RESET_INFO *ResetInfo; PCIe_SLOT_RESET_INFO *ResetInfo;
UINT32 GpioMmioAddr; UINT32 GpioMmioAddr;
UINT32 AcpiMmioAddr;
UINT8 Data8; UINT8 Data8;
FcnData = Data; FcnData = Data;
ResetInfo = ConfigPtr; ResetInfo = ConfigPtr;
AcpiMmioAddr = AMD_SB_ACPI_MMIO_ADDR; GpioMmioAddr = ACPIMMIO_GPIO_BASE_100;
GpioMmioAddr = AcpiMmioAddr + GPIO_BASE;
Status = AGESA_UNSUPPORTED; Status = AGESA_UNSUPPORTED;
switch (ResetInfo->ResetId) { switch (ResetInfo->ResetId) {
case 4: case 4:

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@@ -40,20 +40,12 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi
PCIe_SLOT_RESET_INFO *ResetInfo; PCIe_SLOT_RESET_INFO *ResetInfo;
UINT32 GpioMmioAddr; UINT32 GpioMmioAddr;
UINT32 AcpiMmioAddr;
UINT8 Data8; UINT8 Data8;
UINT16 Data16;
FcnData = Data; FcnData = Data;
ResetInfo = ConfigPtr; ResetInfo = ConfigPtr;
// Get SB800 MMIO Base (AcpiMmioAddr)
Data8 = pm_io_read8(0x27);
Data16 = Data8 << 8;
Data8 = pm_io_read8(0x26);
Data16 |= Data8;
AcpiMmioAddr = (UINT32)Data16 << 16;
Status = AGESA_UNSUPPORTED; Status = AGESA_UNSUPPORTED;
GpioMmioAddr = AcpiMmioAddr + GPIO_BASE; GpioMmioAddr = ACPIMMIO_GPIO_BASE_100;
switch (ResetInfo->ResetId) switch (ResetInfo->ResetId)
{ {
case 46: // GPIO50 = SBGPIO_PCIE_RST# affects LAN0, LAN1, PCIe slot case 46: // GPIO50 = SBGPIO_PCIE_RST# affects LAN0, LAN1, PCIe slot

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@@ -30,7 +30,6 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigP
AGESA_STATUS Status; AGESA_STATUS Status;
UINTN FcnData; UINTN FcnData;
MEM_DATA_STRUCT *MemData; MEM_DATA_STRUCT *MemData;
UINT32 AcpiMmioAddr;
UINT32 GpioMmioAddr; UINT32 GpioMmioAddr;
UINT8 Data8; UINT8 Data8;
UINT8 TempData8; UINT8 TempData8;
@@ -39,8 +38,7 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigP
MemData = ConfigPtr; MemData = ConfigPtr;
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
AcpiMmioAddr = AMD_SB_ACPI_MMIO_ADDR; GpioMmioAddr = ACPIMMIO_GPIO_BASE_100;
GpioMmioAddr = AcpiMmioAddr + GPIO_BASE;
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
Data8 &= ~BIT5; Data8 &= ~BIT5;
@@ -106,13 +104,12 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi
UINTN FcnData; UINTN FcnData;
PCIe_SLOT_RESET_INFO *ResetInfo; PCIe_SLOT_RESET_INFO *ResetInfo;
UINT32 GpioMmioAddr; UINT32 GpioMmioAddr;
UINT32 AcpiMmioAddr;
UINT8 Data8; UINT8 Data8;
GpioMmioAddr = ACPIMMIO_GPIO_BASE_100;
FcnData = Data; FcnData = Data;
ResetInfo = ConfigPtr; ResetInfo = ConfigPtr;
AcpiMmioAddr = AMD_SB_ACPI_MMIO_ADDR;
GpioMmioAddr = AcpiMmioAddr + GPIO_BASE;
Status = AGESA_UNSUPPORTED; Status = AGESA_UNSUPPORTED;
switch (ResetInfo->ResetId) { switch (ResetInfo->ResetId) {
case 4: case 4:

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@@ -30,7 +30,6 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigP
AGESA_STATUS Status; AGESA_STATUS Status;
UINTN FcnData; UINTN FcnData;
MEM_DATA_STRUCT *MemData; MEM_DATA_STRUCT *MemData;
UINT32 AcpiMmioAddr;
UINT32 GpioMmioAddr; UINT32 GpioMmioAddr;
UINT8 Data8; UINT8 Data8;
UINT8 TempData8; UINT8 TempData8;
@@ -39,8 +38,7 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigP
MemData = ConfigPtr; MemData = ConfigPtr;
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
AcpiMmioAddr = AMD_SB_ACPI_MMIO_ADDR; GpioMmioAddr = ACPIMMIO_GPIO_BASE_100;
GpioMmioAddr = AcpiMmioAddr + GPIO_BASE;
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
Data8 &= ~BIT5; Data8 &= ~BIT5;
@@ -106,13 +104,12 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi
UINTN FcnData; UINTN FcnData;
PCIe_SLOT_RESET_INFO *ResetInfo; PCIe_SLOT_RESET_INFO *ResetInfo;
UINT32 GpioMmioAddr; UINT32 GpioMmioAddr;
UINT32 AcpiMmioAddr;
UINT8 Data8; UINT8 Data8;
GpioMmioAddr = ACPIMMIO_GPIO_BASE_100;
FcnData = Data; FcnData = Data;
ResetInfo = ConfigPtr; ResetInfo = ConfigPtr;
AcpiMmioAddr = AMD_SB_ACPI_MMIO_ADDR;
GpioMmioAddr = AcpiMmioAddr + GPIO_BASE;
Status = AGESA_UNSUPPORTED; Status = AGESA_UNSUPPORTED;
switch (ResetInfo->ResetId) { switch (ResetInfo->ResetId) {
case 4: case 4:

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@@ -28,7 +28,6 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigP
AGESA_STATUS Status; AGESA_STATUS Status;
UINTN FcnData; UINTN FcnData;
MEM_DATA_STRUCT *MemData; MEM_DATA_STRUCT *MemData;
UINT32 AcpiMmioAddr;
UINT32 GpioMmioAddr; UINT32 GpioMmioAddr;
UINT8 Data8; UINT8 Data8;
UINT8 TempData8; UINT8 TempData8;
@@ -37,8 +36,7 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigP
MemData = ConfigPtr; MemData = ConfigPtr;
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
AcpiMmioAddr = AMD_SB_ACPI_MMIO_ADDR; GpioMmioAddr = ACPIMMIO_GPIO_BASE_100;
GpioMmioAddr = AcpiMmioAddr + GPIO_BASE;
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
Data8 &= ~BIT5; Data8 &= ~BIT5;

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@@ -40,20 +40,12 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi
PCIe_SLOT_RESET_INFO *ResetInfo; PCIe_SLOT_RESET_INFO *ResetInfo;
UINT32 GpioMmioAddr; UINT32 GpioMmioAddr;
UINT32 AcpiMmioAddr;
UINT8 Data8; UINT8 Data8;
UINT16 Data16;
FcnData = Data; FcnData = Data;
ResetInfo = ConfigPtr; ResetInfo = ConfigPtr;
// Get SB800 MMIO Base (AcpiMmioAddr)
Data8 = pm_io_read8(0x27);
Data16=Data8<<8;
Data8 = pm_io_read8(0x26);
Data16|=Data8;
AcpiMmioAddr = (UINT32)Data16 << 16;
Status = AGESA_UNSUPPORTED; Status = AGESA_UNSUPPORTED;
GpioMmioAddr = AcpiMmioAddr + GPIO_BASE; GpioMmioAddr = ACPIMMIO_GPIO_BASE_100;
switch (ResetInfo->ResetId) switch (ResetInfo->ResetId)
{ {
case 46: // GPIO50 = SBGPIO_PCIE_RST# affects LAN0, LAN1, PCIe slot case 46: // GPIO50 = SBGPIO_PCIE_RST# affects LAN0, LAN1, PCIe slot

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@@ -43,20 +43,12 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi
PCIe_SLOT_RESET_INFO *ResetInfo; PCIe_SLOT_RESET_INFO *ResetInfo;
uint32_t GpioMmioAddr; uint32_t GpioMmioAddr;
uint32_t AcpiMmioAddr;
uint8_t Data8; uint8_t Data8;
uint16_t Data16;
FcnData = Data; FcnData = Data;
ResetInfo = ConfigPtr; ResetInfo = ConfigPtr;
/* Get SB800 MMIO Base (AcpiMmioAddr) */
Data8 = pm_io_read8(0x27);
Data16 = Data8 << 8;
Data8 = pm_io_read8(0x26);
Data16 |= Data8;
AcpiMmioAddr = (uint32_t)Data16 << 16;
Status = AGESA_UNSUPPORTED; Status = AGESA_UNSUPPORTED;
GpioMmioAddr = AcpiMmioAddr + GPIO_BASE; GpioMmioAddr = ACPIMMIO_GPIO_BASE_100;
switch (ResetInfo->ResetId) switch (ResetInfo->ResetId)
{ {
case 46: /* GPIO50 = SBGPIO_PCIE_RST# affects LAN0, LAN1, PCIe slot */ case 46: /* GPIO50 = SBGPIO_PCIE_RST# affects LAN0, LAN1, PCIe slot */