sb/intel: Define CONFIG_FIXED_SMBUS_IO_BASE

Make it default to 0x400, which is what the touched southbridges use.

Change-Id: I95cb1730d5bf6f596ed1ca8e7dba40b6a9e882fe
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43037
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Angel Pons
2020-07-03 01:02:28 +02:00
parent 65e5b100e2
commit b21bffae0c
38 changed files with 39 additions and 44 deletions

View File

@@ -105,7 +105,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
.dmibar = (uintptr_t)DEFAULT_DMIBAR,
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
.hpet_address = CONFIG_HPET_ADDRESS,