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nb/intel/i945/gma: Factor out code to new gma_ngi()

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This helps with meeting the line length limit.

Also, join some lines with the one above, as the line length is now met.

Change-Id: If457b3b592211aba1a3218501146b17abb5b799f
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/25876
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Paul Menzel
2018-04-26 19:53:31 +02:00
committed by Nico Huber
parent 81084368d0
commit b23833fb29
1 changed files with 43 additions and 42 deletions
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49
src/northbridge/intel/i945/gma.c
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@@ -641,24 +641,8 @@ static void panel_setup(u8 *mmiobase, struct device *const dev)
DEFAULT_BLC_PWM)); DEFAULT_BLC_PWM));
} }
static void gma_func0_init(struct device *dev) static void gma_ngi(struct device *const dev)
{ {
u32 reg32;
/* Unconditionally reset graphics */
pci_write_config8(dev, GDRST, 1);
udelay(50);
pci_write_config8(dev, GDRST, 0);
/* wait for device to finish */
while (pci_read_config8(dev, GDRST) & 1)
;
/* IGD needs to be Bus Master */
reg32 = pci_read_config32(dev, PCI_COMMAND);
pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER
| PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) {
/* This should probably run before post VBIOS init. */ /* This should probably run before post VBIOS init. */
printk(BIOS_INFO, "Initializing VGA without OPROM.\n"); printk(BIOS_INFO, "Initializing VGA without OPROM.\n");
void *mmiobase; void *mmiobase;
@@ -670,9 +654,7 @@ static void gma_func0_init(struct device *dev)
graphics_base = dev->resource_list[2].base; graphics_base = dev->resource_list[2].base;
printk(BIOS_SPEW, "GMADR = 0x%08x GTTADR = 0x%08x\n", printk(BIOS_SPEW, "GMADR = 0x%08x GTTADR = 0x%08x\n",
pci_read_config32(dev, GMADR), pci_read_config32(dev, GMADR), pci_read_config32(dev, GTTADR));
pci_read_config32(dev, GTTADR)
);
int err; int err;
@@ -694,13 +676,32 @@ static void gma_func0_init(struct device *dev)
gfx_set_init_done(1); gfx_set_init_done(1);
/* Linux relies on VBT for panel info. */ /* Linux relies on VBT for panel info. */
if (CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM) { if (CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM) {
generate_fake_intel_oprom(&conf->gfx, dev, generate_fake_intel_oprom(&conf->gfx, dev, "$VBT CALISTOGA");
"$VBT CALISTOGA");
} }
if (CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC) { if (CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC) {
generate_fake_intel_oprom(&conf->gfx, dev, generate_fake_intel_oprom(&conf->gfx, dev, "$VBT LAKEPORT-G");
"$VBT LAKEPORT-G");
} }
}
static void gma_func0_init(struct device *dev)
{
u32 reg32;
/* Unconditionally reset graphics */
pci_write_config8(dev, GDRST, 1);
udelay(50);
pci_write_config8(dev, GDRST, 0);
/* wait for device to finish */
while (pci_read_config8(dev, GDRST) & 1)
;
/* IGD needs to be Bus Master */
reg32 = pci_read_config32(dev, PCI_COMMAND);
pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER
| PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) {
gma_ngi(dev);
} else { } else {
/* PCI Init, will run VBIOS */ /* PCI Init, will run VBIOS */
pci_dev_init(dev); pci_dev_init(dev);