nb/intel/ironlake: Use MMCONF_BUS_NUMBER everywhere
Bootblock enabling needs some special handling. Also, the definition of the `get_pcie_bar` function is incorrect for Ironlake, so remove it. With this patch, using 64 and 128 for MMCONF_BUS_NUMBER should work. However, it has not been tested. Using 256 busses should still work. Change-Id: Ic466ddc7b80f60af5cbff53583281440f02974c7 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49761 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
@@ -21,7 +21,7 @@
|
||||
|
||||
#include "memmap.h"
|
||||
|
||||
#define QUICKPATH_BUS 0xff
|
||||
#define QUICKPATH_BUS (CONFIG_MMCONF_BUS_NUMBER - 1)
|
||||
|
||||
#include <southbridge/intel/ibexpeak/pch.h>
|
||||
|
||||
|
Reference in New Issue
Block a user