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intel/skylake: Add devicetree settings for acoustic noise mitigation

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Add options to the skylake chip config that will allow tuning the
various settings that can affect acoustics with the CPU and its VRs.

These settings are applied inside FSP, and they can adjust the slew
slew rate when changing voltages or disable fast C-state ramping on
the various CPU VR rails.

BUG=b:35581264
BRANCH=none
TEST=these are currently unused, but I verified that enabling the
options can affect the acoustics of a system at runtime.

Change-Id: I6a8ec0b8d3bd38b330cb4836bfa5bbbfc87dc3fb
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/18662
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
This commit is contained in:
Duncan Laurie
2017-03-07 19:12:02 -08:00
parent 03df460af5
commit b2aac85030
2 changed files with 38 additions and 0 deletions
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9
src/soc/intel/skylake/chip_fsp20.c
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@@ -249,6 +249,15 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
*/
params->SendVrMbxCmd1 = config->SendVrMbxCmd;
/* Acoustic Noise Mitigation */
params->AcousticNoiseMitigation = config->AcousticNoiseMitigation;
params->SlowSlewRateForIa = config->SlowSlewRateForIa;
params->SlowSlewRateForGt = config->SlowSlewRateForGt;
params->SlowSlewRateForSa = config->SlowSlewRateForSa;
params->FastPkgCRampDisableIa = config->FastPkgCRampDisableIa;
params->FastPkgCRampDisableGt = config->FastPkgCRampDisableGt;
params->FastPkgCRampDisableSa = config->FastPkgCRampDisableSa;
soc_irq_settings(params);
}