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Enable CBFS everywhere. All boards compiled for me (abuild tested),

Browse Source 
and we will fix issues as they appear.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Patrick Georgi
2009-08-11 17:35:02 +00:00
parent 401c8d1da2
commit b339e10f04
146 changed files with 238 additions and 365 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
targets/amd/db800/Config.lb
View File

@@ -32,7 +32,6 @@ option CONFIG_COMPRESSED_PAYLOAD_LZMA=0
# Leave 36k for VSA.
option CONFIG_ROM_SIZE=512*1024-36*1024
# option CONFIG_ROM_SIZE=256*1024-36*1024
option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE
option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9
option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9

1
targets/amd/norwich/Config.lb
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@@ -32,7 +32,6 @@ option CONFIG_COMPRESSED_PAYLOAD_LZMA=0
option CONFIG_ROM_SIZE=512*1024-36*1024
#option CONFIG_ROM_SIZE=256*1024-36*1024
option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE
option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9
option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9

2
targets/amd/rumba/Config.nofallback.lb
View File

@@ -5,8 +5,6 @@ target rumba
mainboard amd/rumba
option CONFIG_ROM_SIZE=128*1024
option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE
#option CONFIG_FALLBACK_SIZE=65535
#romimage "normal"
# option CONFIG_USE_FALLBACK_IMAGE=0

2
targets/amd/serengeti_cheetah/Config-abuild.lb
View File

@@ -13,7 +13,6 @@ __LOGLEVEL__
romimage "normal"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=0
option CONFIG_ROM_IMAGE_SIZE=0x20000
option COREBOOT_EXTRA_VERSION=".0-normal"
payload __PAYLOAD__
end
@@ -21,7 +20,6 @@ end
romimage "fallback"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=1
option CONFIG_ROM_IMAGE_SIZE=0x20000
option COREBOOT_EXTRA_VERSION=".0-fallback"
payload __PAYLOAD__
end

1
targets/amd/serengeti_cheetah/Config-lab.lb
View File

@@ -13,7 +13,6 @@ option CONFIG_FAILOVER_SIZE=0
romimage "fallback"
option CONFIG_PRECOMPRESSED_PAYLOAD=1
option CONFIG_COMPRESSED_PAYLOAD_LZMA=1
option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE
option CONFIG_USE_FALLBACK_IMAGE=1
option CONFIG_ROM_IMAGE_SIZE=0x1a000
option CONFIG_XIP_ROM_SIZE=0x40000

1
targets/amd/serengeti_cheetah_fam10/Config-lab.lb
View File

@@ -31,7 +31,6 @@ mainboard amd/serengeti_cheetah_fam10
# 1024KB ROM
option CONFIG_ROM_SIZE=1024*1024
option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE-CONFIG_FAILOVER_SIZE
romimage "fallback"
option CONFIG_USE_FAILOVER_IMAGE=0

7
targets/arima/hdama/Config.kernelimage.lb
View File

@@ -13,7 +13,6 @@ uses CONFIG_ROM_PAYLOAD
uses CONFIG_ROM_PAYLOAD_START
uses CONFIG_UDELAY_TSC
uses CPU_FIXUP
uses CONFIG_FALLBACK_SIZE
uses CONFIG_HAVE_FALLBACK_BOOT
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_HAVE_PIRQ_TABLE
@@ -71,12 +70,6 @@ option CONFIG_HAVE_OPTION_TABLE=1
option CONFIG_ROM_PAYLOAD=1
option CONFIG_HAVE_FALLBACK_BOOT=1
###
### Compute the location and size of where this firmware image
### (coreboot plus bootloader) will live in the boot rom chip.
###
option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE
## Coreboot C code runs at this location in RAM
option CONFIG_RAMBASE=0x00004000

2
targets/artecgroup/dbe61/Config.lb
View File

@@ -21,8 +21,6 @@ option CONFIG_ROM_SIZE = 1024*512 - 36*1024
## not including any payload.
option CONFIG_ROM_IMAGE_SIZE=64*1024
option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE
option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9
option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
romimage "fallback"

1
targets/asi/mb_5blmp/Config.lb
View File

@@ -23,7 +23,6 @@ mainboard asi/mb_5blmp
option CONFIG_ROM_SIZE = (256 * 1024)
# option CONFIG_ROM_SIZE = (256 * 1024) - (32 * 1024)
# option CONFIG_FALLBACK_SIZE = (256 * 1024) - (32 * 1024)
romimage "normal"
option CONFIG_USE_FALLBACK_IMAGE = 0

2
targets/asus/a8n_e/Config-abuild.lb
View File

@@ -13,7 +13,6 @@ __LOGLEVEL__
romimage "normal"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=0
option CONFIG_ROM_IMAGE_SIZE=0x20000
option COREBOOT_EXTRA_VERSION=".0-normal"
payload __PAYLOAD__
end
@@ -21,7 +20,6 @@ end
romimage "fallback"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=1
option CONFIG_ROM_IMAGE_SIZE=0x20000
option COREBOOT_EXTRA_VERSION=".0-fallback"
payload __PAYLOAD__
end

9
targets/asus/m2v-mx_se/Config-abuild.lb
View File

@@ -35,15 +35,6 @@ option CONFIG_ROM_SIZE = 512 * 1024
## CONFIG_ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image,
## not including any payload.
# Please note that 128KB is cached for (XIP) too
option CONFIG_ROM_IMAGE_SIZE = 128 * 1024
## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image
## (including payload) will use.
option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE
romimage "fallback"
option CONFIG_USE_FALLBACK_IMAGE=1
payload __PAYLOAD__

5
targets/asus/m2v-mx_se/Config.lb
View File

@@ -41,11 +41,6 @@ option CONFIG_ROM_SIZE = 512 * 1024
option CONFIG_ROM_IMAGE_SIZE = 128 * 1024
## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image
## (including payload) will use.
option CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE
romimage "fallback"
option CONFIG_USE_FALLBACK_IMAGE=1
payload ../payload.elf

2
targets/digitallogic/msm586seg/Config-abuild.lb
View File

@@ -9,9 +9,7 @@ __COMPRESSION__
__LOGLEVEL__
romimage "fallback"
option CONFIG_FALLBACK_SIZE = 256 * 1024
option CONFIG_USE_FALLBACK_IMAGE=1
option CONFIG_ROM_IMAGE_SIZE= 128 * 1024
option COREBOOT_EXTRA_VERSION=".0Fallback"
payload __PAYLOAD__
end

4
targets/gigabyte/ga_2761gxdk/Config-abuild.lb
View File

@@ -34,8 +34,6 @@ option CONFIG_ROM_SIZE = 512*1024
romimage "normal"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=0
option CONFIG_ROM_IMAGE_SIZE=0x28000
option CONFIG_XIP_ROM_SIZE=0x40000
option COREBOOT_EXTRA_VERSION=".0-Normal"
payload __PAYLOAD__
end
@@ -43,8 +41,6 @@ end
romimage "fallback"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=1
option CONFIG_ROM_IMAGE_SIZE=0x20000
option CONFIG_XIP_ROM_SIZE=0x40000
option COREBOOT_EXTRA_VERSION=".0-Fallback"
payload __PAYLOAD__
end

2
targets/gigabyte/m57sli/Config-abuild.lb
View File

@@ -13,7 +13,6 @@ __LOGLEVEL__
romimage "normal"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=0
option CONFIG_ROM_IMAGE_SIZE=0x20000
option COREBOOT_EXTRA_VERSION=".0-normal"
payload __PAYLOAD__
end
@@ -21,7 +20,6 @@ end
romimage "fallback"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=1
option CONFIG_ROM_IMAGE_SIZE=0x20000
option COREBOOT_EXTRA_VERSION=".0-fallback"
payload __PAYLOAD__
end

7
targets/iei/juki-511p/Config-abuild.lb
View File

@@ -9,22 +9,15 @@ __COMPRESSION__
__LOGLEVEL__
option CONFIG_ROM_SIZE=256*1024
###
### Compute the location and size of where this firmware image
### (coreboot plus bootloader) will live in the boot rom chip.
###
option CONFIG_FALLBACK_SIZE=128*1024
romimage "normal"
option CONFIG_USE_FALLBACK_IMAGE=0
option CONFIG_ROM_IMAGE_SIZE=64*1024
option COREBOOT_EXTRA_VERSION=".0-Normal"
payload __PAYLOAD__
end
romimage "fallback"
option CONFIG_USE_FALLBACK_IMAGE=1
option CONFIG_ROM_IMAGE_SIZE=64*1024
option COREBOOT_EXTRA_VERSION=".0-Fallback"
payload __PAYLOAD__
end

2
targets/iwill/dk8_htx/Config-abuild.lb
View File

@@ -13,7 +13,6 @@ __LOGLEVEL__
romimage "normal"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=0
option CONFIG_ROM_IMAGE_SIZE=0x20000
option COREBOOT_EXTRA_VERSION=".0-normal"
payload __PAYLOAD__
end
@@ -21,7 +20,6 @@ end
romimage "fallback"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=1
option CONFIG_ROM_IMAGE_SIZE=0x20000
option COREBOOT_EXTRA_VERSION=".0-fallback"
payload __PAYLOAD__
end

2
targets/msi/ms7135/Config-abuild.lb
View File

@@ -13,7 +13,6 @@ __LOGLEVEL__
romimage "normal"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=0
option CONFIG_ROM_IMAGE_SIZE=0x20000
option COREBOOT_EXTRA_VERSION=".0-normal"
payload __PAYLOAD__
end
@@ -21,7 +20,6 @@ end
romimage "fallback"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=1
option CONFIG_ROM_IMAGE_SIZE=0x20000
option COREBOOT_EXTRA_VERSION=".0-fallback"
payload __PAYLOAD__
end

4
targets/msi/ms7260/Config-abuild.lb
View File

@@ -31,8 +31,6 @@ __LOGLEVEL__
romimage "normal"
option CONFIG_USE_FAILOVER_IMAGE = 0
option CONFIG_USE_FALLBACK_IMAGE = 0
option CONFIG_ROM_IMAGE_SIZE = 128 * 1024
option CONFIG_XIP_ROM_SIZE = 256 * 1024
option COREBOOT_EXTRA_VERSION = ".0Normal"
payload __PAYLOAD__
end
@@ -40,8 +38,6 @@ end
romimage "fallback"
option CONFIG_USE_FAILOVER_IMAGE = 0
option CONFIG_USE_FALLBACK_IMAGE = 1
option CONFIG_ROM_IMAGE_SIZE = 128 * 1024
option CONFIG_XIP_ROM_SIZE = 256 * 1024
option COREBOOT_EXTRA_VERSION = ".0Fallback"
payload __PAYLOAD__
end

2
targets/nvidia/l1_2pvv/Config-abuild.lb
View File

@@ -13,7 +13,6 @@ __LOGLEVEL__
romimage "normal"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=0
option CONFIG_ROM_IMAGE_SIZE=0x20000
option COREBOOT_EXTRA_VERSION=".0-normal"
payload __PAYLOAD__
end
@@ -21,7 +20,6 @@ end
romimage "fallback"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=1
option CONFIG_ROM_IMAGE_SIZE=0x20000
option COREBOOT_EXTRA_VERSION=".0-fallback"
payload __PAYLOAD__
end

2
targets/supermicro/h8dme/Config-abuild.lb
View File

@@ -13,7 +13,6 @@ __LOGLEVEL__
romimage "normal"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=0
option CONFIG_ROM_IMAGE_SIZE=0x20000
option COREBOOT_EXTRA_VERSION=".0-normal"
payload __PAYLOAD__
end
@@ -21,7 +20,6 @@ end
romimage "fallback"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=1
option CONFIG_ROM_IMAGE_SIZE=0x20000
option COREBOOT_EXTRA_VERSION=".0-fallback"
payload __PAYLOAD__
end

2
targets/technologic/ts5300/Config-abuild.lb
View File

@@ -9,9 +9,7 @@ __COMPRESSION__
__LOGLEVEL__
romimage "fallback"
option CONFIG_FALLBACK_SIZE = 256 * 1024
option CONFIG_USE_FALLBACK_IMAGE=1
option CONFIG_ROM_IMAGE_SIZE=128 * 1024 # 0x10000
option COREBOOT_EXTRA_VERSION=".0-Fallback"
payload __PAYLOAD__
end

2
targets/tyan/s2895/Config-abuild.lb
View File

@@ -13,7 +13,6 @@ __LOGLEVEL__
romimage "normal"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=0
option CONFIG_ROM_IMAGE_SIZE=0x20000
option COREBOOT_EXTRA_VERSION=".0-normal"
payload __PAYLOAD__
end
@@ -21,7 +20,6 @@ end
romimage "fallback"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=1
option CONFIG_ROM_IMAGE_SIZE=0x20000
option COREBOOT_EXTRA_VERSION=".0-fallback"
payload __PAYLOAD__
end

2
targets/tyan/s2912/Config-abuild.lb
View File

@@ -13,7 +13,6 @@ __LOGLEVEL__
romimage "normal"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=0
option CONFIG_ROM_IMAGE_SIZE=0x20000
option COREBOOT_EXTRA_VERSION=".0-normal"
payload __PAYLOAD__
end
@@ -21,7 +20,6 @@ end
romimage "fallback"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=1
option CONFIG_ROM_IMAGE_SIZE=0x20000
option COREBOOT_EXTRA_VERSION=".0-fallback"
payload __PAYLOAD__
end

4
targets/tyan/s2912_fam10/Config-abuild.lb
View File

@@ -31,8 +31,6 @@ __LOGLEVEL__
romimage "normal"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=0
option CONFIG_ROM_IMAGE_SIZE=0x34000
option CONFIG_XIP_ROM_SIZE=0x40000
option COREBOOT_EXTRA_VERSION=".0-Normal"
payload __PAYLOAD__
end
@@ -40,8 +38,6 @@ end
romimage "fallback"
option CONFIG_USE_FAILOVER_IMAGE=0
option CONFIG_USE_FALLBACK_IMAGE=1
option CONFIG_ROM_IMAGE_SIZE=0x34000
option CONFIG_XIP_ROM_SIZE=0x40000
option COREBOOT_EXTRA_VERSION=".0-Fallback"
payload __PAYLOAD__
end