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* Set USBDEBUG_DEFAULT_PORT in all southbridges and use that value

Browse Source 
to unify calls to *_enable_usbdebug()
* rename *_enable_usbdebug() to enable_usbdebug()
* move enable_usbdebug() to generic romstage console init code
  and drop it from the individual romstage.c files.

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Peter Stuge <peter@stuge.se>

 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6513 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
2011-04-18 23:51:12 +00:00
committed by Stefan Reinauer
parent 261f842c1c
commit b3ae1867d1
49 changed files with 33 additions and 174 deletions
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4
src/southbridge/amd/sb600/Kconfig
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@@ -36,6 +36,10 @@ config EHCI_DEBUG_OFFSET
hex
default 0xe0
config USBDEBUG_DEFAULT_PORT
int
default 0
choice
prompt "SATA Mode"
default SATA_MODE_IDE

2
src/southbridge/amd/sb600/enable_usbdebug.c
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@@ -30,7 +30,7 @@ void set_debug_port(unsigned int port)
/* TODO: Allow changing the physical USB port used as Debug Port. */
}
void sb600_enable_usbdebug(unsigned int port)
void enable_usbdebug(unsigned int port)
{
device_t dev = PCI_DEV(0, 0x13, 5); /* USB EHCI, D19:F5 */

2
src/southbridge/amd/sb600/sb600.h
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@@ -40,5 +40,5 @@ void sb600_enable(device_t dev);
void sb600_lpc_port80(void);
void sb600_pci_port80(void);
void sb600_enable_usbdebug(unsigned int port);
void enable_usbdebug(unsigned int port);
#endif /* SB600_H */

2
src/southbridge/amd/sb700/enable_usbdebug.c
View File

@@ -45,7 +45,7 @@ void set_debug_port(unsigned int port)
* This code currently only supports the first one, i.e., USB Debug devices
* attached to physical USB ports belonging to the first EHCI device.
*/
void sb7xx_51xx_enable_usbdebug(unsigned int port)
void enable_usbdebug(unsigned int port)
{
device_t dev = PCI_DEV(0, 0x12, 2); /* USB EHCI, D18:F2 */

2
src/southbridge/amd/sb700/sb700.h
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@@ -75,5 +75,5 @@ void sb7xx_51xx_setup_sata_phys(struct device *dev);
int s3_save_nvram_early(u32 dword, int size, int nvram_pos);
int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
void sb7xx_51xx_enable_usbdebug(unsigned int port);
void enable_usbdebug(unsigned int port);
#endif /* SB700_H */

2
src/southbridge/amd/sb800/enable_usbdebug.c
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@@ -43,7 +43,7 @@ void set_debug_port(unsigned int port)
}
void sb800_enable_usbdebug(unsigned int port)
void enable_usbdebug(unsigned int port)
{
pci_write_config32(PCI_DEV(0, SB800_DEVN_BASE + 0x13, 5),
EHCI_BAR_INDEX, CONFIG_EHCI_BAR);

2
src/southbridge/amd/sb800/sb800.h
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@@ -58,7 +58,7 @@ void sb800_clk_output_48Mhz(void);
int s3_save_nvram_early(u32 dword, int size, int nvram_pos);
int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
void sb800_enable_usbdebug(unsigned int port);
void enable_usbdebug(unsigned int port);
#else
void sb800_enable(device_t dev);
void __attribute__((weak)) sb800_setup_sata_phys(struct device *dev);