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* Set USBDEBUG_DEFAULT_PORT in all southbridges and use that value

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to unify calls to *_enable_usbdebug()
* rename *_enable_usbdebug() to enable_usbdebug()
* move enable_usbdebug() to generic romstage console init code
  and drop it from the individual romstage.c files.

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Peter Stuge <peter@stuge.se>

 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6513 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
2011-04-18 23:51:12 +00:00
committed by Stefan Reinauer
parent 261f842c1c
commit b3ae1867d1
49 changed files with 33 additions and 174 deletions
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12
src/southbridge/intel/i82801gx/Kconfig
View File

@@ -24,11 +24,19 @@ config SOUTHBRIDGE_INTEL_I82801GX
select HAVE_USBDEBUG
select USE_WATCHDOG_ON_BOOT
if SOUTHBRIDGE_INTEL_I82801GX
config EHCI_BAR
hex
default 0xfef00000 if SOUTHBRIDGE_INTEL_I82801GX
default 0xfef00000
config EHCI_DEBUG_OFFSET
hex
default 0xa0 if SOUTHBRIDGE_INTEL_I82801GX
default 0xa0
config USBDEBUG_DEFAULT_PORT
int
default 1
endif

2
src/southbridge/intel/i82801gx/i82801gx.h
View File

@@ -46,7 +46,7 @@ extern void i82801gx_enable(device_t dev);
void enable_smbus(void);
int smbus_read_byte(unsigned device, unsigned address);
#endif
void i82801gx_enable_usbdebug(unsigned int port);
void enable_usbdebug(unsigned int port);
#endif
#define MAINBOARD_POWER_OFF 0

2
src/southbridge/intel/i82801gx/usb_debug.c
View File

@@ -31,7 +31,7 @@ void set_debug_port(unsigned int port)
/* Not needed, the ICH* southbridges hardcode physical USB port 1. */
}
void i82801gx_enable_usbdebug(unsigned int port)
void enable_usbdebug(unsigned int port)
{
u32 dbgctl;
device_t dev = PCI_DEV(0, 0x1d, 7); /* USB EHCI, D29:F7 */