diff --git a/src/mainboard/system76/tgl-u/variants/lemp10/overridetree.cb b/src/mainboard/system76/tgl-u/variants/lemp10/overridetree.cb
index da9d0fcce3..a2bef23bbe 100644
--- a/src/mainboard/system76/tgl-u/variants/lemp10/overridetree.cb
+++ b/src/mainboard/system76/tgl-u/variants/lemp10/overridetree.cb
@@ -22,6 +22,12 @@ chip soc/intel/tigerlake
 			# Despite the name, SSD2_CLKREQ# is used for SSD1
 			register "PcieClkSrcUsage[3]" = "0x40"
 			register "PcieClkSrcClkReq[3]" = "3"
+			chip soc/intel/common/block/pcie/rtd3
+				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C13)" # SSD1_PWR_DN#
+				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C22)" # GPP_C12_RTD3 (labeled incorrectly)
+				register "srcclk_pin" = "3" # SSD2_CLKREQ#
+				device generic 0 on end
+			end
 		end
 		device ref north_xhci on # J_TYPEC1
 			register "UsbTcPortEn" = "1"
@@ -135,7 +141,7 @@ chip soc/intel/tigerlake
 			chip soc/intel/common/block/pcie/rtd3
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # SSD2_PWR_DN#
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D9)" # GPP_D13_RTD3 (labeled incorrectly)
-				register "srcclk_pin" = "0"
+				register "srcclk_pin" = "0" # SSD1_CLKREQ#
 				device generic 0 on end
 			end
 		end