sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

veyron_pinky/rk3288: Use KHz, MHz and GHz constants

Browse Source 
Use the previously added frequency constants in patch
titled 'stddef: Add KHz, MHz and GHz constants'.

BUG=None
TEST=Compiled Veyron_Pinky.

Original-Change-Id: I4a1927fd423eb96d3f76f7e44b451192038b02e0
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/221800
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>

(cherry picked from commit 41bb8026818b4381d4a6d43d2d433c207c3971bc)
Signed-off-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: I37a610d57f1a3d44796bf80de5104c2b5b3f3dac
Reviewed-on: http://review.coreboot.org/9254
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Julius Werner
2014-10-06 13:41:28 -07:00
committed by Aaron Durbin
parent 46826c36bf
commit b6092b7e39
10 changed files with 41 additions and 42 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/mainboard/google/veyron_pinky/bootblock.c
View File

@@ -32,11 +32,11 @@ void bootblock_mainboard_init(void)
/* spi2 for firmware ROM */
writel(IOMUX_SPI2_CSCLK, &rk3288_grf->iomux_spi2csclk);
writel(IOMUX_SPI2_TXRX, &rk3288_grf->iomux_spi2txrx);
rockchip_spi_init(CONFIG_BOOT_MEDIA_SPI_BUS, 11000000);
rockchip_spi_init(CONFIG_BOOT_MEDIA_SPI_BUS, 11*MHz);
/* spi0 for chrome ec */
writel(IOMUX_SPI0, &rk3288_grf->iomux_spi0);
rockchip_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, 9000000);
rockchip_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, 9*MHz);
setup_chromeos_gpios();
}

2
src/mainboard/google/veyron_pinky/sdram_inf/sdram-ddr3-hynix-2GB.inc
View File

@@ -69,7 +69,7 @@
.noc_timing = 0x2891E41D,
.noc_activate = 0x5B6,
.ddrconfig = 3,
.ddr_freq = 533000000,
.ddr_freq = 533*MHz,
.dramtype = DDR3,
.num_channels = 2,
.stride = 9,

2
src/mainboard/google/veyron_pinky/sdram_inf/sdram-ddr3-samsung-2GB.inc
View File

@@ -70,7 +70,7 @@
.noc_timing = 0x30B25564,
.noc_activate = 0x627,
.ddrconfig = 3,
.ddr_freq = 666000000,
.ddr_freq = 666*MHz,
.dramtype = DDR3,
.num_channels = 2,
.stride = 9,

2
src/mainboard/google/veyron_pinky/sdram_inf/sdram-lpddr3-samsung-2GB.inc
View File

@@ -70,7 +70,7 @@
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
.ddrconfig = 2,
.ddr_freq = 533000000,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,
.stride = 9,