From b61bc7c68a54ec3c8701c1aebdf70ceac50c176b Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Sat, 25 Apr 2009 22:15:29 +0000 Subject: [PATCH] Enable CBFS for qemu and kontron. Both are builds-and-runs tested, incl. optionrom-in-cbfs for kontron, and compressed payloads for both. Signed-off-by: Patrick Georgi Acked-by: Myles Watson git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4212 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/emulation/qemu-x86/Options.lb | 2 +- src/mainboard/kontron/986lcd-m/Options.lb | 2 +- targets/kontron/986lcd-m/Config-abuild.lb | 9 ++++++--- 3 files changed, 8 insertions(+), 5 deletions(-) diff --git a/src/mainboard/emulation/qemu-x86/Options.lb b/src/mainboard/emulation/qemu-x86/Options.lb index 9628ebb256..70d127c1a3 100644 --- a/src/mainboard/emulation/qemu-x86/Options.lb +++ b/src/mainboard/emulation/qemu-x86/Options.lb @@ -50,7 +50,7 @@ uses CONFIG_CBFS default CONFIG_CONSOLE_SERIAL8250=1 default DEFAULT_CONSOLE_LOGLEVEL=8 default MAXIMUM_CONSOLE_LOGLEVEL=8 -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 ## ROM_SIZE is the size of boot ROM that this board will use. default ROM_SIZE = 256*1024 diff --git a/src/mainboard/kontron/986lcd-m/Options.lb b/src/mainboard/kontron/986lcd-m/Options.lb index 3d708b0e1c..1d04d0f516 100644 --- a/src/mainboard/kontron/986lcd-m/Options.lb +++ b/src/mainboard/kontron/986lcd-m/Options.lb @@ -327,7 +327,7 @@ default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" # # CBFS # -default CONFIG_CBFS=0 +default CONFIG_CBFS=1 ### End Options.lb end diff --git a/targets/kontron/986lcd-m/Config-abuild.lb b/targets/kontron/986lcd-m/Config-abuild.lb index 89171c3da7..d9011bdc4d 100644 --- a/targets/kontron/986lcd-m/Config-abuild.lb +++ b/targets/kontron/986lcd-m/Config-abuild.lb @@ -10,19 +10,22 @@ option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ -option ROM_SIZE=1024*(1024-64) +option ROM_SIZE=1024*1024 option FALLBACK_SIZE=1024*512 +# add optionroms with: +# coreboot-builds/kontron_986lcd-m/cbfstool coreboot-builds/kontron_986lcd-m/coreboot.rom add $pathto/pci8086,27a2.rom pci8086,27a2.rom 0x30 + romimage "normal" option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x19000 + option ROM_IMAGE_SIZE=0x1a000 option COREBOOT_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x19000 + option ROM_IMAGE_SIZE=0x1a000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end