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amd/mct/ddr3: Correctly configure CsMux67

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The existing logic to set up CsMux67 used an incorrect mask
and comparison value due to a copy + paste editing error.

Use the correct mask and comparison value for the last two
values.

Commit cf1cb5b2d4f528e7eab55ee9393cf72016bac888 did the same
for CsMux45 but missed this one.

Change-Id: Ib97ca89535b8291397d42eca69e217c21a9dd937
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/25994
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Patrick Georgi 2018-05-02 17:44:57 +02:00 committed by Patrick Georgi
parent 4f5bed5210
commit b6616ea636
1 changed files with 1 additions and 1 deletions
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2
src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
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@ -58,7 +58,7 @@ u32 mct_SetDramConfigMisc2(struct DCTStatStruc *pDCTstat,
if (((((f2x80 >> 4) & 0xf) == 0x7) || (((f2x80 >> 4) & 0xf) == 0x9)) if (((((f2x80 >> 4) & 0xf) == 0x7) || (((f2x80 >> 4) & 0xf) == 0x9))
&& ((f2x64 & 0x3) == 0x3)) && ((f2x64 & 0x3) == 0x3))
cs_mux_67 = 1; cs_mux_67 = 1;
else if (((((f2x80 >> 4) & 0xa) == 0x7) || (((f2x80 >> 4) & 0xb) == 0x9)) else if (((((f2x80 >> 4) & 0xf) == 0xa) || (((f2x80 >> 4) & 0xf) == 0xb))
&& ((f2x64 & 0x3) > 0x1)) && ((f2x64 & 0x3) > 0x1))
cs_mux_67 = 1; cs_mux_67 = 1;
else else