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soc/intel/icelake: Remove FSP-T option in Kconfig

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This code lacks the temp_ram_init_params sybols so the FSP-T option
fails to build.

Change-Id: I2b6278bd64a3579ed3460af39ea244c7dfd51da4
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36719
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Michael Niewöhner
This commit is contained in:
Arthur Heymans 2019-11-11 12:23:19 +01:00 committed by Patrick Georgi
parent cd3c3167df
commit b6768370d1
1 changed files with 2 additions and 26 deletions
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28
src/soc/intel/icelake/Kconfig
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@ -50,6 +50,8 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
select SOC_INTEL_COMMON_PCH_BASE select SOC_INTEL_COMMON_PCH_BASE
select SOC_INTEL_COMMON_RESET select SOC_INTEL_COMMON_RESET
select SOC_INTEL_COMMON_BLOCK_CAR
select INTEL_CAR_NEM_ENHANCED
select SSE2 select SSE2
select SUPPORT_CPU_UCODE_IN_CBFS select SUPPORT_CPU_UCODE_IN_CBFS
select TSC_MONOTONIC_TIMER select TSC_MONOTONIC_TIMER
@ -174,32 +176,6 @@ config CBFS_SIZE
hex hex
default 0x200000 default 0x200000
choice
prompt "Cache-as-ram implementation"
default USE_ICELAKE_CAR_NEM_ENHANCED
help
This option allows you to select how cache-as-ram (CAR) is set up.
config USE_ICELAKE_CAR_NEM_ENHANCED
bool "Enhanced Non-evict mode"
select SOC_INTEL_COMMON_BLOCK_CAR
select INTEL_CAR_NEM_ENHANCED
help
A current limitation of NEM (Non-Evict mode) is that code and data
sizes are derived from the requirement to not write out any modified
cache line. With NEM, if there is no physical memory behind the
cached area, the modified data will be lost and NEM results will be
inconsistent. ENHANCED NEM guarantees that modified data is always
kept in cache while clean data is replaced.
config USE_ICELAKE_FSP_CAR
bool "Use FSP CAR"
select FSP_CAR
help
Use FSP APIs to initialize and tear down the Cache-As-Ram.
endchoice
config FSP_HEADER_PATH config FSP_HEADER_PATH
string "Location of FSP headers" string "Location of FSP headers"
default "src/vendorcode/intel/fsp/fsp2_0/icelake/" default "src/vendorcode/intel/fsp/fsp2_0/icelake/"