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mb/google/guybrush: Enable S0i3

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BUG=b:185939089
TEST=Build and boot to OS in Guybrush. Enter S0i3 after passing the
sleep state configuration from the mainboard.

Change-Id: I4b23b014ca45bd09c76b626b73b0332586dec056
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52619
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Karthikeyan Ramasubramanian 2021-04-22 17:03:56 -06:00 committed by Patrick Georgi
parent 5ad85d95cd
commit b6a4476f34
1 changed files with 3 additions and 0 deletions
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3
src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
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@ -38,6 +38,9 @@ chip soc/amd/cezanne
.vw_irq_polarity = ESPI_VW_IRQ_LEVEL_HIGH(1),
}"
# Enable S0i3 support
register "s0ix_enable" = "1"
register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL |
GPIO_I2C2_SCL | GPIO_I2C3_SCL"