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start of epia-m port

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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1524 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Greg Watson
2004-04-22 22:31:49 +00:00
parent d9dfed56e6
commit b717e48352
7 changed files with 140 additions and 50 deletions
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9
src/mainboard/via/epia-m/auto.c
View File

@@ -2,6 +2,7 @@
#include <stdint.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <cpu/p6/apic.h>
#include <arch/io.h>
#include <device/pnp_def.h>
@@ -26,10 +27,10 @@ void udelay(int usecs)
#include "cpu/p6/boot_cpu.c"
#include "debug.c"
#include "southbridge/via/vt8231/vt8235_early_smbus.c"
#include "southbridge/via/vt8235/vt8235_early_smbus.c"
#include "southbridge/via/vt8231/vt8235_early_serial.c"
#include "southbridge/via/vt8235/vt8235_early_serial.c"
static void memreset_setup(void)
{
}
@@ -58,7 +59,7 @@ static void enable_mainboard_devices(void)
device_t dev;
/* dev 0 for southbridge */
dev = pci_locate_device(PCI_ID(0x1106,0x8235), 0);
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235), 0);
if (dev == PCI_DEV_INVALID) {
die("Southbridge not found!!!\n");
@@ -99,13 +100,13 @@ static void main(void)
/* init_timer();*/
outb(5, 0x80);
enable_smbus();
enable_vt8235_serial();
uart_init();
console_init();
enable_mainboard_devices();
enable_smbus();
enable_shadow_ram();
/*
memreset_setup();

4
src/mainboard/via/epia-m/chip.h
View File

@@ -1,5 +1,5 @@
struct chip_control mainboard_via_epia_control;
struct chip_control mainboard_via_epia_m_control;
struct mainboard_via_epia_config {
struct mainboard_via_epia_m_config {
int nothing;
};

74
src/mainboard/via/epia-m/cmos.layout Normal file
View File

@@ -0,0 +1,74 @@
entries
#start-bit length config config-ID name
#0 8 r 0 seconds
#8 8 r 0 alarm_seconds
#16 8 r 0 minutes
#24 8 r 0 alarm_minutes
#32 8 r 0 hours
#40 8 r 0 alarm_hours
#48 8 r 0 day_of_week
#56 8 r 0 day_of_month
#64 8 r 0 month
#72 8 r 0 year
#80 4 r 0 rate_select
#84 3 r 0 REF_Clock
#87 1 r 0 UIP
#88 1 r 0 auto_switch_DST
#89 1 r 0 24_hour_mode
#90 1 r 0 binary_values_enable
#91 1 r 0 square-wave_out_enable
#92 1 r 0 update_finished_enable
#93 1 r 0 alarm_interrupt_enable
#94 1 r 0 periodic_interrupt_enable
#95 1 r 0 disable_clock_updates
#96 288 r 0 temporary_filler
0 384 r 0 reserved_memory
384 1 e 4 boot_option
385 1 e 4 last_boot
386 1 e 1 ECC_memory
388 4 r 0 reboot_bits
392 3 e 5 baud_rate
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
420 4 e 7 boot_second
424 4 e 7 boot_third
428 4 h 0 boot_index
432 8 h 0 boot_countdown
1008 16 h 0 check_sum
enumerations
#ID value text
1 0 Disable
1 1 Enable
2 0 Enable
2 1 Disable
4 0 Fallback
4 1 Normal
5 0 115200
5 1 57600
5 2 38400
5 3 19200
5 4 9600
5 5 4800
5 6 2400
5 7 1200
6 6 Notice
6 7 Info
6 8 Debug
6 9 Spew
7 0 Network
7 1 HDD
7 2 Floppy
7 8 Fallback_Network
7 9 Fallback_HDD
7 10 Fallback_Floppy
#7 3 ROM
checksums
checksum 392 1007 1008