sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Use interleaved DQ for gaze18-40x0, remove rcomp resistor setting

Browse Source 
Change-Id: I9e527774c0ea08c7079c9722fa91f3876d23475e
This commit is contained in:
Jeremy Soller
2023-02-08 08:15:03 -07:00
parent 17db22596e
commit b787eb1e16
1 changed files with 3 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/mainboard/system76/rpl/variants/gaze18-40x0/romstage.c
View File

@ -9,9 +9,11 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
{ {
const struct mb_cfg board_cfg = { const struct mb_cfg board_cfg = {
.type = MEM_TYPE_DDR5, .type = MEM_TYPE_DDR5,
.rcomp = { .resistor = 100, },
.ect = true, .ect = true,
.LpDdrDqDqsReTraining = 1, .LpDdrDqDqsReTraining = 1,
.ddr_config = {
.dq_pins_interleaved = true,
},
}; };
const struct mem_spd spd_info = { const struct mem_spd spd_info = {
.topo = MEM_TOPO_DIMM_MODULE, .topo = MEM_TOPO_DIMM_MODULE,