intel SMI handlers: Refactor GPI SMI/SCI routing
Move the GPI interrupt routing selection between SMI/SCI from mainboards to southbridge. There is speculation if this is all just legacy APM stuff that could be removed with a followup. Change-Id: Iab14cf347584513793f417febc47f0559e17f5a5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Signed-off-by: Nicolas Reinecke <nr@das-labor.org> Reviewed-on: http://review.coreboot.org/7967 Tested-by: build bot (Jenkins) Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
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@@ -69,15 +69,7 @@ static int mainboard_finalized = 0;
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int mainboard_smi_apmc(u8 data)
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{
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u16 pmbase = pci_read_config16(PCI_DEV(0, 0x1f, 0), 0x40) & 0xfffc;
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u8 tmp;
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printk(BIOS_DEBUG, "%s: pmbase %04X, data %02X\n", __func__, pmbase,
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data);
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if (!pmbase)
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return 0;
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switch (data) {
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case APM_CNT_FINALIZE:
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printk(BIOS_DEBUG, "APMC: FINALIZE\n");
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