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soc/amd/common/graphics: Factor out FSP graphics init

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Factor out the FSP-dependent graphics init call and header into a
separate file, so that the common graphics init can be used by non-FSP
platforms (eg Stoneyridge) without any preprocessor guards.

TEST=build google/skyrim

Change-Id: Ib025ad3adec0945b4454892d78c30b4cc79e57a0
Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78599
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Matt DeVillier
2023-10-23 10:10:50 -05:00
parent ded5a601b5
commit b92148390c
4 changed files with 34 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
src/soc/amd/common/block/graphics/graphics.c
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@@ -2,14 +2,15 @@
#include <acpi/acpi_device.h> #include <acpi/acpi_device.h>
#include <acpi/acpigen.h> #include <acpi/acpigen.h>
#include <amdblocks/graphics.h>
#include <amdblocks/vbios_cache.h> #include <amdblocks/vbios_cache.h>
#include <boot/coreboot_tables.h> #include <boot/coreboot_tables.h>
#include <bootmode.h> #include <bootmode.h>
#include <bootstate.h> #include <bootstate.h>
#include <console/console.h> #include <console/console.h>
#include <device/device.h>
#include <device/pci.h> #include <device/pci.h>
#include <fmap.h> #include <fmap.h>
#include <fsp/graphics.h>
#include <security/vboot/vbios_cache_hash_tpm.h> #include <security/vboot/vbios_cache_hash_tpm.h>
#include <soc/intel/common/vbt.h> #include <soc/intel/common/vbt.h>
#include <timestamp.h> #include <timestamp.h>
@@ -177,15 +178,8 @@ static void graphics_set_resources(struct device *const dev)
static void graphics_dev_init(struct device *const dev) static void graphics_dev_init(struct device *const dev)
{ {
if (CONFIG(RUN_FSP_GOP)) { if (CONFIG(RUN_FSP_GOP))
struct resource *res = probe_resource(dev, PCI_BASE_ADDRESS_0); fsp_graphics_init(dev);
if (res && res->base)
fsp_report_framebuffer_info(res->base, LB_FB_ORIENTATION_NORMAL);
else
printk(BIOS_ERR, "%s: Unable to find resource for %s\n",
__func__, dev_path(dev));
}
/* Initialize PCI device, load/execute BIOS Option ROM */ /* Initialize PCI device, load/execute BIOS Option ROM */
pci_dev_init(dev); pci_dev_init(dev);

10
src/soc/amd/common/block/include/amdblocks/graphics.h Normal file
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@@ -0,0 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef AMD_BLOCK_GRAPHICS_H
#define AMD_BLOCK_GRAPHICS_H
#include <device/device.h>
void fsp_graphics_init(struct device *const dev);
#endif /* AMD_BLOCK_GRAPHICS_H */

1
src/soc/amd/common/fsp/Makefile.inc
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@@ -3,6 +3,7 @@ ifeq ($(CONFIG_PLATFORM_USES_FSP2_0),y)
romstage-y += fsp_memmap.c romstage-y += fsp_memmap.c
romstage-y += fsp_reset.c romstage-y += fsp_reset.c
romstage-y += fsp_validate.c romstage-y += fsp_validate.c
ramstage-y += fsp_graphics.c
ramstage-y += fsp_memmap.c ramstage-y += fsp_memmap.c
ramstage-y += fsp_report_resources.c ramstage-y += fsp_report_resources.c
ramstage-y += fsp_reset.c ramstage-y += fsp_reset.c

19
src/soc/amd/common/fsp/fsp_graphics.c Normal file
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@@ -0,0 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <amdblocks/graphics.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/resource.h>
#include <fsp/graphics.h>
void fsp_graphics_init(struct device *const dev)
{
struct resource *res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (res && res->base)
fsp_report_framebuffer_info(res->base, LB_FB_ORIENTATION_NORMAL);
else
printk(BIOS_ERR, "%s: Unable to find resource for %s\n",
__func__, dev_path(dev));
}