mb/lenovo/haswell: Enable VBOOT_VBNV_FLASH
To deprecate VBOOT_VBNV_CMOS [1], replace VBOOT_VBNV_CMOS with
VBOOT_VBNV_FLASH for Haswell.
Currently BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES is selected for
CPU_INTEL_HASWELL (see [2]). However, there seems to be no
particular reason on those platforms. Flashconsole works on Broadwell,
at least, and it writes to flash as early as bootblock. Therefore,
remove BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES, so that VBOOT_VBNV_FLASH
can be enabled.
[1] https://issuetracker.google.com/issues/235293589
[2] commit 6c2568f4f5 (CB:45740)
    drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES config
BUG=b:235293589
TEST=./util/abuild/abuild -t LENOVO_THINKPAD_T440P -a (with VBOOT)
Change-Id: If1430ffd6115a0bc151cbe0632cda7fc5f6c26a6
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67540
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
			
			
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			@@ -7,7 +7,6 @@ if CPU_INTEL_HASWELL
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config CPU_SPECIFIC_OPTIONS
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	def_bool y
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	select ARCH_X86
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	select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
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	select MMX
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	select SSE2
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	select UDELAY_TSC
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@@ -35,7 +35,7 @@ config VBOOT
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	select GBB_FLAG_DISABLE_LID_SHUTDOWN
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	select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC
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	select HAS_RECOVERY_MRC_CACHE
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	select VBOOT_VBNV_CMOS
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	select VBOOT_VBNV_FLASH
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config VBOOT_SLOTS_RW_AB
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	default y
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@@ -19,8 +19,9 @@ FLASH@0xff400000 0xc00000 {
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			RECOVERY_MRC_CACHE@0x0 0x10000
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			RW_MRC_CACHE@0x10000 0x10000
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		}
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		RW_NVRAM(PRESERVE) 0x2000
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		RW_VPD(PRESERVE) 0x1000
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		SMMSTORE(PRESERVE)@0x521000 0x40000
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		SMMSTORE(PRESERVE)@0x523000 0x40000
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		WP_RO {
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			FMAP 0x800
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