soc/intel: Drop unused lpss functions
This change drops the following unused lpss functions and related code: * soc_lpss_controllers_list * is_dev_lpss These functions were added to determine if a controller is LPSS for performing IRQ configuration. But, these never got used and hence are being dropped. Change-Id: I27bdfbca7c199e823a0e4fdb277e3f22fb6bae7a Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55226 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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@ -67,22 +67,6 @@ static void parse_devicetree(FSP_S_CONFIG *params)
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params->SerialIoUartMode[i] = config->SerialIoUartMode[i];
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params->SerialIoUartMode[i] = config->SerialIoUartMode[i];
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}
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}
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static const pci_devfn_t serial_io_dev[] = {
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PCH_DEVFN_I2C0,
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PCH_DEVFN_I2C1,
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PCH_DEVFN_I2C2,
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PCH_DEVFN_I2C3,
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PCH_DEVFN_I2C4,
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PCH_DEVFN_I2C5,
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PCH_DEVFN_GSPI0,
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PCH_DEVFN_GSPI1,
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PCH_DEVFN_GSPI2,
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PCH_DEVFN_GSPI3,
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PCH_DEVFN_UART0,
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PCH_DEVFN_UART1,
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PCH_DEVFN_UART2
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};
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__weak void mainboard_update_soc_chip_config(struct soc_intel_alderlake_config *config)
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__weak void mainboard_update_soc_chip_config(struct soc_intel_alderlake_config *config)
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{
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{
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/* Override settings per board. */
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/* Override settings per board. */
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@ -334,10 +318,3 @@ __weak void mainboard_silicon_init_params(FSP_S_CONFIG *params)
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{
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{
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printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
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printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
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}
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}
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/* Return list of SOC LPSS controllers */
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const pci_devfn_t *soc_lpss_controllers_list(size_t *size)
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{
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*size = ARRAY_SIZE(serial_io_dev);
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return serial_io_dev;
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}
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@ -572,13 +572,6 @@ __weak void mainboard_silicon_init_params(FSPS_UPD *supd)
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printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
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printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
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}
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}
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/* Return list of SOC LPSS controllers */
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const pci_devfn_t *soc_lpss_controllers_list(size_t *size)
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{
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*size = ARRAY_SIZE(serial_io_dev);
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return serial_io_dev;
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}
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/* Handle FSP logo params */
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/* Handle FSP logo params */
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void soc_load_logo(FSPS_UPD *supd)
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void soc_load_logo(FSPS_UPD *supd)
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{
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{
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@ -27,13 +27,4 @@ bool lpss_is_controller_in_reset(uintptr_t base);
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/* Set controller power state to D0 or D3*/
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/* Set controller power state to D0 or D3*/
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void lpss_set_power_state(pci_devfn_t devfn, enum lpss_pwr_state state);
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void lpss_set_power_state(pci_devfn_t devfn, enum lpss_pwr_state state);
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/*
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* Handler to get list of LPSS controllers. The SOC is expected to send out a
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* list of pci devfn for all LPSS controllers supported by the SOC.
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*/
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const pci_devfn_t *soc_lpss_controllers_list(size_t *size);
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/* Check if the device is a LPSS controller */
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bool is_dev_lpss(const struct device *dev);
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#endif /* SOC_INTEL_COMMON_BLOCK_LPSS_H */
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#endif /* SOC_INTEL_COMMON_BLOCK_LPSS_H */
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@ -72,21 +72,3 @@ void lpss_set_power_state(pci_devfn_t devfn, enum lpss_pwr_state state)
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reg8 |= state;
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reg8 |= state;
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pci_s_write_config8(devfn, PME_CTRL_STATUS, reg8);
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pci_s_write_config8(devfn, PME_CTRL_STATUS, reg8);
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}
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}
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bool is_dev_lpss(const struct device *dev)
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{
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static size_t size;
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static const pci_devfn_t *lpss_devices;
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if (dev->path.type != DEVICE_PATH_PCI)
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return false;
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if (!lpss_devices)
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lpss_devices = soc_lpss_controllers_list(&size);
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for (int i = 0; i < size; i++) {
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if (lpss_devices[i] == dev->path.pci.devfn)
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return true;
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}
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return false;
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}
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@ -41,23 +41,6 @@ static int get_l1_substate_control(enum L1_substates_control ctl)
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return ctl - 1;
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return ctl - 1;
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}
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}
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static const pci_devfn_t serial_io_dev[] = {
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PCH_DEVFN_I2C0,
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PCH_DEVFN_I2C1,
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PCH_DEVFN_I2C2,
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PCH_DEVFN_I2C3,
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PCH_DEVFN_I2C4,
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PCH_DEVFN_I2C5,
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PCH_DEVFN_I2C6,
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PCH_DEVFN_I2C7,
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PCH_DEVFN_GSPI0,
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PCH_DEVFN_GSPI1,
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PCH_DEVFN_GSPI2,
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PCH_DEVFN_UART0,
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PCH_DEVFN_UART1,
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PCH_DEVFN_UART2
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};
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static void parse_devicetree(FSP_S_CONFIG *params)
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static void parse_devicetree(FSP_S_CONFIG *params)
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{
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{
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const struct soc_intel_elkhartlake_config *config = config_of_soc();
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const struct soc_intel_elkhartlake_config *config = config_of_soc();
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@ -287,10 +270,3 @@ __weak void mainboard_silicon_init_params(FSP_S_CONFIG *params)
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{
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{
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printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
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printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
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}
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}
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/* Return list of SOC LPSS controllers */
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const pci_devfn_t *soc_lpss_controllers_list(size_t *size)
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{
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*size = ARRAY_SIZE(serial_io_dev);
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return serial_io_dev;
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}
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@ -33,21 +33,6 @@ static void parse_devicetree(FSP_S_CONFIG *params)
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params->SerialIoUartMode[i] = config->SerialIoUartMode[i];
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params->SerialIoUartMode[i] = config->SerialIoUartMode[i];
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}
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}
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static const pci_devfn_t serial_io_dev[] = {
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PCH_DEVFN_I2C0,
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PCH_DEVFN_I2C1,
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PCH_DEVFN_I2C2,
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PCH_DEVFN_I2C3,
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PCH_DEVFN_I2C4,
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PCH_DEVFN_I2C5,
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PCH_DEVFN_GSPI0,
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PCH_DEVFN_GSPI1,
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PCH_DEVFN_GSPI2,
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PCH_DEVFN_UART0,
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PCH_DEVFN_UART1,
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PCH_DEVFN_UART2
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};
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/* UPD parameters to be initialized before SiliconInit */
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/* UPD parameters to be initialized before SiliconInit */
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void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
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void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
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{
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{
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@ -223,10 +208,3 @@ __weak void mainboard_silicon_init_params(FSP_S_CONFIG *params)
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{
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{
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printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
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printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
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}
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}
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/* Return list of SOC LPSS controllers */
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const pci_devfn_t *soc_lpss_controllers_list(size_t *size)
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{
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*size = ARRAY_SIZE(serial_io_dev);
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return serial_io_dev;
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}
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@ -28,21 +28,6 @@ enum {
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EOP_DXE,
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EOP_DXE,
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} EndOfPost;
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} EndOfPost;
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static const pci_devfn_t serial_io_dev[] = {
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PCH_DEVFN_I2C0,
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PCH_DEVFN_I2C1,
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PCH_DEVFN_I2C2,
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PCH_DEVFN_I2C3,
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PCH_DEVFN_I2C4,
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PCH_DEVFN_I2C5,
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PCH_DEVFN_GSPI0,
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PCH_DEVFN_GSPI1,
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PCH_DEVFN_GSPI2,
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PCH_DEVFN_UART0,
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PCH_DEVFN_UART1,
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PCH_DEVFN_UART2
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};
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static void parse_devicetree(FSP_S_CONFIG *params)
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static void parse_devicetree(FSP_S_CONFIG *params)
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{
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{
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const struct soc_intel_jasperlake_config *config = config_of_soc();
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const struct soc_intel_jasperlake_config *config = config_of_soc();
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@ -266,10 +251,3 @@ __weak void mainboard_silicon_init_params(FSP_S_CONFIG *params)
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{
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{
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printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
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printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
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}
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}
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/* Return list of SOC LPSS controllers */
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const pci_devfn_t *soc_lpss_controllers_list(size_t *size)
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{
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*size = ARRAY_SIZE(serial_io_dev);
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return serial_io_dev;
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}
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@ -132,22 +132,6 @@ static void parse_devicetree(FSP_S_CONFIG *params)
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params->SerialIoUartMode[i] = config->SerialIoUartMode[i];
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params->SerialIoUartMode[i] = config->SerialIoUartMode[i];
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}
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}
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static const pci_devfn_t serial_io_dev[] = {
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PCH_DEVFN_I2C0,
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PCH_DEVFN_I2C1,
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PCH_DEVFN_I2C2,
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PCH_DEVFN_I2C3,
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PCH_DEVFN_I2C4,
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PCH_DEVFN_I2C5,
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PCH_DEVFN_GSPI0,
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PCH_DEVFN_GSPI1,
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PCH_DEVFN_GSPI2,
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PCH_DEVFN_GSPI3,
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PCH_DEVFN_UART0,
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PCH_DEVFN_UART1,
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PCH_DEVFN_UART2
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};
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__weak void mainboard_update_soc_chip_config(struct soc_intel_tigerlake_config *config)
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__weak void mainboard_update_soc_chip_config(struct soc_intel_tigerlake_config *config)
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{
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{
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/* Override settings per board. */
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/* Override settings per board. */
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@ -483,10 +467,3 @@ __weak void mainboard_silicon_init_params(FSP_S_CONFIG *params)
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{
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{
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printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
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printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
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}
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}
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/* Return list of SOC LPSS controllers */
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const pci_devfn_t *soc_lpss_controllers_list(size_t *size)
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{
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*size = ARRAY_SIZE(serial_io_dev);
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return serial_io_dev;
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}
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