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urara: add support for DMA coherent memory area

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The information about the DMA memory area is further passed
through the coreboot table to the payload.

BUG=chrome-os-partner:31438
TEST=tested on Pistachio FPGA; DMA memory area was used to test the
     functionality of the DWC2 USB controller driver; behavior was
     as expected.
BRANCH=none

Change-Id: I658e32352bd5fab493ffe15ad9340e19d02fd133
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: 0debc105b072a37e2a8ae4098a9634d841191d0a
Original-Change-Id: Icf69835dc6a385a59d30092be4ac69bc80245336
Original-Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/235910
Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://review.coreboot.org/9593
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Ionela Voinescu
2014-12-12 13:53:22 +00:00
committed by Patrick Georgi
parent 9b99d7b435
commit b9d961550c
3 changed files with 16 additions and 2 deletions
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2
src/arch/mips/include/arch/memlayout.h
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@@ -26,6 +26,6 @@
/* TODO: Double-check that that's the correct alignment for our ABI. */
#define STACK(addr, size) REGION(stack, addr, size, 8)
/* TODO: Need to add DMA_COHERENT region like on ARM? */
#define DMA_COHERENT(addr, size) REGION(dma_coherent, addr, size, 4K)
#endif /* __ARCH_MEMLAYOUT_H */