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ec/google/chromeec: update ec_commands.h

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Copy ec_commands.h directly from Chromium OS EC repo at sha e57217a250.

This is needed for the FW_CONFIG CBI field definition.

Change-Id: Id010721033ebe32ac9c9482d666cf790442a26ee
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38409
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Jett Rink
2020-01-14 11:49:06 -07:00
committed by Patrick Georgi
parent d801b1feb8
commit ba2edaffdc
1 changed files with 412 additions and 104 deletions
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496
src/ec/google/chromeec/ec_commands.h
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@@ -559,8 +559,7 @@ extern "C" {
(EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING)
/* /*
* Host command response codes (16-bit). Note that response codes should be * Host command response codes (16-bit).
* stored in a uint16_t rather than directly in a value of this type.
*/ */
enum ec_status { enum ec_status {
EC_RES_SUCCESS = 0, EC_RES_SUCCESS = 0,
@@ -584,7 +583,10 @@ enum ec_status {
EC_RES_INVALID_HEADER_CRC = 18, /* Header CRC invalid */ EC_RES_INVALID_HEADER_CRC = 18, /* Header CRC invalid */
EC_RES_INVALID_DATA_CRC = 19, /* Data CRC invalid */ EC_RES_INVALID_DATA_CRC = 19, /* Data CRC invalid */
EC_RES_DUP_UNAVAILABLE = 20, /* Can't resend response */ EC_RES_DUP_UNAVAILABLE = 20, /* Can't resend response */
};
EC_RES_MAX = UINT16_MAX /**< Force enum to be 16 bits */
} __packed;
BUILD_ASSERT(sizeof(enum ec_status) == sizeof(uint16_t));
/* /*
* Host event codes. Note these are 1-based, not 0-based, because ACPI query * Host event codes. Note these are 1-based, not 0-based, because ACPI query
@@ -664,6 +666,9 @@ enum host_event_code {
/* Keyboard recovery combo with hardware reinitialization */ /* Keyboard recovery combo with hardware reinitialization */
EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30, EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30,
/* WoV */
EC_HOST_EVENT_WOV = 31,
/* /*
* The high bit of the event mask is not used as a host event code. If * The high bit of the event mask is not used as a host event code. If
* it reads back as set, then the entire event mask should be * it reads back as set, then the entire event mask should be
@@ -1385,8 +1390,6 @@ enum ec_feature_code {
* MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE.
*/ */
EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37, EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37,
/* EC supports audio codec. */
EC_FEATURE_AUDIO_CODEC = 38,
/* The MCU is a System Companion Processor (SCP). */ /* The MCU is a System Companion Processor (SCP). */
EC_FEATURE_SCP = 39, EC_FEATURE_SCP = 39,
/* The MCU is an Integrated Sensor Hub */ /* The MCU is an Integrated Sensor Hub */
@@ -2795,6 +2798,11 @@ struct ec_params_motion_sense {
}; };
} __ec_todo_packed; } __ec_todo_packed;
enum motion_sense_cmd_info_flags {
/* The sensor supports online calibration */
MOTION_SENSE_CMD_INFO_FLAG_ONLINE_CALIB = BIT(0),
};
struct ec_response_motion_sense { struct ec_response_motion_sense {
union { union {
/* Used for MOTIONSENSE_CMD_DUMP */ /* Used for MOTIONSENSE_CMD_DUMP */
@@ -2845,6 +2853,33 @@ struct ec_response_motion_sense {
uint32_t fifo_max_event_count; uint32_t fifo_max_event_count;
} info_3; } info_3;
/* Used for MOTIONSENSE_CMD_INFO version 4 */
struct __ec_align4 {
/* Should be element of enum motionsensor_type. */
uint8_t type;
/* Should be element of enum motionsensor_location. */
uint8_t location;
/* Should be element of enum motionsensor_chip. */
uint8_t chip;
/* Minimum sensor sampling frequency */
uint32_t min_frequency;
/* Maximum sensor sampling frequency */
uint32_t max_frequency;
/* Max number of sensor events that could be in fifo */
uint32_t fifo_max_event_count;
/*
* Should be elements of
* enum motion_sense_cmd_info_flags
*/
uint32_t flags;
} info_4;
/* Used for MOTIONSENSE_CMD_DATA */ /* Used for MOTIONSENSE_CMD_DATA */
struct ec_response_motion_sensor_data data; struct ec_response_motion_sensor_data data;
@@ -4093,16 +4128,69 @@ struct ec_response_ldo_get {
/* /*
* Get power info. * Get power info.
*
* Note: v0 of this command is deprecated
*/ */
#define EC_CMD_POWER_INFO 0x009D #define EC_CMD_POWER_INFO 0x009D
struct ec_response_power_info { /*
uint32_t usb_dev_type; * v1 of EC_CMD_POWER_INFO
uint16_t voltage_ac; */
uint16_t voltage_system; enum system_power_source {
uint16_t current_system; /*
uint16_t usb_current_limit; * Haven't established which power source is used yet,
} __ec_align4; * or no presence signals are available
*/
POWER_SOURCE_UNKNOWN = 0,
/* System is running on battery alone */
POWER_SOURCE_BATTERY = 1,
/* System is running on A/C alone */
POWER_SOURCE_AC = 2,
/* System is running on A/C and battery */
POWER_SOURCE_AC_BATTERY = 3,
};
struct ec_response_power_info_v1 {
/* enum system_power_source */
uint8_t system_power_source;
/* Battery state-of-charge, 0-100, 0 if not present */
uint8_t battery_soc;
/* AC Adapter 100% rating, Watts */
uint8_t ac_adapter_100pct;
/* AC Adapter 10ms rating, Watts */
uint8_t ac_adapter_10ms;
/* Battery 1C rating, derated */
uint8_t battery_1cd;
/* Rest of Platform average, Watts */
uint8_t rop_avg;
/* Rest of Platform peak, Watts */
uint8_t rop_peak;
/* Nominal charger efficiency, % */
uint8_t nominal_charger_eff;
/* Rest of Platform VR Average Efficiency, % */
uint8_t rop_avg_eff;
/* Rest of Platform VR Peak Efficiency, % */
uint8_t rop_peak_eff;
/* SoC VR Efficiency at Average level, % */
uint8_t soc_avg_eff;
/* SoC VR Efficiency at Peak level, % */
uint8_t soc_peak_eff;
/* Intel-specific items */
struct {
/* Battery's level of DBPT support: 0, 2 */
uint8_t batt_dbpt_support_level;
/*
* Maximum peak power from battery (10ms), Watts
* If DBPT is not supported, this is 0
*/
uint8_t batt_dbpt_max_peak_power;
/*
* Sustained peak power from battery, Watts
* If DBPT is not supported, this is 0
*/
uint8_t batt_dbpt_sus_peak_power;
} intel;
} __ec_align1;
/*****************************************************************************/ /*****************************************************************************/
/* I2C passthru command */ /* I2C passthru command */
@@ -4574,6 +4662,9 @@ struct ec_response_sb_fw_update {
* Entering Verified Boot Mode Command * Entering Verified Boot Mode Command
* Default mode is VBOOT_MODE_NORMAL if EC did not receive this command. * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command.
* Valid Modes are: normal, developer, and recovery. * Valid Modes are: normal, developer, and recovery.
*
* EC no longer needs to know what mode vboot has entered,
* so this command is deprecated. (See chromium:1014379.)
*/ */
#define EC_CMD_ENTERING_MODE 0x00B6 #define EC_CMD_ENTERING_MODE 0x00B6
@@ -4684,92 +4775,246 @@ enum mkbp_cec_event {
/*****************************************************************************/ /*****************************************************************************/
/* Commands for I2S recording on audio codec. */ /* Commands for audio codec. */
#define EC_CMD_EC_CODEC 0x00BC
#define EC_CMD_CODEC_I2S 0x00BC enum ec_codec_subcmd {
#define EC_WOV_I2S_SAMPLE_RATE 48000 EC_CODEC_GET_CAPABILITIES = 0x0,
EC_CODEC_GET_SHM_ADDR = 0x1,
enum ec_codec_i2s_subcmd { EC_CODEC_SET_SHM_ADDR = 0x2,
EC_CODEC_SET_SAMPLE_DEPTH = 0x0, EC_CODEC_SUBCMD_COUNT,
EC_CODEC_SET_GAIN = 0x1,
EC_CODEC_GET_GAIN = 0x2,
EC_CODEC_I2S_ENABLE = 0x3,
EC_CODEC_I2S_SET_CONFIG = 0x4,
EC_CODEC_I2S_SET_TDM_CONFIG = 0x5,
EC_CODEC_I2S_SET_BCLK = 0x6,
EC_CODEC_I2S_SUBCMD_COUNT = 0x7,
}; };
enum ec_sample_depth_value { enum ec_codec_cap {
EC_CODEC_SAMPLE_DEPTH_16 = 0, EC_CODEC_CAP_WOV_AUDIO_SHM = 0,
EC_CODEC_SAMPLE_DEPTH_24 = 1, EC_CODEC_CAP_WOV_LANG_SHM = 1,
EC_CODEC_CAP_LAST = 32,
}; };
enum ec_i2s_config { enum ec_codec_shm_id {
EC_DAI_FMT_I2S = 0, EC_CODEC_SHM_ID_WOV_AUDIO = 0x0,
EC_DAI_FMT_RIGHT_J = 1, EC_CODEC_SHM_ID_WOV_LANG = 0x1,
EC_DAI_FMT_LEFT_J = 2, EC_CODEC_SHM_ID_LAST,
EC_DAI_FMT_PCM_A = 3,
EC_DAI_FMT_PCM_B = 4,
EC_DAI_FMT_PCM_TDM = 5,
}; };
/* enum ec_codec_shm_type {
* For subcommand EC_CODEC_GET_GAIN. EC_CODEC_SHM_TYPE_EC_RAM = 0x0,
*/ EC_CODEC_SHM_TYPE_SYSTEM_RAM = 0x1,
struct __ec_align1 ec_codec_i2s_gain { };
struct __ec_align1 ec_param_ec_codec_get_shm_addr {
uint8_t shm_id;
uint8_t reserved[3];
};
struct __ec_align4 ec_param_ec_codec_set_shm_addr {
uint64_t phys_addr;
uint32_t len;
uint8_t shm_id;
uint8_t reserved[3];
};
struct __ec_align4 ec_param_ec_codec {
uint8_t cmd; /* enum ec_codec_subcmd */
uint8_t reserved[3];
union {
struct ec_param_ec_codec_get_shm_addr
get_shm_addr_param;
struct ec_param_ec_codec_set_shm_addr
set_shm_addr_param;
};
};
struct __ec_align4 ec_response_ec_codec_get_capabilities {
uint32_t capabilities;
};
struct __ec_align4 ec_response_ec_codec_get_shm_addr {
uint64_t phys_addr;
uint32_t len;
uint8_t type;
uint8_t reserved[3];
};
/*****************************************************************************/
/* Commands for DMIC on audio codec. */
#define EC_CMD_EC_CODEC_DMIC 0x00BD
enum ec_codec_dmic_subcmd {
EC_CODEC_DMIC_GET_MAX_GAIN = 0x0,
EC_CODEC_DMIC_SET_GAIN_IDX = 0x1,
EC_CODEC_DMIC_GET_GAIN_IDX = 0x2,
EC_CODEC_DMIC_SUBCMD_COUNT,
};
enum ec_codec_dmic_channel {
EC_CODEC_DMIC_CHANNEL_0 = 0x0,
EC_CODEC_DMIC_CHANNEL_1 = 0x1,
EC_CODEC_DMIC_CHANNEL_2 = 0x2,
EC_CODEC_DMIC_CHANNEL_3 = 0x3,
EC_CODEC_DMIC_CHANNEL_4 = 0x4,
EC_CODEC_DMIC_CHANNEL_5 = 0x5,
EC_CODEC_DMIC_CHANNEL_6 = 0x6,
EC_CODEC_DMIC_CHANNEL_7 = 0x7,
EC_CODEC_DMIC_CHANNEL_COUNT,
};
struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx {
uint8_t channel; /* enum ec_codec_dmic_channel */
uint8_t gain;
uint8_t reserved[2];
};
struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx {
uint8_t channel; /* enum ec_codec_dmic_channel */
uint8_t reserved[3];
};
struct __ec_align4 ec_param_ec_codec_dmic {
uint8_t cmd; /* enum ec_codec_dmic_subcmd */
uint8_t reserved[3];
union {
struct ec_param_ec_codec_dmic_set_gain_idx
set_gain_idx_param;
struct ec_param_ec_codec_dmic_get_gain_idx
get_gain_idx_param;
};
};
struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain {
uint8_t max_gain;
};
struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx {
uint8_t gain;
};
/*****************************************************************************/
/* Commands for I2S RX on audio codec. */
#define EC_CMD_EC_CODEC_I2S_RX 0x00BE
enum ec_codec_i2s_rx_subcmd {
EC_CODEC_I2S_RX_ENABLE = 0x0,
EC_CODEC_I2S_RX_DISABLE = 0x1,
EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH = 0x2,
EC_CODEC_I2S_RX_SET_DAIFMT = 0x3,
EC_CODEC_I2S_RX_SET_BCLK = 0x4,
EC_CODEC_I2S_RX_SUBCMD_COUNT,
};
enum ec_codec_i2s_rx_sample_depth {
EC_CODEC_I2S_RX_SAMPLE_DEPTH_16 = 0x0,
EC_CODEC_I2S_RX_SAMPLE_DEPTH_24 = 0x1,
EC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT,
};
enum ec_codec_i2s_rx_daifmt {
EC_CODEC_I2S_RX_DAIFMT_I2S = 0x0,
EC_CODEC_I2S_RX_DAIFMT_RIGHT_J = 0x1,
EC_CODEC_I2S_RX_DAIFMT_LEFT_J = 0x2,
EC_CODEC_I2S_RX_DAIFMT_COUNT,
};
struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth {
uint8_t depth;
uint8_t reserved[3];
};
struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain {
uint8_t left; uint8_t left;
uint8_t right; uint8_t right;
uint8_t reserved[2];
}; };
struct __ec_todo_unpacked ec_param_codec_i2s_tdm { struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt {
int16_t ch0_delay; /* 0 to 496 */ uint8_t daifmt;
int16_t ch1_delay; /* -1 to 496 */ uint8_t reserved[3];
uint8_t adjacent_to_ch0;
uint8_t adjacent_to_ch1;
}; };
struct __ec_todo_packed ec_param_codec_i2s { struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk {
/* enum ec_codec_i2s_subcmd */
uint8_t cmd;
union {
/*
* EC_CODEC_SET_SAMPLE_DEPTH
* Value should be one of ec_sample_depth_value.
*/
uint8_t depth;
/*
* EC_CODEC_SET_GAIN
* Value should be 0~43 for both channels.
*/
struct ec_codec_i2s_gain gain;
/*
* EC_CODEC_I2S_ENABLE
* 1 to enable, 0 to disable.
*/
uint8_t i2s_enable;
/*
* EC_CODEC_I2S_SET_CONFIG
* Value should be one of ec_i2s_config.
*/
uint8_t i2s_config;
/*
* EC_CODEC_I2S_SET_TDM_CONFIG
* Value should be one of ec_i2s_config.
*/
struct ec_param_codec_i2s_tdm tdm_param;
/*
* EC_CODEC_I2S_SET_BCLK
*/
uint32_t bclk; uint32_t bclk;
}; };
struct __ec_align4 ec_param_ec_codec_i2s_rx {
uint8_t cmd; /* enum ec_codec_i2s_rx_subcmd */
uint8_t reserved[3];
union {
struct ec_param_ec_codec_i2s_rx_set_sample_depth
set_sample_depth_param;
struct ec_param_ec_codec_i2s_rx_set_daifmt
set_daifmt_param;
struct ec_param_ec_codec_i2s_rx_set_bclk
set_bclk_param;
};
}; };
/*****************************************************************************/
/* Commands for WoV on audio codec. */
#define EC_CMD_EC_CODEC_WOV 0x00BF
enum ec_codec_wov_subcmd {
EC_CODEC_WOV_SET_LANG = 0x0,
EC_CODEC_WOV_SET_LANG_SHM = 0x1,
EC_CODEC_WOV_GET_LANG = 0x2,
EC_CODEC_WOV_ENABLE = 0x3,
EC_CODEC_WOV_DISABLE = 0x4,
EC_CODEC_WOV_READ_AUDIO = 0x5,
EC_CODEC_WOV_READ_AUDIO_SHM = 0x6,
EC_CODEC_WOV_SUBCMD_COUNT,
};
/*
* @hash is SHA256 of the whole language model.
* @total_len indicates the length of whole language model.
* @offset is the cursor from the beginning of the model.
* @buf is the packet buffer.
* @len denotes how many bytes in the buf.
*/
struct __ec_align4 ec_param_ec_codec_wov_set_lang {
uint8_t hash[32];
uint32_t total_len;
uint32_t offset;
uint8_t buf[128];
uint32_t len;
};
struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm {
uint8_t hash[32];
uint32_t total_len;
};
struct __ec_align4 ec_param_ec_codec_wov {
uint8_t cmd; /* enum ec_codec_wov_subcmd */
uint8_t reserved[3];
union {
struct ec_param_ec_codec_wov_set_lang
set_lang_param;
struct ec_param_ec_codec_wov_set_lang_shm
set_lang_shm_param;
};
};
struct __ec_align4 ec_response_ec_codec_wov_get_lang {
uint8_t hash[32];
};
struct __ec_align4 ec_response_ec_codec_wov_read_audio {
uint8_t buf[128];
uint32_t len;
};
struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm {
uint32_t offset;
uint32_t len;
};
/*****************************************************************************/ /*****************************************************************************/
/* System commands */ /* System commands */
@@ -4954,7 +5199,7 @@ struct ec_params_usb_pd_control {
#define PD_CTRL_RESP_ROLE_DR_POWER BIT(3) /* Partner is dualrole power */ #define PD_CTRL_RESP_ROLE_DR_POWER BIT(3) /* Partner is dualrole power */
#define PD_CTRL_RESP_ROLE_DR_DATA BIT(4) /* Partner is dualrole data */ #define PD_CTRL_RESP_ROLE_DR_DATA BIT(4) /* Partner is dualrole data */
#define PD_CTRL_RESP_ROLE_USB_COMM BIT(5) /* Partner USB comm capable */ #define PD_CTRL_RESP_ROLE_USB_COMM BIT(5) /* Partner USB comm capable */
#define PD_CTRL_RESP_ROLE_EXT_POWERED BIT(6) /* Partner externally powerd */ #define PD_CTRL_RESP_ROLE_UNCONSTRAINED BIT(6) /* Partner unconstrained power */
struct ec_response_usb_pd_control { struct ec_response_usb_pd_control {
uint8_t enabled; uint8_t enabled;
@@ -4970,26 +5215,48 @@ struct ec_response_usb_pd_control_v1 {
char state[32]; char state[32];
} __ec_align1; } __ec_align1;
/* Values representing usbc PD CC state */ /* Possible port partner connections based on CC line states */
#define USBC_PD_CC_NONE 0 /* No accessory connected */ enum pd_cc_states {
#define USBC_PD_CC_NO_UFP 1 /* No UFP accessory connected */ PD_CC_NONE = 0, /* No port partner attached */
#define USBC_PD_CC_AUDIO_ACC 2 /* Audio accessory connected */
#define USBC_PD_CC_DEBUG_ACC 3 /* Debug accessory connected */ /* From DFP perspective */
#define USBC_PD_CC_UFP_ATTACHED 4 /* UFP attached to usbc */ PD_CC_UFP_AUDIO_ACC = 2, /* UFP Audio accessory connected */
#define USBC_PD_CC_DFP_ATTACHED 5 /* DPF attached to usbc */ PD_CC_UFP_DEBUG_ACC = 3, /* UFP Debug accessory connected */
PD_CC_UFP_ATTACHED = 4, /* Plain UFP attached */
/* From UFP perspective */
PD_CC_DFP_DEBUG_ACC = 6, /* DFP debug accessory connected */
PD_CC_DFP_ATTACHED = 5, /* Plain DFP attached */
};
#define USBC_CABLE_TYPE_UNDEF 0 /* Undefined */ #define USBC_CABLE_TYPE_UNDEF 0 /* Undefined */
#define USBC_CABLE_TYPE_PASSIVE 3 /* Passive cable attached */ #define USBC_CABLE_TYPE_PASSIVE 3 /* Passive cable attached */
#define USBC_CABLE_TYPE_ACTIVE 4 /* Active cable attached */ #define USBC_CABLE_TYPE_ACTIVE 4 /* Active cable attached */
/* Active/Passive Cable */
#define USB_PD_MUX_TBT_ACTIVE_CABLE BIT(0)
/* Optical/Non-optical cable */
#define USB_PD_MUX_TBT_CABLE_TYPE BIT(1)
/* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */
#define USB_PD_MUX_TBT_ADAPTER BIT(2)
/* Active Link enabled/disabled */
#define USB_PD_MUX_TBT_LINK BIT(3)
/*
* Underdevelopement :
* Please remove this tag if using _v2 outside platform/ec
*/
struct ec_response_usb_pd_control_v2 { struct ec_response_usb_pd_control_v2 {
uint8_t enabled; uint8_t enabled;
uint8_t role; uint8_t role;
uint8_t polarity; uint8_t polarity;
char state[32]; char state[32];
uint8_t cc_state; /* USBC_PD_CC_*Encoded cc state */ uint8_t cc_state; /* enum pd_cc_states representing cc state */
uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */ uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */
uint8_t cable_type; /* USBC_CABLE_TYPE_*cable_type */ uint8_t cable_type; /* USBC_CABLE_TYPE_*cable_type */
uint8_t control_flags; /* USB_PD_MUX_*flags */
uint8_t cable_speed;
uint8_t cable_gen; /* rounded_support */
} __ec_align1; } __ec_align1;
#define EC_CMD_USB_PD_PORTS 0x0102 #define EC_CMD_USB_PD_PORTS 0x0102
@@ -5110,7 +5377,7 @@ struct ec_params_usb_pd_discovery_entry {
enum usb_pd_override_ports { enum usb_pd_override_ports {
OVERRIDE_DONT_CHARGE = -2, OVERRIDE_DONT_CHARGE = -2,
OVERRIDE_OFF = -1, OVERRIDE_OFF = -1,
/* [0, CONFIG_USB_PD_PORT_COUNT): Port# */ /* [0, CONFIG_USB_PD_PORT_MAX_COUNT): Port# */
}; };
struct ec_params_charge_port_override { struct ec_params_charge_port_override {
@@ -5271,12 +5538,14 @@ struct ec_params_usb_pd_mux_info {
} __ec_align1; } __ec_align1;
/* Flags representing mux state */ /* Flags representing mux state */
#define USB_PD_MUX_NONE 0 /* Open switch */
#define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */ #define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */
#define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */ #define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */
#define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */ #define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */
#define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */ #define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */
#define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */ #define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */
#define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */ #define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */
#define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */
struct ec_response_usb_pd_mux_info { struct ec_response_usb_pd_mux_info {
uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */
@@ -5363,6 +5632,7 @@ enum cbi_data_tag {
CBI_TAG_DRAM_PART_NUM = 3, /* variable length ascii, nul terminated. */ CBI_TAG_DRAM_PART_NUM = 3, /* variable length ascii, nul terminated. */
CBI_TAG_OEM_NAME = 4, /* variable length ascii, nul terminated. */ CBI_TAG_OEM_NAME = 4, /* variable length ascii, nul terminated. */
CBI_TAG_MODEL_ID = 5, /* uint32_t or smaller */ CBI_TAG_MODEL_ID = 5, /* uint32_t or smaller */
CBI_TAG_FW_CONFIG = 6, /* uint32_t bit field */
CBI_TAG_COUNT, CBI_TAG_COUNT,
}; };
@@ -5570,6 +5840,18 @@ struct ec_response_locate_chip {
}; };
} __ec_align2; } __ec_align2;
/*
* Reboot AP on G3
*
* This command is used for validation purpose, where the AP needs to be
* returned back to S0 state from G3 state without using the servo to trigger
* wake events.For this,there is no request or response struct.
*
* Order of command usage:
* ectool reboot_ap_on_g3 && shutdown -h now
*/
#define EC_CMD_REBOOT_AP_ON_G3 0x0127
/*****************************************************************************/ /*****************************************************************************/
/* The command range 0x200-0x2FF is reserved for Rotor. */ /* The command range 0x200-0x2FF is reserved for Rotor. */
@@ -5725,15 +6007,18 @@ struct ec_response_fp_info {
#define FP_FRAME_OFFSET_MASK 0x0FFFFFFF #define FP_FRAME_OFFSET_MASK 0x0FFFFFFF
/* Version of the format of the encrypted templates. */ /* Version of the format of the encrypted templates. */
#define FP_TEMPLATE_FORMAT_VERSION 3 #define FP_TEMPLATE_FORMAT_VERSION 4
/* Constants for encryption parameters */ /* Constants for encryption parameters */
#define FP_CONTEXT_NONCE_BYTES 12 #define FP_CONTEXT_NONCE_BYTES 12
#define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t)) #define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t))
#define FP_CONTEXT_TAG_BYTES 16 #define FP_CONTEXT_TAG_BYTES 16
#define FP_CONTEXT_SALT_BYTES 16 #define FP_CONTEXT_ENCRYPTION_SALT_BYTES 16
#define FP_CONTEXT_TPM_BYTES 32 #define FP_CONTEXT_TPM_BYTES 32
/* Constants for positive match parameters. */
#define FP_POSITIVE_MATCH_SALT_BYTES 16
struct ec_fp_template_encryption_metadata { struct ec_fp_template_encryption_metadata {
/* /*
* Version of the structure format (N=3). * Version of the structure format (N=3).
@@ -5746,7 +6031,7 @@ struct ec_fp_template_encryption_metadata {
* a different one is used for every message. * a different one is used for every message.
*/ */
uint8_t nonce[FP_CONTEXT_NONCE_BYTES]; uint8_t nonce[FP_CONTEXT_NONCE_BYTES];
uint8_t salt[FP_CONTEXT_SALT_BYTES]; uint8_t encryption_salt[FP_CONTEXT_ENCRYPTION_SALT_BYTES];
uint8_t tag[FP_CONTEXT_TAG_BYTES]; uint8_t tag[FP_CONTEXT_TAG_BYTES];
}; };
@@ -5779,6 +6064,18 @@ struct ec_params_fp_context {
uint32_t userid[FP_CONTEXT_USERID_WORDS]; uint32_t userid[FP_CONTEXT_USERID_WORDS];
} __ec_align4; } __ec_align4;
enum fp_context_action {
FP_CONTEXT_ASYNC = 0,
FP_CONTEXT_GET_RESULT = 1,
};
/* Version 1 of the command is "asynchronous". */
struct ec_params_fp_context_v1 {
uint8_t action; /**< enum fp_context_action */
uint8_t reserved[3]; /**< padding for alignment */
uint32_t userid[FP_CONTEXT_USERID_WORDS];
} __ec_align4;
#define EC_CMD_FP_STATS 0x0407 #define EC_CMD_FP_STATS 0x0407
#define FPSTATS_CAPTURE_INV BIT(0) #define FPSTATS_CAPTURE_INV BIT(0)
@@ -5820,6 +6117,17 @@ struct ec_response_fp_encryption_status {
uint32_t status; uint32_t status;
} __ec_align4; } __ec_align4;
#define EC_CMD_FP_READ_MATCH_SECRET 0x040A
struct ec_params_fp_read_match_secret {
uint16_t fgr;
} __ec_align4;
/* The positive match secret has the length of the SHA256 digest. */
#define FP_POSITIVE_MATCH_SECRET_BYTES 32
struct ec_response_fp_read_match_secret {
uint8_t positive_match_secret[FP_POSITIVE_MATCH_SECRET_BYTES];
} __ec_align4;
/*****************************************************************************/ /*****************************************************************************/
/* Touchpad MCU commands: range 0x0500-0x05FF */ /* Touchpad MCU commands: range 0x0500-0x05FF */