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cbfs: Enable CBFS mcache on most chipsets

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This patch flips the default of CONFIG_NO_CBFS_MCACHE so the feature is
enabled by default. Some older chipsets with insufficient SRAM/CAR space
still have it explicitly disabled. All others get the new section added
to their memlayout... 8K seems like a sane default to start with.

Change-Id: I0abd1c813aece6e78fb883f292ce6c9319545c44
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38424
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Julius Werner
2019-10-02 17:28:56 -07:00
committed by Patrick Georgi
parent 4a1cbdd51a
commit baf27dbaeb
35 changed files with 64 additions and 22 deletions
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5
src/soc/sifive/fu540/memlayout.ld
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@@ -12,8 +12,9 @@ SECTIONS
{
L2LIM_START(FU540_L2LIM)
BOOTBLOCK(FU540_L2LIM, 64K)
CAR_STACK(FU540_L2LIM + 64K, 20K)
PRERAM_CBMEM_CONSOLE(FU540_L2LIM + 84K, 8K)
CAR_STACK(FU540_L2LIM + 64K, 12K)
PRERAM_CBMEM_CONSOLE(FU540_L2LIM + 76K, 8K)
CBFS_MCACHE(FU540_L2LIM + 84K, 8K)
FMAP_CACHE(FU540_L2LIM + 92K, 2K)
ROMSTAGE(FU540_L2LIM + 128K, 128K)
PRERAM_CBFS_CACHE(FU540_L2LIM + 256K, 128K)