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mb/bap/ode_e20XX: Switch away from ROMCC_BOOTBLOCK

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Warning: not tested on hardware.

Signed-off-by: Mike Banon <mikebdp2@gmail.com>
Change-Id: I37a1a95bdf07d99916247095a5bc3ac5349cd98f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38869
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Mike Banon
2020-02-13 15:45:05 +00:00
committed by Patrick Georgi
parent 6ed9df448b
commit bb45f38eb9
4 changed files with 7 additions and 22 deletions
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4
src/mainboard/bap/ode_e20XX/Kconfig
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@@ -14,14 +14,10 @@
# GNU General Public License for more details. # GNU General Public License for more details.
# #
config BOARD_ODE_E20XX
def_bool n
if BOARD_ODE_E20XX if BOARD_ODE_E20XX
config BOARD_SPECIFIC_OPTIONS config BOARD_SPECIFIC_OPTIONS
def_bool y def_bool y
#select ROMCC_BOOTBLOCK
select CPU_AMD_AGESA_FAMILY16_KB select CPU_AMD_AGESA_FAMILY16_KB
select NORTHBRIDGE_AMD_AGESA_FAMILY16_KB select NORTHBRIDGE_AMD_AGESA_FAMILY16_KB
select SOUTHBRIDGE_AMD_AGESA_YANGTZE select SOUTHBRIDGE_AMD_AGESA_YANGTZE

4
src/mainboard/bap/ode_e20XX/Kconfig.name
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@@ -1,2 +1,2 @@
#config BOARD_ODE_E20XX config BOARD_ODE_E20XX
# bool"ODE_e20xx" bool "ODE_e20xx"

2
src/mainboard/bap/ode_e20XX/Makefile.inc
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@@ -14,6 +14,8 @@
# GNU General Public License for more details. # GNU General Public License for more details.
# #
bootblock-y += bootblock.c
romstage-y += buildOpts.c romstage-y += buildOpts.c
romstage-y += BiosCallOuts.c romstage-y += BiosCallOuts.c
romstage-y += OemCustomize.c romstage-y += OemCustomize.c

19
src/mainboard/bap/ode_e20XX/romstage.c → src/mainboard/bap/ode_e20XX/bootblock.c
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@@ -1,10 +1,6 @@
/* /*
* This file is part of the coreboot project. * This file is part of the coreboot project.
* *
* Copyright (C) 2012 Advanced Micro Devices, Inc.
* Copyright (C) 2015 BAP - Bruhnspace Advanced Projects
* (Written by Fabian Kunkel <fabi@adv.bruhnspace.com> for BAP)
*
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License. * the Free Software Foundation; version 2 of the License.
@@ -15,26 +11,17 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#include <arch/io.h>
#include <amdblocks/acpimmio.h> #include <amdblocks/acpimmio.h>
#include <device/pci_ops.h> #include <bootblock_common.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <superio/fintek/common/fintek.h> #include <superio/fintek/common/fintek.h>
#include <superio/fintek/f81866d/f81866d.h> #include <superio/fintek/f81866d/f81866d.h>
#define SERIAL_DEV1 PNP_DEV(0x4e, F81866D_SP1) #define SERIAL_DEV1 PNP_DEV(0x4e, F81866D_SP1)
void board_BeforeAgesa(struct sysinfo *cb) void bootblock_mainboard_early_init(void)
{ {
/* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */ /* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */
pm_io_write(0xea, 1); pm_write8(0xea, 0x1);
/* Set LPC decode enables. */
pci_devfn_t dev = PCI_DEV(0, 0x14, 3);
pci_write_config32(dev, 0x44, 0xff03ffd5);
fintek_enable_serial(SERIAL_DEV1, CONFIG_TTYS0_BASE); fintek_enable_serial(SERIAL_DEV1, CONFIG_TTYS0_BASE);
} }