dptf: Add support for Running Average Power Limits

This change adds support for emitting the PPCC table, which describes
the ranges available as knobs for DPTF to tune. It can support min/max
power, min/max time window for averaging, and the minimum adjustment size
(granularity or step size) of each power limit. The current implementation
only supports PL1 and PL2.

BUG=b:143539650
TEST=compiles

Change-Id: I67e80d661ea5bb79980ef285eca40c9a4b0f1849
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41890
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Tim Wawrzynczak
2020-05-29 14:46:19 -06:00
committed by Patrick Georgi
parent 2ad8ffed6f
commit bb5c255907
4 changed files with 75 additions and 0 deletions

View File

@@ -75,6 +75,7 @@ static void dptf_fill_ssdt(const struct device *dev)
/* Controls */
dptf_write_charger_perf(config->controls.charger_perf, DPTF_MAX_CHARGER_PERF_STATES);
dptf_write_fan_perf(config->controls.fan_perf, DPTF_MAX_FAN_PERF_STATES);
dptf_write_power_limits(&config->controls.power_limits);
printk(BIOS_INFO, "\\_SB.DPTF: %s at %s\n", dev->chip_ops->name, dev_path(dev));
}