Add newlines at the end of all coreboot files

Change-Id: I7930d5cded290f2605d0c92a9c465a3f0c1291a2
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15974
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

src/mainboard/asus/kcma-d8/acpi_tables.c

@@ -106,4 +106,4 @@ unsigned long acpi_fill_ivrs_ioapic(acpi_ivrs_t* ivrs, unsigned long current)
 	current += 8;
 
 	return current;
-}
+}

src/mainboard/asus/kcma-d8/spd_notes.txt

@@ -43,4 +43,4 @@ After that, there's a cascade of small FETs and resistors in that region, eventu
 SuperIO pin 81 (VSBGATE#) enables the standby voltage rails when set LOW.
 VSBGATE# is reset on every assertion of PWRGOOD.
 
-Setting SuperIO LDN 9 CRF4 bits 1 or 0 (or both) to 0 disables NICB.
+Setting SuperIO LDN 9 CRF4 bits 1 or 0 (or both) to 0 disables NICB.

src/mainboard/asus/kfsn4-dre/bootblock.c

@@ -78,4 +78,4 @@ void bootblock_mainboard_init(void)
 		 */
 #endif
 	}
-}
+}

src/mainboard/asus/kfsn4-dre_k8/bootblock.c

@@ -78,4 +78,4 @@ void bootblock_mainboard_init(void)
 		 */
 #endif
 	}
-}
+}

src/mainboard/asus/kgpe-d16/acpi_tables.c

@@ -106,4 +106,4 @@ unsigned long acpi_fill_ivrs_ioapic(acpi_ivrs_t* ivrs, unsigned long current)
 	current += 8;
 
 	return current;
-}
+}

src/mainboard/asus/kgpe-d16/spd_notes.txt

@@ -43,4 +43,4 @@ After that, there's a cascade of small FETs and resistors in that region, eventu
 SuperIO pin 81 (VSBGATE#) enables the standby voltage rails when set LOW.
 VSBGATE# is reset on every assertion of PWRGOOD.
 
-Setting SuperIO LDN 9 CRF4 bits 1 or 0 (or both) to 0 disables NICB.
+Setting SuperIO LDN 9 CRF4 bits 1 or 0 (or both) to 0 disables NICB.

src/mainboard/google/ninja/acpi_tables.c

@@ -61,4 +61,4 @@ unsigned long acpi_fill_madt(unsigned long current)
 	current = acpi_madt_irq_overrides(current);
 
 	return current;
-}
+}

src/mainboard/google/veyron/sdram_inf/sdram-unused.inc

@@ -1,3 +1,3 @@
 {
 	.dramtype= UNUSED
-},
+},

src/mainboard/google/veyron_brain/sdram_inf/sdram-unused.inc

@@ -1,3 +1,3 @@
 {
 	.dramtype= UNUSED
-},
+},

src/mainboard/google/veyron_danger/sdram_inf/sdram-unused.inc

@@ -1,3 +1,3 @@
 {
 	.dramtype= UNUSED
-},
+},

src/mainboard/google/veyron_emile/sdram_inf/sdram-unused.inc

@@ -1,3 +1,3 @@
 {
 	.dramtype= UNUSED
-},
+},

src/mainboard/google/veyron_mickey/sdram_inf/sdram-unused.inc

@@ -1,3 +1,3 @@
 {
 	.dramtype= UNUSED
-},
+},

src/mainboard/google/veyron_rialto/sdram_inf/sdram-unused.inc

@@ -1,3 +1,3 @@
 {
 	.dramtype= UNUSED
-},
+},

src/mainboard/google/veyron_romy/sdram_inf/sdram-unused.inc

@@ -1,3 +1,3 @@
 {
 	.dramtype= UNUSED
-},
+},

src/mainboard/intel/camelbackmountain_fsp/Makefile.inc

@@ -13,4 +13,4 @@
 ## GNU General Public License for more details.
 ##
 
-ramstage-y += irqroute.c
+ramstage-y += irqroute.c

src/mainboard/intel/stargo2/acpi/ec.asl

@@ -6,4 +6,4 @@
  * This file is included by lpc.asl in the southbridge directory.
  * It is intended to be used to include any embedded controller
  * specific ASL.
- */
+ */

src/mainboard/lenovo/t400/cmos.default

@@ -14,4 +14,4 @@ power_management_beeps=Enable
 low_battery_beep=Enable
 sata_mode=AHCI
 hybrid_graphics_mode=Integrated Only
-gfx_uma_size=32M
+gfx_uma_size=32M

src/mainboard/lenovo/t420/cmos.default

@@ -14,4 +14,4 @@ fn_ctrl_swap=Disable
 sticky_fn=Disable
 trackpoint=Enable
 hyper_threading=Enable
-hybrid_graphics_mode=Integrated Only
+hybrid_graphics_mode=Integrated Only

src/mainboard/lenovo/t420s/cmos.default

@@ -14,4 +14,4 @@ fn_ctrl_swap=Disable
 sticky_fn=Disable
 trackpoint=Enable
 hyper_threading=Enable
-hybrid_graphics_mode=Integrated Only
+hybrid_graphics_mode=Integrated Only

src/mainboard/lenovo/t520/cmos.default

@@ -15,4 +15,4 @@ sticky_fn=Disable
 trackpoint=Enable
 hyper_threading=Enable
 backlight=Both
-hybrid_graphics_mode=Integrated Only
+hybrid_graphics_mode=Integrated Only

src/mainboard/lenovo/t530/cmos.default

@@ -15,4 +15,4 @@ sticky_fn=Disable
 trackpoint=Enable
 hyper_threading=Enable
 backlight=Both
-hybrid_graphics_mode=Integrated Only
+hybrid_graphics_mode=Integrated Only

src/mainboard/lenovo/x200/cmos.default

@@ -13,4 +13,4 @@ sticky_fn=Disable
 power_management_beeps=Enable
 low_battery_beep=Enable
 sata_mode=AHCI
-gfx_uma_size=32M
+gfx_uma_size=32M

src/mainboard/siemens/mc_bdx1/Makefile.inc

@@ -13,4 +13,4 @@
 ## GNU General Public License for more details.
 ##
 
-ramstage-y += irqroute.c
+ramstage-y += irqroute.c