Documentation: Fix a few spelling issues
Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I47add663f3021170b840203ce229acf836b7a1c4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64749 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Felix Singer <felixsinger@posteo.net>
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Martin L Roth
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@ -134,7 +134,7 @@ SPI_ROM1 header while the board is off and disconnected from power. There
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seems to be a diode that prevents the external programmer from powering the
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whole board.
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The signal assigment on the header is identical to the pinout of the flash
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The signal assignment on the header is identical to the pinout of the flash
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chip. The pinout diagram below is valid when the PCI slots are on the left
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and the CPU is on the right. Note that HOLD# and WP# must be pulled high
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(to VCC) to be able to flash the chip.
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