mb/amd/mandolin: move PCIe GPP clock setting to devicetree

Checked with the schematics that all PCIe clocks have a corresponding
clock enable pin.

BUG=b:149970243
BRANCH=zork

Change-Id: If96cdf95e213682217e46a98fc69c5c2ef4a148d
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44892
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb

@@ -115,6 +115,15 @@ chip soc/amd/picasso
 		.flash_ch_en = 0,
 	}"
 
+	# genral purpose PCIe clock output configuration
+	register "gpp_clk_config[0]" = "GPP_CLK_REQ"
+	register "gpp_clk_config[1]" = "GPP_CLK_REQ"
+	register "gpp_clk_config[2]" = "GPP_CLK_REQ"
+	register "gpp_clk_config[3]" = "GPP_CLK_REQ"
+	register "gpp_clk_config[4]" = "GPP_CLK_REQ"
+	register "gpp_clk_config[5]" = "GPP_CLK_REQ"
+	register "gpp_clk_config[6]" = "GPP_CLK_REQ"
+
 	device cpu_cluster 0 on
 		device lapic 0 on end
 	end