quark: Enable HSUART0 as console
The use of HSUART0 on galileo requires early initialization of the I2C GPIO expanders to direct the RXD and TXD signals to DIGITAL 0 and 1 on the expansion connector. TEST=None Change-Id: I11195d79e954c1f6bc91eafe257d7ddc1310b2e7 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15010 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@@ -40,9 +40,19 @@ config CPU_SPECIFIC_OPTIONS
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# The following options configure the debug serial port
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#####
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config ENABLE_BUILTIN_HSUART0
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bool "Enable built-in HSUART0"
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default n
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select NO_UART_ON_SUPERIO
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select DRIVERS_UART_8250MEM_32
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help
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The Quark SoC has two HSUART. Choose this option to configure the pads
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and enable HSUART0, which can be used for the debug console.
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config ENABLE_BUILTIN_HSUART1
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bool "Enable built-in HSUART1"
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default y
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default n
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depends on ! ENABLE_BUILTIN_HSUART0
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select NO_UART_ON_SUPERIO
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select DRIVERS_UART_8250MEM_32
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help
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@@ -50,23 +60,24 @@ config ENABLE_BUILTIN_HSUART1
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and enable HSUART1, which can be used for the debug console.
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config TTYS0_BASE
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hex "HSUART1 Base Address"
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depends on ENABLE_BUILTIN_HSUART1
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hex "HSUART Base Address"
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default 0xA0019000
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depends on ENABLE_BUILTIN_HSUART0 || ENABLE_BUILTIN_HSUART1
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help
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Memory mapped MMIO of HSUART1.
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Memory mapped MMIO of HSUART.
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config TTYS0_LCS
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int
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depends on ENABLE_BUILTIN_HSUART1
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default 3
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depends on ENABLE_BUILTIN_HSUART0 || ENABLE_BUILTIN_HSUART1
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# Console: PCI UART bus 0 << 20, device 20 << 15, function 5 << 12
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# Console: PCI UART bus 0 << 20, device 20 << 15, function x << 12
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# Valid bit, PCI UART in use: 1 << 31
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config UART_PCI_ADDR
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hex
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depends on ENABLE_BUILTIN_HSUART1
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default 0x800a5000
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default 0x800a1000 if ENABLE_BUILTIN_HSUART0
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default 0x800a5000 if ENABLE_BUILTIN_HSUART1
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depends on ENABLE_BUILTIN_HSUART0 || ENABLE_BUILTIN_HSUART1
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#####
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# Debug support
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