From bcd34461da120bfeb43ab13c2b71df878efe73e7 Mon Sep 17 00:00:00 2001
From: Jeremy Soller <jackpot51@gmail.com>
Date: Tue, 5 Mar 2024 13:59:21 -0700
Subject: [PATCH] Add System76 Lemur Pro (lemp13)

Change-Id: I805cf4929bc69d50237603d40bab6adb6fbdc862
Signed-off-by: Jeremy Soller <jeremy@system76.com>
---
 src/mainboard/system76/mtl/Kconfig            |   90 ++
 src/mainboard/system76/mtl/Kconfig.name       |    4 +
 src/mainboard/system76/mtl/Makefile.mk        |   20 +
 src/mainboard/system76/mtl/acpi/backlight.asl |   31 +
 src/mainboard/system76/mtl/acpi/mainboard.asl |   12 +
 src/mainboard/system76/mtl/acpi/sleep.asl     |    9 +
 src/mainboard/system76/mtl/board_info.txt     |    6 +
 src/mainboard/system76/mtl/bootblock.c        |    9 +
 src/mainboard/system76/mtl/cmos.default       |    5 +
 src/mainboard/system76/mtl/cmos.layout        |   40 +
 src/mainboard/system76/mtl/devicetree.cb      |   64 +
 src/mainboard/system76/mtl/dsdt.asl           |   36 +
 .../system76/mtl/include/mainboard/gpio.h     |    9 +
 src/mainboard/system76/mtl/ramstage.c         |   13 +
 .../spd/samsung-M425R1GB4BB0-CQKOD.spd.hex    |   33 +
 .../system76/mtl/variants/lemp13/board.fmd    |   12 +
 .../mtl/variants/lemp13/board_info.txt        |    2 +
 .../system76/mtl/variants/lemp13/data.vbt     |  Bin 0 -> 7680 bytes
 .../system76/mtl/variants/lemp13/gpio.c       |  208 ++++
 .../system76/mtl/variants/lemp13/gpio_early.c |   16 +
 .../system76/mtl/variants/lemp13/hda_verb.c   |   50 +
 .../mtl/variants/lemp13/overridetree.cb       |  120 ++
 .../system76/mtl/variants/lemp13/ramstage.c   |   19 +
 .../system76/mtl/variants/lemp13/romstage.c   |   24 +
 .../system76/mtl/variants/lemp13/tas5825m.c   | 1049 +++++++++++++++++
 25 files changed, 1881 insertions(+)
 create mode 100644 src/mainboard/system76/mtl/Kconfig
 create mode 100644 src/mainboard/system76/mtl/Kconfig.name
 create mode 100644 src/mainboard/system76/mtl/Makefile.mk
 create mode 100644 src/mainboard/system76/mtl/acpi/backlight.asl
 create mode 100644 src/mainboard/system76/mtl/acpi/mainboard.asl
 create mode 100644 src/mainboard/system76/mtl/acpi/sleep.asl
 create mode 100644 src/mainboard/system76/mtl/board_info.txt
 create mode 100644 src/mainboard/system76/mtl/bootblock.c
 create mode 100644 src/mainboard/system76/mtl/cmos.default
 create mode 100644 src/mainboard/system76/mtl/cmos.layout
 create mode 100644 src/mainboard/system76/mtl/devicetree.cb
 create mode 100644 src/mainboard/system76/mtl/dsdt.asl
 create mode 100644 src/mainboard/system76/mtl/include/mainboard/gpio.h
 create mode 100644 src/mainboard/system76/mtl/ramstage.c
 create mode 100644 src/mainboard/system76/mtl/spd/samsung-M425R1GB4BB0-CQKOD.spd.hex
 create mode 100644 src/mainboard/system76/mtl/variants/lemp13/board.fmd
 create mode 100644 src/mainboard/system76/mtl/variants/lemp13/board_info.txt
 create mode 100644 src/mainboard/system76/mtl/variants/lemp13/data.vbt
 create mode 100644 src/mainboard/system76/mtl/variants/lemp13/gpio.c
 create mode 100644 src/mainboard/system76/mtl/variants/lemp13/gpio_early.c
 create mode 100644 src/mainboard/system76/mtl/variants/lemp13/hda_verb.c
 create mode 100644 src/mainboard/system76/mtl/variants/lemp13/overridetree.cb
 create mode 100644 src/mainboard/system76/mtl/variants/lemp13/ramstage.c
 create mode 100644 src/mainboard/system76/mtl/variants/lemp13/romstage.c
 create mode 100644 src/mainboard/system76/mtl/variants/lemp13/tas5825m.c

diff --git a/src/mainboard/system76/mtl/Kconfig b/src/mainboard/system76/mtl/Kconfig
new file mode 100644
index 0000000000..3e89044778
--- /dev/null
+++ b/src/mainboard/system76/mtl/Kconfig
@@ -0,0 +1,90 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+config BOARD_SYSTEM76_MTL_COMMON
+	def_bool n
+	select BOARD_ROMSIZE_KB_32768
+	select DRIVERS_GENERIC_BAYHUB_LV2
+	select DRIVERS_GENERIC_CBFS_SERIAL
+	select DRIVERS_GENERIC_CBFS_UUID
+	select DRIVERS_I2C_HID
+	select EC_SYSTEM76_EC
+	select EC_SYSTEM76_EC_LOCKDOWN
+	select HAVE_ACPI_RESUME
+	select HAVE_ACPI_TABLES
+	select HAVE_CMOS_DEFAULT
+	select HAVE_OPTION_TABLE
+	select INTEL_GMA_HAVE_VBT
+	select INTEL_LPSS_UART_FOR_CONSOLE
+	select MAINBOARD_HAS_TPM2
+	select MEMORY_MAPPED_TPM
+	select NO_UART_ON_SUPERIO
+	select PCIEXP_SUPPORT_RESIZABLE_BARS
+	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
+	select SOC_INTEL_CRASHLOG
+	select SOC_INTEL_METEORLAKE
+	select SPD_READ_BY_WORD
+	select SYSTEM_TYPE_LAPTOP
+	select TPM_RDRESP_NEED_DELAY
+
+config BOARD_SYSTEM76_LEMP13
+	select BOARD_SYSTEM76_MTL_COMMON
+	select DRIVERS_I2C_TAS5825M
+	select HAVE_SPD_IN_CBFS
+	select SOC_INTEL_METEORLAKE_U_H
+	select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
+
+if BOARD_SYSTEM76_MTL_COMMON
+
+config MAINBOARD_DIR
+	default "system76/mtl"
+
+config VARIANT_DIR
+	default "lemp13" if BOARD_SYSTEM76_LEMP13
+
+config OVERRIDE_DEVICETREE
+	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
+
+config MAINBOARD_PART_NUMBER
+	default "lemp13" if BOARD_SYSTEM76_LEMP13
+
+config MAINBOARD_SMBIOS_PRODUCT_NAME
+	default "Lemur Pro" if BOARD_SYSTEM76_LEMP13
+
+config MAINBOARD_VERSION
+	default "lemp13" if BOARD_SYSTEM76_LEMP13
+
+config CMOS_DEFAULT_FILE
+	default "src/mainboard/\$(MAINBOARDDIR)/cmos.default"
+
+config CONSOLE_POST
+	default y
+
+config D3COLD_SUPPORT
+	default n
+
+config DIMM_SPD_SIZE
+	default 512
+
+config FMDFILE
+	default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/variants/\$(CONFIG_VARIANT_DIR)/board.fmd"
+
+config ONBOARD_VGA_IS_PRIMARY
+	default y
+
+config PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS
+	default 36
+
+config POST_DEVICE
+	default n
+
+config TPM_MEASURED_BOOT
+	default y
+
+config UART_FOR_CONSOLE
+	default 0
+
+# PM Timer Disabled, saves power
+config USE_PM_ACPI_TIMER
+	default n
+
+endif
diff --git a/src/mainboard/system76/mtl/Kconfig.name b/src/mainboard/system76/mtl/Kconfig.name
new file mode 100644
index 0000000000..c978230d44
--- /dev/null
+++ b/src/mainboard/system76/mtl/Kconfig.name
@@ -0,0 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+config BOARD_SYSTEM76_LEMP13
+	bool "lemp13"
diff --git a/src/mainboard/system76/mtl/Makefile.mk b/src/mainboard/system76/mtl/Makefile.mk
new file mode 100644
index 0000000000..5025bb18b2
--- /dev/null
+++ b/src/mainboard/system76/mtl/Makefile.mk
@@ -0,0 +1,20 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
+
+ifeq ($(CONFIG_DRIVERS_GFX_NVIDIA),y)
+CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
+endif
+
+bootblock-y += bootblock.c
+bootblock-y += variants/$(VARIANT_DIR)/gpio_early.c
+
+romstage-y += variants/$(VARIANT_DIR)/romstage.c
+
+ramstage-y += ramstage.c
+ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
+ramstage-y += variants/$(VARIANT_DIR)/gpio.c
+ramstage-y += variants/$(VARIANT_DIR)/ramstage.c
+ramstage-$(CONFIG_DRIVERS_I2C_TAS5825M) += variants/$(VARIANT_DIR)/tas5825m.c
+
+SPD_SOURCES = samsung-M425R1GB4BB0-CQKOD
diff --git a/src/mainboard/system76/mtl/acpi/backlight.asl b/src/mainboard/system76/mtl/acpi/backlight.asl
new file mode 100644
index 0000000000..053ce57b5d
--- /dev/null
+++ b/src/mainboard/system76/mtl/acpi/backlight.asl
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <drivers/intel/gma/acpi/gma.asl>
+
+Scope (GFX0)
+{
+	Name (BRIG, Package (22) {
+		100, /* default AC */
+		100, /* default Battery */
+		5,
+		10,
+		15,
+		20,
+		25,
+		30,
+		35,
+		40,
+		45,
+		50,
+		55,
+		60,
+		65,
+		70,
+		75,
+		80,
+		85,
+		90,
+		95,
+		100
+	})
+}
diff --git a/src/mainboard/system76/mtl/acpi/mainboard.asl b/src/mainboard/system76/mtl/acpi/mainboard.asl
new file mode 100644
index 0000000000..c982a9ee4c
--- /dev/null
+++ b/src/mainboard/system76/mtl/acpi/mainboard.asl
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#define EC_GPE_SCI 0x6E
+#define EC_GPE_SWI 0x6B
+#include <ec/system76/ec/acpi/ec.asl>
+
+Scope (\_SB) {
+	#include "sleep.asl"
+	Scope (PCI0) {
+		#include "backlight.asl"
+	}
+}
diff --git a/src/mainboard/system76/mtl/acpi/sleep.asl b/src/mainboard/system76/mtl/acpi/sleep.asl
new file mode 100644
index 0000000000..8a2a22c55b
--- /dev/null
+++ b/src/mainboard/system76/mtl/acpi/sleep.asl
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+External(\TBTS, MethodObj)
+
+Method(MPTS, 1, Serialized) {
+	If (CondRefOf(\TBTS)) {
+		\TBTS()
+	}
+}
diff --git a/src/mainboard/system76/mtl/board_info.txt b/src/mainboard/system76/mtl/board_info.txt
new file mode 100644
index 0000000000..e67d880062
--- /dev/null
+++ b/src/mainboard/system76/mtl/board_info.txt
@@ -0,0 +1,6 @@
+Vendor name: System76
+Category: laptop
+ROM package: WSON-8
+ROM protocol: SPI
+ROM socketed: n
+Flashrom support: y
diff --git a/src/mainboard/system76/mtl/bootblock.c b/src/mainboard/system76/mtl/bootblock.c
new file mode 100644
index 0000000000..8d06adc9d7
--- /dev/null
+++ b/src/mainboard/system76/mtl/bootblock.c
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <bootblock_common.h>
+#include <mainboard/gpio.h>
+
+void bootblock_mainboard_early_init(void)
+{
+	mainboard_configure_early_gpios();
+}
diff --git a/src/mainboard/system76/mtl/cmos.default b/src/mainboard/system76/mtl/cmos.default
new file mode 100644
index 0000000000..0cc5970e49
--- /dev/null
+++ b/src/mainboard/system76/mtl/cmos.default
@@ -0,0 +1,5 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+boot_option=Fallback
+debug_level=Debug
+me_state=Disable
diff --git a/src/mainboard/system76/mtl/cmos.layout b/src/mainboard/system76/mtl/cmos.layout
new file mode 100644
index 0000000000..0513315c33
--- /dev/null
+++ b/src/mainboard/system76/mtl/cmos.layout
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+entries
+
+0	384	r	0	reserved_memory
+
+# RTC_BOOT_BYTE (coreboot hardcoded)
+384	1	e	4	boot_option
+388	4	h	0	reboot_counter
+
+# RTC_CLK_ALTCENTURY
+400	8	r	0	century
+
+412	4	e	6	debug_level
+416	1	e	2	me_state
+417	3	h	0	me_state_counter
+904	80	h	0	ramtop
+984	16	h	0	check_sum
+
+enumerations
+
+2	0	Enable
+2	1	Disable
+
+4	0	Fallback
+4	1	Normal
+
+6	0	Emergency
+6	1	Alert
+6	2	Critical
+6	3	Error
+6	4	Warning
+6	5	Notice
+6	6	Info
+6	7	Debug
+6	8	Spew
+
+checksums
+
+checksum 408 983 984
diff --git a/src/mainboard/system76/mtl/devicetree.cb b/src/mainboard/system76/mtl/devicetree.cb
new file mode 100644
index 0000000000..51101f6b7a
--- /dev/null
+++ b/src/mainboard/system76/mtl/devicetree.cb
@@ -0,0 +1,64 @@
+chip soc/intel/meteorlake
+	register "common_soc_config" = "{
+		// Touchpad I2C bus
+		.i2c[0] = {
+			.speed = I2C_SPEED_FAST,
+			.rise_time_ns = 80,
+			.fall_time_ns = 110,
+		},
+	}"
+
+	# Enable Enhanced Intel SpeedStep
+	register "eist_enable" = "1"
+
+	# Thermal
+	register "tcc_offset" = "8"
+
+	device cpu_cluster 0 on end
+
+	device domain 0 on
+		device ref system_agent on end
+		device ref igpu on
+			# DDIA is eDP, TCP2 is HDMI
+			register "ddi_port_A_config" = "1"
+			register "ddi_ports_config" = "{
+				[DDI_PORT_A] = DDI_ENABLE_HPD,
+				[DDI_PORT_2] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
+			}"
+
+			register "gfx" = "GMA_DEFAULT_PANEL(0)"
+		end
+		device ref pmc_shared_sram on end
+		device ref cnvi_wifi on
+			register "cnvi_bt_core" = "true"
+			register "cnvi_bt_audio_offload" = "true"
+			chip drivers/wifi/generic
+				register "wake" = "GPE0_PME_B0"
+				device generic 0 on end
+			end
+		end
+		device ref i2c1 on
+			register "serial_io_i2c_mode[PchSerialIoIndexI2C1]" = "PchSerialIoPci"
+		end
+
+		device ref heci1 on end
+		device ref soc_espi on
+			register "gen1_dec" = "0x00040069" # EC PM channel
+			register "gen2_dec" = "0x00fc0e01" # AP/EC command
+			register "gen3_dec" = "0x00fc0f01" # AP/EC debug
+			chip drivers/pc80/tpm
+				device pnp 0c31.0 on end
+			end
+		end
+		device ref p2sb on end
+		device ref hda on
+			register "pch_hda_sdi_enable[0]" = "1"
+			register "pch_hda_audio_link_hda_enable" = "1"
+			register "pch_hda_idisp_codec_enable" = "1"
+			register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ"
+			register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T"
+		end
+		device ref smbus on end
+		device ref fast_spi on end
+	end
+end
diff --git a/src/mainboard/system76/mtl/dsdt.asl b/src/mainboard/system76/mtl/dsdt.asl
new file mode 100644
index 0000000000..cf8d58d434
--- /dev/null
+++ b/src/mainboard/system76/mtl/dsdt.asl
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+//TODO: HACK FOR MISSING MISCCFG_GPIO_PM_CONFIG_BITS
+#include <soc/gpio.h>
+
+#include <acpi/acpi.h>
+DefinitionBlock(
+	"dsdt.aml",
+	"DSDT",
+	ACPI_DSDT_REV_2,
+	OEM_ID,
+	ACPI_TABLE_CREATOR,
+	0x20110725
+)
+{
+	#include <acpi/dsdt_top.asl>
+	#include <soc/intel/common/block/acpi/acpi/platform.asl>
+	#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
+
+	Device (\_SB.PCI0)
+	{
+		#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+		#include <soc/intel/meteorlake/acpi/southbridge.asl>
+		#include <soc/intel/meteorlake/acpi/tcss.asl>
+	}
+
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
+
+	Scope (\_SB.PCI0.LPCB)
+	{
+		#include <drivers/pc80/pc/ps2_controller.asl>
+	}
+
+	#include "acpi/mainboard.asl"
+}
diff --git a/src/mainboard/system76/mtl/include/mainboard/gpio.h b/src/mainboard/system76/mtl/include/mainboard/gpio.h
new file mode 100644
index 0000000000..c6393beebb
--- /dev/null
+++ b/src/mainboard/system76/mtl/include/mainboard/gpio.h
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef MAINBOARD_GPIO_H
+#define MAINBOARD_GPIO_H
+
+void mainboard_configure_early_gpios(void);
+void mainboard_configure_gpios(void);
+
+#endif
diff --git a/src/mainboard/system76/mtl/ramstage.c b/src/mainboard/system76/mtl/ramstage.c
new file mode 100644
index 0000000000..a3b12bb1f2
--- /dev/null
+++ b/src/mainboard/system76/mtl/ramstage.c
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <mainboard/gpio.h>
+#include <soc/ramstage.h>
+
+static void mainboard_init(void *chip_info)
+{
+	mainboard_configure_gpios();
+}
+
+struct chip_operations mainboard_ops = {
+	.init = mainboard_init,
+};
diff --git a/src/mainboard/system76/mtl/spd/samsung-M425R1GB4BB0-CQKOD.spd.hex b/src/mainboard/system76/mtl/spd/samsung-M425R1GB4BB0-CQKOD.spd.hex
new file mode 100644
index 0000000000..9104bcf1c1
--- /dev/null
+++ b/src/mainboard/system76/mtl/spd/samsung-M425R1GB4BB0-CQKOD.spd.hex
@@ -0,0 +1,33 @@
+# Samsung M425R1GB4BB0-CQKOD
+30 10 12 03 04 00 40 42 00 00 00 00 90 02 00 00
+00 00 00 00 A0 01 F2 03 7A 0D 00 00 00 00 80 3E
+80 3E 80 3E 00 7D 80 BB 30 75 27 01 A0 00 82 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 88 13 08 88 13 08 20 4E 20 10
+27 10 1A 41 28 10 27 10 C4 09 04 4C 1D 0C 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+10 00 80 B3 80 21 80 B3 82 20 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 0F 01 02 81 00 22 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 09 D1
diff --git a/src/mainboard/system76/mtl/variants/lemp13/board.fmd b/src/mainboard/system76/mtl/variants/lemp13/board.fmd
new file mode 100644
index 0000000000..965e6bc319
--- /dev/null
+++ b/src/mainboard/system76/mtl/variants/lemp13/board.fmd
@@ -0,0 +1,12 @@
+FLASH 32M {
+	SI_DESC 16K
+	SI_ME 10128K
+	SI_BIOS@16M 16M {
+		RW_MRC_CACHE 64K
+		SMMSTORE(PRESERVE) 256K
+		WP_RO {
+			FMAP 4K
+			COREBOOT(CBFS)
+		}
+	}
+}
diff --git a/src/mainboard/system76/mtl/variants/lemp13/board_info.txt b/src/mainboard/system76/mtl/variants/lemp13/board_info.txt
new file mode 100644
index 0000000000..1e2fe1d69a
--- /dev/null
+++ b/src/mainboard/system76/mtl/variants/lemp13/board_info.txt
@@ -0,0 +1,2 @@
+Board name: lemp13
+Release year: 2024
diff --git a/src/mainboard/system76/mtl/variants/lemp13/data.vbt b/src/mainboard/system76/mtl/variants/lemp13/data.vbt
new file mode 100644
index 0000000000000000000000000000000000000000..9218279ba0e6978f4dabfd3b2fd30294774c27ca
GIT binary patch
literal 7680
zcmeHMUrbY182`?_ZK+)u)uL8Jc7_Il30#UYBqZKaK&v3-kECWxsMt=)P#EHZ%NDxH
z1Ie=FK5b}B?3OH9*b6Uv+Jk*q78YL`mu!3365eLaUY7Bw>wf3l(pnYi%-qEFYrcEW
zIp24F=lj0%=YIEg&rtgy@97-u?CtON9qZ(RBBasb^7n9knA!uq1H&D@LEmtDcd!2#
zzen3>Tlt@Nh$4*ba5idMW8nN$bga6+hWCt*jE+ScI-(ceoEo3tL4SbzPM?mBMJG>9
zMI(G*=&+9qykbZD#nG_{KYsDtNOZE514M&1Z`@zsw4ZbDs|{LHgI8-j07+|ObL)YF
z#g2|ne{WAP(Cr%x^d9HE{k$VE;2Rj|>}l^l$%Fm9M*{7E!Oo6iM~(~r@rg^5qi4=e
z@oIk!_hOtni7QR!{_)9)dhQz=<NZSC0`HGrh)%v8jno%A1W<zP7DmJzRFWVR1l?;V
z7uivWfh}Mi%)u_O0+xDdWmF$Y%7;ur-@SISdG1%hm@4WCfbvW`mqTT$C={8M1jgi<
zb`ER4JxeYZo!KdDAu3))3o|Ya64=6EQ|)qEt;F;rK@&M@oNk2$+I6UHMYk<PR@}a!
zSdN-2jrMgK%}r#3T7rxmH4zzs_G4O2R6z-%95rbs)c$z9nhY}3O3F=71r#Xp0Ge!E
z|8n;o=*W@9jR_*!%JheN-c*+!YJ1J<peT48d<lFR{1NyQ@TcG}!C!%IfWHHO5B>%G
zEBJTtrU(XA#L9UZSKum?N~LZ%Zc=7vq*AM1Y}As|O-HfZReRfPx%A}(QR;f>0@=(e
zQQNAEkGMY*vYqv6vdBTnq7^phezr<0?5=&zJ%^o~FJ;$JzCG5`yRF_fPpP#O3hn>X
z2vk>6iQ1Io{6d<tjkQD8n6k`bn_raAKKrB-J1nF)<$Z;@aJQE1#fkXCrkKH(ce(80
zO0#!G^9;^@QFd}Qq^yq+FX7Y}D(BU)(hPz;$AKWuru7jbJ4p9YmFAgiHW56{GpbAg
zfM6wyKxo5mSlbJ&mgf6N)3u58W`!5%DA1hK*0Q`1rg>kPOLyIezzp%A&lll~hUw+L
zvMN0^pS6J*A_pL+Zd=U5h9ie`ZDi4_>xnFa%}jEfL)LsE`Nqpb3w>0fbs6co5Ro)Q
zmPRlopE$f*Z^Xl86}raLbAd=&j7`#uSW!M+RJX<A6N|fnP%C;7iMcT3L)RI%&gQWm
zuGYkpeY2HX@XGcKf=VxlG9sA|f>x_9g=Zt0r%$c{X@iQzBoLl(O~MORWRe2G%JcBz
zP8r36e7ok<{Gyj>gMs}Bgji9FTn}QAuf3|3)|lt5mO4FDmz@ihkfsV7kTS2oFKToO
z$H*Oaxi*Vl={U$-(b?S<91fm3A00b>>Rj|WsF)5u-D@iKN+Yu!T_Rg(;i+5=24v)^
zIix7c7I20{+WMp%L|<_xJt>RTXMcdu^jO+ALceuEBY@QV1O+KV``E{X{03gmh#%Y$
zG_xg_a0=$1P}OUU<}$P~ie}VS-$MTNdy_oYO(XU<<0vw4GRQ;nf$2=84#}Ai$FZ<7
znSSvWhil2qONUA^v0{SPqP8}&dq=Cfni=gLJ@3WK<8XBwd7&;}F>x=9oQ+)}+W-6t
zTVdvJ&i(gG*_p{L*(9~xGP8nQ*#@s2{J>(vc~GE21PT!-MBu-PK<j5pIlVqY6jKbm
z?u2QX?ULVdg*geZevOE$#HuMqA?PymjbF-c--CihXC9iv7mzBvXxY#JEb#K@_`YGC
zXBtgFM?*jJtV^V2(^k%0kd;|nIWpsCM$^`17NU8`s&Zt>X@zu~rsx=b(c;aK-R)sC
zWL;ogWWbgR$VB2~+VWG9kztGDFDDMnij18J$c>W<#fnVXqGdOHH$PnqnI+CBZcVZv
zU7=aE5}0OACS<}t-L^y?>VqsIw83V~){094@;${OE^(xQutwdEUfH;mb_iQM@V$;&
nEOj|{UVR^5?d|xJ1V6I5VT=5JB<JCA^Y=W+5Vits#0dNa%~p2`

literal 0
HcmV?d00001

diff --git a/src/mainboard/system76/mtl/variants/lemp13/gpio.c b/src/mainboard/system76/mtl/variants/lemp13/gpio.c
new file mode 100644
index 0000000000..ccf46f528c
--- /dev/null
+++ b/src/mainboard/system76/mtl/variants/lemp13/gpio.c
@@ -0,0 +1,208 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <mainboard/gpio.h>
+#include <soc/gpio.h>
+
+static const struct pad_config gpio_table[] = {
+	PAD_CFG_NF(GPP_A00, UP_20K, DEEP, NF1), // ESPI_IO0_EC
+	PAD_CFG_NF(GPP_A01, UP_20K, DEEP, NF1), // ESPI_IO1_EC
+	PAD_CFG_NF(GPP_A02, UP_20K, DEEP, NF1), // ESPI_IO2_EC
+	PAD_CFG_NF(GPP_A03, UP_20K, DEEP, NF1), // ESPI_IO3_EC
+	PAD_CFG_NF(GPP_A04, UP_20K, DEEP, NF1), // ESPI_CS_EC#
+	PAD_CFG_NF(GPP_A05, UP_20K, DEEP, NF1), // ESPI_CLK_EC
+	PAD_CFG_NF(GPP_A06, NONE, DEEP, NF1), // ESPI_RESET#
+	PAD_NC(GPP_A07, NONE),
+	PAD_NC(GPP_A08, NONE),
+	PAD_NC(GPP_A09, NONE),
+	PAD_NC(GPP_A10, NONE),
+	PAD_CFG_GPO(GPP_A11, 0, PLTRST),
+	PAD_NC(GPP_A12, NONE),
+	PAD_CFG_TERM_GPO(GPP_A13, 1, UP_20K, PLTRST),
+	PAD_CFG_TERM_GPO(GPP_A14, 0, UP_20K, PLTRST),
+	PAD_CFG_TERM_GPO(GPP_A15, 0, UP_20K, PLTRST),
+	PAD_CFG_NF(GPP_A16, UP_20K, DEEP, NF1),
+	PAD_CFG_GPI_INT(GPP_A17, NONE, PLTRST, LEVEL), // TP_ATTN#
+	PAD_CFG_TERM_GPO(GPP_A18, 0, UP_20K, PLTRST),
+	PAD_CFG_TERM_GPO(GPP_A19, 0, UP_20K, DEEP),
+	PAD_CFG_TERM_GPO(GPP_A20, 0, NATIVE, DEEP),
+	PAD_CFG_NF(GPP_A21, NATIVE, DEEP, NF1),
+	_PAD_CFG_STRUCT(GPP_B00, 0x40100100, 0x0000),
+	PAD_CFG_GPO(GPP_B01, 0, PLTRST),
+	PAD_CFG_GPO(GPP_B02, 0, PLTRST),
+	PAD_CFG_GPO(GPP_B03, 0, PLTRST),
+	PAD_CFG_GPO(GPP_B04, 0, PLTRST),
+	PAD_CFG_GPO(GPP_B05, 1, PLTRST),
+	PAD_CFG_GPO(GPP_B06, 0, DEEP),
+	PAD_CFG_GPO(GPP_B07, 1, DEEP),
+	PAD_CFG_GPO(GPP_B08, 1, DEEP),
+	PAD_CFG_GPI(GPP_B09, NONE, DEEP),
+	PAD_CFG_GPI(GPP_B10, NONE, DEEP),
+	PAD_CFG_NF(GPP_B11, NONE, DEEP, NF2), // CPU_HDMI_HPD
+	PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_B13, NONE, PLTRST, NF1),
+	PAD_CFG_GPO(GPP_B14, 0, PLTRST),
+	PAD_CFG_GPI(GPP_B15, NONE, DEEP),
+	PAD_CFG_GPI(GPP_B16, NONE, DEEP),
+	PAD_CFG_GPO(GPP_B17, 1, PLTRST), // HDMI_EN
+	PAD_CFG_GPO(GPP_B18, 1, PLTRST),
+	PAD_CFG_GPO(GPP_B19, 1, PLTRST),
+	PAD_CFG_GPO(GPP_B20, 1, PLTRST),
+	PAD_CFG_GPO(GPP_B21, 0, PLTRST),
+	PAD_CFG_GPI(GPP_B22, NONE, DEEP),
+	PAD_CFG_GPO(GPP_B23, 1, DEEP),
+	PAD_CFG_NF(GPP_C00, NONE, DEEP, NF1), // SMB_CLK_DDR
+	PAD_CFG_NF(GPP_C01, NONE, DEEP, NF1), // SMB_DATA_DDR
+	PAD_CFG_NF(GPP_C02, NONE, DEEP, NF1), // GPP_C2_STRAP
+	PAD_CFG_NF(GPP_C03, UP_20K, DEEP, NF1), // SML0_CLK
+	PAD_CFG_NF(GPP_C04, UP_20K, DEEP, NF1), // SML0_DATA
+	PAD_CFG_NF(GPP_C05, UP_20K, DEEP, NF1), // GPP_C5_STRAP
+	PAD_CFG_NF(GPP_C06, UP_20K, DEEP, NF1), // TBT_I2C_SCL
+	PAD_CFG_NF(GPP_C07, UP_20K, DEEP, NF1), // TBT_I2C_SDA
+	PAD_CFG_NF(GPP_C08, NONE, DEEP, NF1), // GPP_C08_TEST
+	PAD_CFG_NF(GPP_C09, NONE, DEEP, NF1), // CARD_CLKREQ
+	PAD_CFG_GPO(GPP_C10, 0, PLTRST), // 5G_PCIE_CLKREQ
+	PAD_CFG_NF(GPP_C11, NONE, PWROK, NF1), // WLAN_CLKREQ
+	PAD_CFG_NF(GPP_C12, NONE, PWROK, NF1), // GPP_C13-TEST (typo from schematic)
+	PAD_CFG_GPO(GPP_C13, 1, DEEP),
+	PAD_CFG_NF(GPP_C14, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_C15, NONE, DEEP, NF1), // GPP_C15
+	// GPP_C16 (TBTA_LSX0_TXD) configured by FSP
+	// GPP_C17 (TBTA_LSX0_RXD) configured by FSP
+	// GPP_C18 not connected
+	// GPP_C19 not connected
+	PAD_CFG_NF(GPP_C20, NONE, DEEP, NF2), // HDMI_CTRLCLK
+	PAD_CFG_NF(GPP_C21, NONE, DEEP, NF2), // HDMI_CTRLDATA
+	// GPP_C22 not connected
+	// GPP_C23 not connected
+	PAD_CFG_GPO(GPP_D00, 1, PLTRST),
+	PAD_CFG_GPO(GPP_D01, 1, PLTRST),
+	PAD_CFG_GPO(GPP_D02, 1, PLTRST),
+	PAD_NC(GPP_D03, NONE),
+	PAD_CFG_GPO(GPP_D04, 0, PLTRST),
+	PAD_CFG_GPO(GPP_D05, 1, PLTRST),
+	PAD_CFG_GPO(GPP_D06, 0, PLTRST),
+	PAD_CFG_GPO(GPP_D07, 0, PLTRST),
+	PAD_CFG_GPO(GPP_D08, 0, PLTRST),
+	PAD_CFG_GPO(GPP_D09, 0, PLTRST),
+	PAD_CFG_NF(GPP_D10, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_D11, NATIVE, DEEP, NF1),
+	PAD_CFG_NF(GPP_D12, NATIVE, DEEP, NF1),
+	PAD_CFG_NF(GPP_D13, NATIVE, DEEP, NF1),
+	PAD_CFG_GPO(GPP_D14, 0, PLTRST),
+	PAD_CFG_GPO(GPP_D15, 0, PLTRST),
+	PAD_CFG_GPO(GPP_D16, 0, DEEP),
+	PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
+	PAD_NC(GPP_D18, NONE), // GPP_D18-TEST
+	PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1), // SSD2_CLKREQ
+	PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1), // SSD1_CLKREQ
+	PAD_CFG_NF(GPP_D21, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_D22, NATIVE, DEEP, NF1),
+	PAD_CFG_NF(GPP_D23, NATIVE, DEEP, NF1),
+	PAD_CFG_GPO(GPP_E00, 0, PLTRST),
+	_PAD_CFG_STRUCT(GPP_E01, 0x40100100, 0x1000),
+	PAD_CFG_GPI(GPP_E02, NONE, DEEP),
+	PAD_NC(GPP_E03, NONE),
+	PAD_CFG_GPO(GPP_E04, 0, PLTRST),
+	PAD_CFG_GPO(GPP_E05, 0, PLTRST),
+	PAD_CFG_GPI(GPP_E06, NONE, DEEP),
+	PAD_CFG_GPO(GPP_E07, 0, PLTRST),
+	PAD_CFG_GPO(GPP_E08, 0, PLTRST),
+	PAD_CFG_GPI(GPP_E09, NONE, DEEP),
+	PAD_CFG_GPO(GPP_E10, 0, PLTRST),
+	PAD_CFG_GPI(GPP_E11, NONE, DEEP),
+	_PAD_CFG_STRUCT(GPP_E12, 0x84002200, 0x0000),
+	_PAD_CFG_STRUCT(GPP_E13, 0x44002100, 0x0000),
+	PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
+	PAD_CFG_GPO(GPP_E15, 0, PLTRST),
+	PAD_CFG_NF(GPP_E16, NONE, DEEP, NF2),
+	PAD_CFG_GPO(GPP_E17, 0, PLTRST),
+	PAD_NC(GPP_E18, NONE),
+	PAD_NC(GPP_E19, NONE),
+	PAD_NC(GPP_E20, NONE),
+	PAD_NC(GPP_E21, NONE),
+	PAD_CFG_TERM_GPO(GPP_E22, 0, DN_20K, PLTRST),
+	PAD_CFG_NF(GPP_F00, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_F01, UP_20K, DEEP, NF1),
+	PAD_CFG_NF(GPP_F02, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_F03, UP_20K, DEEP, NF1),
+	PAD_CFG_NF(GPP_F04, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_F05, NONE, DEEP, NF3),
+	PAD_CFG_NF(GPP_F06, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_F07, DN_20K, DEEP, NF1),
+	PAD_CFG_NF(GPP_F08, DN_20K, DEEP, NF1),
+	PAD_CFG_GPI(GPP_F09, NONE, DEEP),
+	PAD_NC(GPP_F10, NONE),
+	PAD_CFG_GPO(GPP_F11, 0, PLTRST),
+	_PAD_CFG_STRUCT(GPP_F12, 0x44002300, 0x0000), // AMP_SMB_CLK
+	_PAD_CFG_STRUCT(GPP_F13, 0x44002300, 0x0000), // AMP_SMB_DATA
+	PAD_CFG_GPO(GPP_F14, 0, PLTRST),
+	PAD_CFG_GPO(GPP_F15, 0, PLTRST),
+	PAD_CFG_GPO(GPP_F16, 0, PLTRST),
+	PAD_CFG_GPO(GPP_F17, 0, PLTRST),
+	PAD_CFG_GPO(GPP_F18, 0, DEEP),
+	PAD_CFG_GPO(GPP_F19, 0, PLTRST),
+	PAD_CFG_GPO(GPP_F20, 0, PLTRST),
+	PAD_CFG_GPO(GPP_F21, 0, PLTRST),
+	PAD_CFG_GPO(GPP_F22, 0, PLTRST),
+	PAD_CFG_GPO(GPP_F23, 0, PLTRST),
+	PAD_CFG_GPO(GPP_H00, 0, PLTRST),
+	PAD_CFG_GPO(GPP_H01, 0, PLTRST),
+	PAD_CFG_GPO(GPP_H02, 1, PLTRST),
+	PAD_NC(GPP_H03, NONE),
+	PAD_NC(GPP_H04, NONE),
+	PAD_NC(GPP_H05, NONE),
+	PAD_NC(GPP_H06, NONE),
+	PAD_NC(GPP_H07, NONE),
+	PAD_NC(GPP_H08, NONE),
+	PAD_NC(GPP_H09, NONE),
+	PAD_CFG_GPO(GPP_H10, 0, PLTRST),
+	PAD_CFG_GPO(GPP_H11, 0, PLTRST),
+	PAD_NC(GPP_H12, NONE),
+	PAD_CFG_NF(GPP_H13, NONE, DEEP, NF1),
+	PAD_CFG_GPO(GPP_H14, 0, PLTRST),
+	PAD_CFG_GPO(GPP_H15, 0, PLTRST),
+	PAD_CFG_GPO(GPP_H16, 0, PLTRST),
+	PAD_CFG_GPO(GPP_H17, 0, PLTRST),
+	PAD_NC(GPP_H18, NONE),
+	PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_H20, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_H21, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_H22, NONE, DEEP, NF1),
+	PAD_CFG_GPO(GPP_S00, 0, PLTRST),
+	PAD_CFG_GPO(GPP_S01, 0, PLTRST),
+	PAD_CFG_GPO(GPP_S02, 0, PLTRST),
+	PAD_CFG_GPO(GPP_S03, 0, PLTRST),
+	PAD_CFG_GPO(GPP_S04, 0, PLTRST),
+	PAD_CFG_GPO(GPP_S05, 0, PLTRST),
+	PAD_CFG_NF(GPP_S06, NONE, DEEP, NF3),
+	PAD_CFG_NF(GPP_S07, NONE, DEEP, NF3),
+	PAD_CFG_NF(GPP_V00, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_V01, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_V02, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_V03, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_V04, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_V05, UP_20K, DEEP, NF1),
+	PAD_CFG_NF(GPP_V06, NATIVE, DEEP, NF1),
+	PAD_CFG_GPI(GPP_V07, NATIVE, DEEP),
+	PAD_CFG_NF(GPP_V08, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_V09, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_V10, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_V11, NONE, DEEP, NF1),
+	PAD_NC(GPP_V12, NONE),
+	PAD_CFG_NF(GPP_V13, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_V14, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_V15, NONE, PLTRST, NF1),
+	PAD_CFG_GPO(GPP_V16, 0, PLTRST),
+	PAD_CFG_GPO(GPP_V17, 0, PLTRST),
+	PAD_NC(GPP_V18, NONE),
+	PAD_CFG_NF(GPP_V19, NONE, DEEP, NF1),
+	PAD_NC(GPP_V20, NONE),
+	PAD_NC(GPP_V21, NONE),
+	PAD_NC(GPP_V22, NONE),
+	PAD_NC(GPP_V23, NONE),
+};
+
+void mainboard_configure_gpios(void)
+{
+	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
+}
diff --git a/src/mainboard/system76/mtl/variants/lemp13/gpio_early.c b/src/mainboard/system76/mtl/variants/lemp13/gpio_early.c
new file mode 100644
index 0000000000..f17db26f3e
--- /dev/null
+++ b/src/mainboard/system76/mtl/variants/lemp13/gpio_early.c
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <mainboard/gpio.h>
+#include <soc/gpio.h>
+
+static const struct pad_config early_gpio_table[] = {
+	PAD_CFG_NF(GPP_C00, NONE, DEEP, NF1), // SMB_CLK
+	PAD_CFG_NF(GPP_C01, NONE, DEEP, NF1), // SMB_DATA
+	PAD_CFG_NF(GPP_H08, NONE, DEEP, NF1), // UART0_RX
+	PAD_CFG_NF(GPP_H09, NONE, DEEP, NF1), // UART0_TX
+};
+
+void mainboard_configure_early_gpios(void)
+{
+	gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
+}
diff --git a/src/mainboard/system76/mtl/variants/lemp13/hda_verb.c b/src/mainboard/system76/mtl/variants/lemp13/hda_verb.c
new file mode 100644
index 0000000000..fa135ad340
--- /dev/null
+++ b/src/mainboard/system76/mtl/variants/lemp13/hda_verb.c
@@ -0,0 +1,50 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+	/* Realtek, ALC245 */
+	0x10ec0245, /* Vendor ID */
+	0x15582624, /* Subsystem ID */
+	34, /* Number of entries */
+
+	AZALIA_SUBVENDOR(0, 0x15582624),
+	AZALIA_RESET(1),
+	AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
+	AZALIA_PIN_CFG(0, 0x13, 0x40000000),
+	AZALIA_PIN_CFG(0, 0x14, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x17, 0x90170110),
+	AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x1d, 0x40689b2d),
+	AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x21, 0x04211020),
+
+	0x05b50006, 0x05b40011, 0x0205001a, 0x0204810b,
+	0x0205004a, 0x02042010, 0x02050038, 0x02046909,
+	0x05c50000, 0x05c43d82, 0x05c50000, 0x05c43d82,
+	0x05350000, 0x0534201a, 0x05350000, 0x0534201a,
+	0x0535001d, 0x05340800, 0x0535001e, 0x05340800,
+	0x05350003, 0x05341ec4, 0x05350004, 0x05340000,
+	0x05450000, 0x05442000, 0x0545001d, 0x05440800,
+	0x0545001e, 0x05440800, 0x05450003, 0x05441ec4,
+	0x05450004, 0x05440000, 0x05350000, 0x0534a01a,
+	0x0205003c, 0x0204f175, 0x0205003c, 0x0204f135,
+	0x02050040, 0x02048800, 0x05a50001, 0x05a4001f,
+	0x02050010, 0x02040020, 0x02050010, 0x02040020,
+	0x0205006b, 0x0204a390, 0x0205006b, 0x0204a390,
+	0x0205006c, 0x02040c9e, 0x0205006d, 0x02040c00,
+	0x00170500, 0x00170500, 0x05a50004, 0x05a40113,
+	0x02050008, 0x02046a8c, 0x02050076, 0x0204f000,
+	0x0205000e, 0x020465c0, 0x02050033, 0x02048580,
+	0x02050069, 0x0204fda8, 0x02050068, 0x02040000,
+	0x02050003, 0x02040002, 0x02050069, 0x02040000,
+	0x02050068, 0x02040001, 0x0205002e, 0x0204290e,
+	0x02050010, 0x02040020, 0x02050010, 0x02040020,
+};
+
+const u32 pc_beep_verbs[] = {};
+
+AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/system76/mtl/variants/lemp13/overridetree.cb b/src/mainboard/system76/mtl/variants/lemp13/overridetree.cb
new file mode 100644
index 0000000000..c40e7070b8
--- /dev/null
+++ b/src/mainboard/system76/mtl/variants/lemp13/overridetree.cb
@@ -0,0 +1,120 @@
+chip soc/intel/meteorlake
+	#TODO: POWER LIMITS
+	#register "power_limits_config[RPL_P_282_242_142_15W_CORE]" = "{
+	#	.tdp_pl1_override = 15,
+	#	.tdp_pl2_override = 46,
+	#}"
+
+	device domain 0 on
+		subsystemid 0x1558 0x2624 inherit
+
+		device ref tbt_pcie_rp0 on end
+		device ref tcss_xhci on
+			register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
+			#TODO: TCP1 is used as USB Type-A
+			register "tcss_ports[1]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
+			#TODO: TCP2 is used as HDMI
+			#TODO: TCP3 goes to redriver, then mux, then USB Type-C
+			register "tcss_ports[3]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
+			chip drivers/usb/acpi
+				device ref tcss_root_hub on
+					chip drivers/usb/acpi
+						register "desc" = ""TBT Type-C""
+						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+						device ref tcss_usb3_port0 on end
+					end
+					chip drivers/usb/acpi
+						register "desc" = ""USB Type-A""
+						register "type" = "UPC_TYPE_USB3_A"
+						device ref tcss_usb3_port1 on end
+					end
+					chip drivers/usb/acpi
+						register "desc" = ""USB Type-C""
+						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+						device ref tcss_usb3_port3 on end
+					end
+				end
+			end
+		end
+		device ref tcss_dma0 on end
+		device ref xhci on
+			register "usb2_ports" = "{
+				[0] = USB2_PORT_MID(OC_SKIP),		/* TODO: USB TYPEA port1 GEN2 */
+				[1] = USB2_PORT_MID(OC_SKIP),		/* TODO: USB TYPEA port2 GEN1 */
+				[2] = USB2_PORT_TYPE_C(OC_SKIP),	/* TODO: TBT TYPEC USB2.0 */
+				[4] = USB2_PORT_TYPE_C(OC_SKIP),	/* TODO: TYPEC USB2.0 */
+				[6] = USB2_PORT_MID(OC_SKIP),		/* Camera */
+				[9] = USB2_PORT_MID(OC_SKIP),		/* Bluetooth */
+			}"
+			register "usb3_ports" = "{
+				[0] = USB3_PORT_DEFAULT(OC_SKIP),	/* TODO: USB port1 GEN1 */
+			}"
+		end
+
+		device ref i2c0 on
+			# Touchpad I2C bus
+			register "serial_io_i2c_mode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
+			chip drivers/i2c/hid
+				register "generic.hid" = ""ELAN0412""
+				register "generic.desc" = ""ELAN Touchpad""
+				register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_A17)"
+				register "generic.detect" = "1"
+				register "hid_desc_reg_offset" = "0x01"
+				device i2c 15 on end
+			end
+			chip drivers/i2c/hid
+				register "generic.hid" = ""FTCS1000""
+				register "generic.desc" = ""FocalTech Touchpad""
+				register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_A17)"
+				register "generic.detect" = "1"
+				register "hid_desc_reg_offset" = "0x01"
+				device i2c 38 on end
+			end
+		end
+		device ref i2c5 on
+			# Smart Amplifier I2C bus
+			register "serial_io_i2c_mode[PchSerialIoIndexI2C5]" = "PchSerialIoPci"
+			chip drivers/i2c/tas5825m
+				register "id" = "0"
+				device i2c 4e on end # (8bit address: 0x9c)
+			end
+		end
+
+		device ref pcie_rp1 on
+			# PCH RP#1 x1, Clock 0 (CARD)
+			register "pcie_rp[PCH_RP(1)]" = "{
+				.clk_src = 0,
+				.clk_req = 0,
+				.flags = PCIE_RP_LTR | PCIE_RP_AER,
+			}"
+		end
+		device ref pcie_rp2 on
+			# PCH RP#2 x1, Clock 2 (WLAN)
+			register "pcie_rp[PCH_RP(2)]" = "{
+				.clk_src = 2,
+				.clk_req = 2,
+				.flags = PCIE_RP_LTR | PCIE_RP_AER,
+			}"
+		end
+		device ref pcie_rp10 on
+			# PCH RP#10 x4, Clock 7 (SSD2)
+			# This uses signals PCIE_13 through PCIE_16 in the schematics
+			# but is identified as root port 10 in firmware.
+			register "pcie_rp[PCH_RP(10)]" = "{
+				.clk_src = 7,
+				.clk_req = 7,
+				.flags = PCIE_RP_LTR | PCIE_RP_AER,
+			}"
+		end
+		device ref pcie_rp11 on
+			# CPU RP#11 x4, Clock 8 (SSD1)
+			# This uses signals PCIE_17 through PCIE_20 in the schematics
+			# but is identified as root port 11 in firmware.
+			register "pcie_rp[PCIE_RP(11)]" = "{
+				.clk_src = 8,
+				.clk_req = 8,
+				.flags = PCIE_RP_LTR | PCIE_RP_AER,
+			}"
+		end
+	end
+end
diff --git a/src/mainboard/system76/mtl/variants/lemp13/ramstage.c b/src/mainboard/system76/mtl/variants/lemp13/ramstage.c
new file mode 100644
index 0000000000..d0c9766a3f
--- /dev/null
+++ b/src/mainboard/system76/mtl/variants/lemp13/ramstage.c
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/ramstage.h>
+
+void mainboard_silicon_init_params(FSP_S_CONFIG *params)
+{
+	// TODO: Pin Mux settings
+
+	// Enable TCP1 and TCP3 USB-A conversion
+	// BIT 0:3 is mapping to PCH XHCI USB2 port
+	// BIT 4:5 is reserved
+	// BIT 6 is orientational
+	// BIT 7 is enable
+	params->EnableTcssCovTypeA[1] = 0x81;
+	params->EnableTcssCovTypeA[3] = 0x85;
+
+	// Enable reporting CPU C10 state over eSPI.
+	params->PchEspiHostC10ReportEnable = 1;
+}
diff --git a/src/mainboard/system76/mtl/variants/lemp13/romstage.c b/src/mainboard/system76/mtl/variants/lemp13/romstage.c
new file mode 100644
index 0000000000..c8c623fc19
--- /dev/null
+++ b/src/mainboard/system76/mtl/variants/lemp13/romstage.c
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/meminit.h>
+#include <soc/romstage.h>
+
+void mainboard_memory_init_params(FSPM_UPD *mupd)
+{
+	const struct mb_cfg board_cfg = {
+		.type = MEM_TYPE_DDR5,
+		.ect = true,
+		.LpDdrDqDqsReTraining = 1,
+	};
+	const struct mem_spd spd_info = {
+		.topo = MEM_TOPO_MIXED,
+		.cbfs_index = 0,
+		.smbus[1] = { .addr_dimm[0] = 0x52, },
+	};
+	const bool half_populated = false;
+
+	mupd->FspmConfig.DmiMaxLinkSpeed = 4;
+	mupd->FspmConfig.GpioOverride = 0;
+
+	memcfg_init(mupd, &board_cfg, &spd_info, half_populated);
+}
diff --git a/src/mainboard/system76/mtl/variants/lemp13/tas5825m.c b/src/mainboard/system76/mtl/variants/lemp13/tas5825m.c
new file mode 100644
index 0000000000..171d9c1ed2
--- /dev/null
+++ b/src/mainboard/system76/mtl/variants/lemp13/tas5825m.c
@@ -0,0 +1,1049 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <delay.h>
+#include <drivers/i2c/tas5825m/tas5825m.h>
+
+int tas5825m_setup(struct device *dev, int id)
+{
+	int res;
+
+	res = tas5825m_set_book(dev, 0x00);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x03, 0x02);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x01, 0x11);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x03, 0x02);
+	if (res < 0)
+		return res;
+
+	mdelay(5);
+
+	res = tas5825m_write_at(dev, 0x03, 0x12);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x48, 0x0C);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x7F, 0x64);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_set_page(dev, 0x01);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0xFE, 0x00, 0x40, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x50, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x00, 0x82, 0x00, 0x93, 0x00, 0xFC, 0x00, 0x00,
+			0x8F, 0x00, 0xFF, 0xEF, 0x84, 0x49, 0x03, 0x27,
+			0x84, 0x02, 0x04, 0x06, 0x02, 0x60, 0x00, 0x01,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x02);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x02, 0x70, 0x00, 0x06, 0x02, 0x78, 0x00, 0x05,
+			0x02, 0x68, 0x00, 0x02, 0x02, 0x28, 0x03, 0x4D,
+			0x84, 0x2A, 0x04, 0x00, 0xE2, 0x57, 0x91, 0x9F,
+			0x84, 0x82, 0x20, 0xE0, 0x84, 0x82, 0x04, 0x01,
+			0xF0, 0x1C, 0x31, 0xA0, 0xF0, 0x1C, 0x31, 0xA1,
+			0xF0, 0x1C, 0x31, 0xA2, 0xF0, 0x1F, 0x31, 0xA3,
+			0xE4, 0x00, 0x11, 0xA6, 0x80, 0x27, 0x80, 0xE1,
+			0xF4, 0x00, 0x11, 0xA4, 0xF4, 0x1D, 0x31, 0xA5,
+			0xF4, 0x1C, 0x31, 0xA7, 0xF4, 0x1F, 0x31, 0xA8,
+			0x02, 0x78, 0x00, 0x03, 0xE2, 0x68, 0xF1, 0xC3,
+			0x80, 0x67, 0x80, 0xE9, 0x84, 0x4B, 0x03, 0x27,
+			0x02, 0x70, 0x00, 0x04, 0x84, 0x41, 0x03, 0x37,
+			0x80, 0x07, 0x00, 0x80, 0xE0, 0x00, 0x11, 0xA9,
+			0x84, 0x82, 0x00, 0xE0, 0x8E, 0xFC, 0x04, 0x10,
+			0xF0, 0x1C, 0x11, 0xAA, 0xF0, 0x1C, 0x11, 0xAB,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x03);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0xF0, 0x1C, 0x11, 0xAC, 0xF0, 0x1F, 0x11, 0xAD,
+			0x86, 0xA1, 0x01, 0xC2, 0x80, 0x27, 0x80, 0xE8,
+			0x60, 0x00, 0x00, 0x00, 0x84, 0x43, 0x03, 0x37,
+			0x80, 0x00, 0x00, 0x81, 0x0D, 0x00, 0x10, 0x20,
+			0x84, 0x51, 0x03, 0x3E, 0x08, 0x44, 0x26, 0x30,
+			0x84, 0xC3, 0x03, 0x47, 0x84, 0xC2, 0x40, 0xE0,
+			0x8C, 0xFF, 0x03, 0x23, 0xE0, 0x10, 0x11, 0xB3,
+			0xF0, 0x1C, 0x51, 0xB4, 0xF0, 0x1C, 0x51, 0xB5,
+			0xF0, 0x1C, 0x51, 0xB6, 0xF0, 0x1F, 0x51, 0xB7,
+			0x86, 0xA1, 0x01, 0xC6, 0x80, 0x27, 0x80, 0xEA,
+			0x84, 0x53, 0x03, 0x3E, 0x84, 0x82, 0x04, 0x05,
+			0x84, 0x51, 0x03, 0x75, 0xE2, 0x6B, 0xC0, 0x00,
+			0x80, 0x07, 0x00, 0x80, 0xE0, 0x80, 0x31, 0xB8,
+			0x84, 0x82, 0x40, 0xE0, 0xF0, 0x1C, 0x51, 0xB9,
+			0xF0, 0x1C, 0x51, 0xBA, 0xF0, 0x1C, 0x51, 0xBB,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x04);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0xF0, 0x1F, 0x51, 0xBC, 0x86, 0xA1, 0x01, 0xC5,
+			0x80, 0x27, 0x80, 0xEA, 0x60, 0x00, 0x00, 0x00,
+			0x80, 0x00, 0x00, 0x81, 0x84, 0xA1, 0x03, 0x4F,
+			0xE0, 0x80, 0xA0, 0x00, 0x01, 0x07, 0x11, 0x20,
+			0x08, 0x44, 0x26, 0x30, 0x08, 0x00, 0x98, 0x4A,
+			0x84, 0x53, 0x03, 0x75, 0x08, 0x00, 0x30, 0x48,
+			0x02, 0xCA, 0x00, 0x01, 0x08, 0x60, 0x26, 0x32,
+			0x84, 0x51, 0x03, 0x45, 0xE4, 0x10, 0x40, 0x00,
+			0x80, 0x40, 0xC0, 0x82, 0x84, 0xC2, 0x40, 0xE0,
+			0x84, 0xC3, 0x03, 0x5E, 0x08, 0x00, 0x50, 0x48,
+			0xE0, 0x10, 0x11, 0xBD, 0x02, 0xC2, 0x00, 0x02,
+			0x08, 0x60, 0x06, 0x12, 0x84, 0xD3, 0x03, 0x4F,
+			0xF0, 0x1C, 0x51, 0xBE, 0xF0, 0x1C, 0x51, 0xBF,
+			0xF0, 0x1C, 0x51, 0xC0, 0xF0, 0x1F, 0x51, 0xC1,
+			0x84, 0xA1, 0x03, 0x65, 0x80, 0x27, 0x80, 0xEA,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x05);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0xE0, 0x00, 0x00, 0x00, 0x80, 0x07, 0x00, 0x83,
+			0x08, 0x00, 0x98, 0x6B, 0x08, 0x00, 0x30, 0x68,
+			0x84, 0x53, 0x03, 0x45, 0x08, 0x60, 0x26, 0x33,
+			0x84, 0x51, 0x03, 0x25, 0xE4, 0x10, 0x60, 0x00,
+			0x80, 0x40, 0xC0, 0x81, 0x02, 0x70, 0x00, 0x7F,
+			0x08, 0x00, 0x50, 0x28, 0x08, 0x60, 0x06, 0x11,
+			0x84, 0xCB, 0x03, 0x65, 0xE0, 0x10, 0x51, 0xC4,
+			0x84, 0x80, 0x41, 0x00, 0x02, 0xA3, 0x00, 0x10,
+			0xE4, 0x00, 0x00, 0x00, 0x84, 0xD0, 0x04, 0x01,
+			0x84, 0xA2, 0x04, 0x03, 0x84, 0xD2, 0x50, 0x01,
+			0x84, 0x53, 0x03, 0x25, 0x80, 0x00, 0xC4, 0x04,
+			0x8F, 0x30, 0x00, 0x00, 0x88, 0x67, 0x03, 0x00,
+			0xE4, 0x00, 0x11, 0x9B, 0xEE, 0x64, 0x60, 0x00,
+			0x02, 0xD3, 0x00, 0x10, 0x88, 0x47, 0x00, 0x80,
+			0x10, 0x00, 0x18, 0x02, 0x86, 0xC1, 0x01, 0x9D,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x06);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0xE0, 0x10, 0x31, 0xC7, 0x86, 0xC9, 0x01, 0x9E,
+			0x80, 0x00, 0xC4, 0x02, 0x02, 0x50, 0x01, 0x9C,
+			0x00, 0xFF, 0x21, 0x65, 0x00, 0xFC, 0x00, 0x00,
+			0x02, 0x60, 0x00, 0x01, 0x02, 0x70, 0x00, 0x04,
+			0x84, 0xC8, 0x04, 0x10, 0x84, 0x41, 0x03, 0x67,
+			0x84, 0x51, 0x03, 0x6D, 0x84, 0xC0, 0x04, 0x02,
+			0x04, 0x80, 0x91, 0x20, 0x08, 0x60, 0x26, 0x30,
+			0x02, 0x78, 0x00, 0x03, 0x02, 0x68, 0x00, 0x02,
+			0x0D, 0x00, 0x10, 0x10, 0x08, 0x60, 0x06, 0x12,
+			0x84, 0x49, 0x03, 0x2F, 0xE0, 0x80, 0x71, 0xA9,
+			0x02, 0x28, 0x03, 0x55, 0x84, 0x82, 0x00, 0xE0,
+			0x84, 0x2A, 0x04, 0x00, 0xF0, 0x1C, 0x11, 0xAA,
+			0xF0, 0x1C, 0x11, 0xAB, 0xF0, 0x1C, 0x11, 0xAC,
+			0xF0, 0x1F, 0x11, 0xAD, 0x86, 0xA1, 0x01, 0xAE,
+			0x80, 0x27, 0x80, 0xE8, 0x84, 0x82, 0x04, 0x07,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x07);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0xE0, 0x80, 0x60, 0x00, 0x84, 0x82, 0x40, 0xE0,
+			0x84, 0x43, 0x03, 0x67, 0xF0, 0x1C, 0x51, 0xAF,
+			0xF0, 0x1C, 0x51, 0xB0, 0xF0, 0x1C, 0x51, 0xB1,
+			0xF0, 0x1F, 0x51, 0xB2, 0x02, 0x78, 0x00, 0x05,
+			0x80, 0x27, 0x80, 0xEA, 0x84, 0x82, 0x04, 0x08,
+			0x02, 0x70, 0x00, 0x06, 0x84, 0x53, 0x03, 0x6D,
+			0x84, 0x80, 0x04, 0x07, 0xE0, 0x00, 0x00, 0x82,
+			0xF0, 0x81, 0x00, 0x80, 0x80, 0x07, 0x12, 0xBC,
+			0x86, 0xA1, 0x01, 0x9F, 0xE2, 0x57, 0xA0, 0x00,
+			0x84, 0x82, 0x04, 0x09, 0x84, 0x82, 0x20, 0xE0,
+			0xF0, 0x1C, 0x31, 0xA0, 0xF0, 0x1C, 0x31, 0xA1,
+			0xF0, 0x1C, 0x31, 0xA2, 0xF0, 0x1F, 0x31, 0xA3,
+			0xE4, 0x00, 0x11, 0xA6, 0x80, 0x27, 0x80, 0xE1,
+			0xF4, 0x00, 0x11, 0xA4, 0xF4, 0x1D, 0x31, 0xA5,
+			0xF4, 0x1C, 0x31, 0xA7, 0xF4, 0x1F, 0x31, 0xA8,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x08);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x02, 0x78, 0x00, 0x03, 0xE2, 0x6A, 0xF1, 0xC3,
+			0x80, 0x67, 0x80, 0xE9, 0x84, 0x4B, 0x03, 0x2F,
+			0x02, 0x70, 0x00, 0x04, 0x84, 0x59, 0x03, 0x3D,
+			0x80, 0x07, 0x00, 0x80, 0xE0, 0x00, 0x11, 0xA9,
+			0x84, 0x82, 0x60, 0xE0, 0x8E, 0xFC, 0x04, 0x10,
+			0xF0, 0x1C, 0x71, 0xAA, 0xF0, 0x1C, 0x71, 0xAB,
+			0xF0, 0x1C, 0x71, 0xAC, 0xF0, 0x1F, 0x71, 0xAD,
+			0x86, 0xA1, 0x01, 0xC2, 0x80, 0x27, 0x80, 0xEB,
+			0x60, 0x00, 0x00, 0x00, 0x84, 0x5B, 0x03, 0x3D,
+			0x80, 0x00, 0x00, 0x81, 0x0D, 0x00, 0x10, 0x20,
+			0x84, 0x59, 0x03, 0x3F, 0x08, 0x44, 0x26, 0x30,
+			0x84, 0xC3, 0x03, 0x57, 0x84, 0xC2, 0x60, 0xE0,
+			0xE0, 0x10, 0x11, 0xB3, 0xF0, 0x1C, 0x71, 0xB4,
+			0xF0, 0x1C, 0x71, 0xB5, 0xF0, 0x1C, 0x71, 0xB6,
+			0xF0, 0x1F, 0x71, 0xB7, 0x86, 0xA1, 0x01, 0xC6,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x09);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x80, 0x27, 0x80, 0xEB, 0x84, 0x5B, 0x03, 0x3F,
+			0x84, 0x82, 0x04, 0x0D, 0x84, 0x41, 0x03, 0x76,
+			0xE2, 0x6B, 0xE0, 0x00, 0x80, 0x07, 0x00, 0x80,
+			0xE0, 0x81, 0x31, 0xB8, 0x84, 0x82, 0x00, 0xE0,
+			0xF0, 0x1C, 0x11, 0xB9, 0xF0, 0x1C, 0x11, 0xBA,
+			0xF0, 0x1C, 0x11, 0xBB, 0xF0, 0x1F, 0x11, 0xBC,
+			0x86, 0xA1, 0x01, 0xC5, 0x80, 0x27, 0x80, 0xE8,
+			0x60, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x81,
+			0x84, 0xA1, 0x03, 0x5D, 0xE0, 0x81, 0xA0, 0x00,
+			0x01, 0x07, 0x11, 0x20, 0x08, 0x44, 0x26, 0x30,
+			0x08, 0x00, 0x98, 0x4A, 0x84, 0x43, 0x03, 0x76,
+			0x08, 0x00, 0x30, 0x48, 0x02, 0xCA, 0x00, 0x01,
+			0x08, 0x60, 0x26, 0x32, 0x84, 0x41, 0x03, 0x46,
+			0xE4, 0x10, 0x40, 0x00, 0x80, 0x40, 0xC0, 0x82,
+			0x84, 0xC2, 0x00, 0xE0, 0x84, 0xC3, 0x03, 0x5F,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0A);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x08, 0x00, 0x50, 0x48, 0xE0, 0x10, 0x11, 0xBD,
+			0x02, 0xC2, 0x00, 0x02, 0x08, 0x60, 0x06, 0x12,
+			0x84, 0xD3, 0x03, 0x5D, 0xF0, 0x1C, 0x11, 0xBE,
+			0xF0, 0x1C, 0x11, 0xBF, 0xF0, 0x1C, 0x11, 0xC0,
+			0xF0, 0x1F, 0x11, 0xC1, 0x84, 0xA1, 0x03, 0x66,
+			0x80, 0x27, 0x80, 0xE8, 0xE0, 0x00, 0x00, 0x00,
+			0x80, 0x07, 0x00, 0x83, 0x08, 0x00, 0x98, 0x6B,
+			0x08, 0x00, 0x30, 0x68, 0x84, 0x43, 0x03, 0x46,
+			0x08, 0x60, 0x26, 0x33, 0x84, 0x51, 0x03, 0x26,
+			0xE4, 0x10, 0x60, 0x00, 0x80, 0x40, 0xC0, 0x81,
+			0x02, 0x70, 0x00, 0x7F, 0x08, 0x00, 0x50, 0x28,
+			0x08, 0x60, 0x06, 0x11, 0x8C, 0xFF, 0x03, 0x24,
+			0x84, 0xCB, 0x03, 0x66, 0xE0, 0x10, 0x51, 0xC4,
+			0x84, 0x80, 0x41, 0x00, 0x02, 0xA3, 0x00, 0x10,
+			0xE4, 0x00, 0x00, 0x00, 0x84, 0xD0, 0x04, 0x09,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0B);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x84, 0xA2, 0x04, 0x0B, 0x84, 0xD2, 0x50, 0x01,
+			0x84, 0x53, 0x03, 0x26, 0x80, 0x00, 0xC4, 0x0C,
+			0x8F, 0x30, 0x00, 0x00, 0x88, 0x67, 0x03, 0x00,
+			0xE4, 0x00, 0x11, 0x9B, 0xEE, 0x64, 0x80, 0x00,
+			0x02, 0xD3, 0x00, 0x10, 0x88, 0x47, 0x00, 0x80,
+			0x10, 0x00, 0x18, 0x02, 0x86, 0xC1, 0x01, 0x9D,
+			0xE0, 0x10, 0x31, 0xC7, 0x86, 0xC9, 0x01, 0x9E,
+			0x80, 0x00, 0xC4, 0x0A, 0x02, 0x50, 0x01, 0x9C,
+			0x00, 0xFF, 0x21, 0x65, 0x00, 0xFC, 0x00, 0x00,
+			0x02, 0x70, 0x00, 0x04, 0x02, 0x68, 0x00, 0x01,
+			0x02, 0x60, 0x00, 0x03, 0x02, 0x78, 0x00, 0x02,
+			0x84, 0x49, 0x03, 0x6E, 0x84, 0x41, 0x03, 0x6F,
+			0x84, 0xC8, 0x04, 0x10, 0x84, 0xC0, 0x04, 0x0A,
+			0x04, 0x81, 0x91, 0x20, 0x08, 0x60, 0x26, 0x30,
+			0x0D, 0x00, 0x10, 0x10, 0x08, 0x60, 0x06, 0x12,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0C);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x84, 0x00, 0x04, 0x06, 0xE0, 0x81, 0x71, 0xA9,
+			0x84, 0x82, 0x20, 0xE8, 0xF0, 0x1D, 0x31, 0xAA,
+			0xF0, 0x1D, 0x31, 0xAB, 0xF0, 0x1D, 0x31, 0xAC,
+			0xF0, 0x1C, 0x31, 0xAD, 0x86, 0xA1, 0x01, 0xAE,
+			0x80, 0x27, 0x80, 0xF9, 0x84, 0x82, 0x04, 0x0E,
+			0xE0, 0x81, 0x60, 0x00, 0x84, 0x82, 0x00, 0xE8,
+			0x84, 0x4B, 0x03, 0x6E, 0xF0, 0x1D, 0x11, 0xAF,
+			0xF0, 0x1D, 0x11, 0xB0, 0xF0, 0x1D, 0x11, 0xB1,
+			0xF0, 0x1C, 0x11, 0xB2, 0x02, 0xA3, 0x00, 0x1A,
+			0x80, 0x27, 0x80, 0xF8, 0x84, 0x82, 0x04, 0x0F,
+			0xE0, 0x81, 0xC0, 0x00, 0xF0, 0x81, 0xE0, 0x80,
+			0x84, 0x43, 0x03, 0x6F, 0x80, 0x07, 0x12, 0xBD,
+			0x02, 0xC0, 0x00, 0x00, 0x00, 0xFC, 0x50, 0x00,
+			0x8F, 0x00, 0x00, 0x11, 0x8F, 0x00, 0xFF, 0xFF,
+			0x84, 0x58, 0x04, 0x01, 0x84, 0xC2, 0x04, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0D);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x02, 0xC2, 0x60, 0x00, 0x84, 0xA0, 0x61, 0x00,
+			0xE0, 0x20, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+			0x40, 0x40, 0xA0, 0x00, 0x80, 0x00, 0xC0, 0x82,
+			0x08, 0xFC, 0x48, 0x3A, 0x08, 0xFC, 0x18, 0x50,
+			0x00, 0xFC, 0x00, 0x00, 0xE0, 0x10, 0x00, 0x00,
+			0x86, 0xA0, 0x41, 0x00, 0x40, 0x47, 0x20, 0x00,
+			0x80, 0x00, 0xC0, 0x83, 0x04, 0xE0, 0x3D, 0x1E,
+			0x04, 0x80, 0x11, 0xE0, 0x08, 0x44, 0x26, 0x33,
+			0x02, 0xCB, 0x00, 0x10, 0xE0, 0x10, 0x40, 0x83,
+			0x08, 0x00, 0x28, 0x21, 0x84, 0xCA, 0x61, 0x00,
+			0x80, 0x07, 0x00, 0x81, 0x0C, 0xE0, 0x2C, 0x09,
+			0x84, 0xCA, 0x21, 0x00, 0x00, 0xFC, 0x50, 0x00,
+			0x8F, 0x00, 0x00, 0x01, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_book(dev, 0x78);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_set_page(dev, 0x18);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x30, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x1B);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x03, 0x80, 0x00, 0x00, 0x04, 0x00,
+			0x00, 0x00, 0x03, 0x28, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x6C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x1C);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x03, 0x30, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x1C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x03, 0x38, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x3C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x03, 0x40, 0x00, 0x00, 0x03, 0x48,
+			0x00, 0x00, 0x03, 0x50, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x54, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x03, 0x58, 0x00, 0x00, 0x03, 0x60,
+			0x00, 0x00, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x74, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x1D);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x1C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x3C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x1E);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x03, 0x68, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x0C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x03, 0x70, 0x00, 0x00, 0x03, 0x78,
+			0x00, 0x00, 0x04, 0x80, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x24, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x04, 0x88, 0x00, 0x00, 0x04, 0x90,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x44, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_book(dev, 0x8C);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_set_page(dev, 0x0E);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0xA7, 0x26, 0x4A, 0x7F, 0xFF, 0xFF, 0xFF,
+			0x00, 0x20, 0xC4, 0x9C, 0x00, 0x20, 0xC4, 0x9C,
+			0x00, 0x00, 0x68, 0xDB, 0x00, 0x00, 0xD1, 0xB7,
+			0x00, 0x00, 0x68, 0xDB, 0x0F, 0xA4, 0xA8, 0xC1,
+			0xF8, 0x59, 0x7F, 0x63, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x5C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0F);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x07, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x2F, 0xB7, 0xE9,
+			0x00, 0x5F, 0x6F, 0xD2, 0x00, 0x2F, 0xB7, 0xE9,
+			0x0B, 0x1E, 0x4F, 0x76, 0xFC, 0x23, 0x05, 0x54,
+			0xFA, 0x41, 0x20, 0x5C, 0x0B, 0x7D, 0xBF, 0x48,
+			0xFA, 0x41, 0x20, 0x5C, 0x0B, 0x1E, 0x4F, 0x76,
+			0xFC, 0x23, 0x05, 0x54, 0x00, 0x04, 0x81, 0x6F,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x0F, 0x3F, 0xE5, 0xC9, 0xF8, 0xBB, 0x98, 0xC8,
+			0x07, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x81, 0x6F,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x0F, 0x3F, 0xE5, 0xC9, 0xF8, 0xBB, 0x98, 0xC8,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x10);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x89, 0xA0, 0x27, 0x7F, 0xEC, 0x56, 0xD5,
+			0x7F, 0xFC, 0xB9, 0x23, 0x00, 0x89, 0xA0, 0x27,
+			0x7F, 0xEC, 0x56, 0xD5, 0x7F, 0xFC, 0xB9, 0x23,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_book(dev, 0x00);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x40, 0x00);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x11, 0xFF, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x7D, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x01);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x51, 0x05);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_set_page(dev, 0x02);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x19, 0xDF);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_set_page(dev, 0x00);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x46, 0x11);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x02, 0x00);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x53, 0x01);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x54, 0x17);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x03, 0x02);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x7F, 0x8C);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_set_page(dev, 0x01);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x71, 0x94, 0x9A, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x2C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0A);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
+			0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x64, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0B);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x80, 0x00, 0x00, 0x00, 0x28, 0x7A, 0x27,
+			0x00, 0x28, 0x7A, 0x27, 0x00, 0x80, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x80, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x57, 0x62, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x28, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0E);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x03, 0x69, 0xC5, 0x00, 0xEE, 0xC9, 0x55,
+			0x00, 0x22, 0x1D, 0x95, 0x00, 0x03, 0x69, 0xC5,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x5C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0F);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x7F, 0xF9, 0x2C, 0x60, 0x07, 0x77, 0x1A, 0x4F,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x5C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x07);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x80, 0x00, 0x00, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x64, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	{
+		const uint8_t values[] = {
+			0x40, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x6C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_book(dev, 0xAA);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_set_page(dev, 0x01);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x30, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x02);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x03);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x07, 0xC5, 0xCA, 0x98,
+			0xF0, 0x74, 0x6A, 0xD0, 0x07, 0xC5, 0xCA, 0x98,
+			0x0F, 0x8A, 0x9A, 0x1D, 0xF8, 0x73, 0x6F, 0xBD,
+			0x07, 0xCC, 0x4D, 0x23, 0xF0, 0x8F, 0xEC, 0x92,
+			0x07, 0xA8, 0xA9, 0xB4, 0x0F, 0x70, 0x13, 0x6E,
+			0xF8, 0x8B, 0x09, 0x29, 0x08, 0x2F, 0x93, 0x82,
+			0xF0, 0x34, 0x1D, 0x7A, 0x07, 0xA1, 0x4F, 0x7F,
+			0x0F, 0xCD, 0x63, 0x79, 0xF8, 0x30, 0x9D, 0xF2,
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x04);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x05);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x07, 0xC5, 0xCA, 0x98, 0xF0, 0x74, 0x6A, 0xD0,
+			0x07, 0xC5, 0xCA, 0x98, 0x0F, 0x8A, 0x9A, 0x1D,
+			0xF8, 0x73, 0x6F, 0xBD, 0x07, 0xCC, 0x4D, 0x23,
+			0xF0, 0x8F, 0xEC, 0x92, 0x07, 0xA8, 0xA9, 0xB4,
+			0x0F, 0x70, 0x13, 0x6E, 0xF8, 0x8B, 0x09, 0x29,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x06);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x08, 0x2F, 0x93, 0x82, 0xF0, 0x34, 0x1D, 0x7A,
+			0x07, 0xA1, 0x4F, 0x7F, 0x0F, 0xCD, 0x63, 0x79,
+			0xF8, 0x30, 0x9D, 0xF2, 0x08, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0E);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x00, 0x91, 0xDC, 0xC5, 0xFF, 0x04, 0xF3, 0x02,
+			0x00, 0x6E, 0x34, 0x0A, 0x0F, 0xD6, 0x6C, 0x7A,
+			0xF8, 0x24, 0x8F, 0xB5, 0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x6C, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_page(dev, 0x0F);
+	if (res < 0)
+		return res;
+
+	{
+		const uint8_t values[] = {
+			0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0xFF, 0xF4, 0x49, 0x81,
+			0xFF, 0xE8, 0x93, 0x02, 0xFF, 0xF4, 0x49, 0x81,
+			0x0D, 0x94, 0x7A, 0x64, 0xFA, 0x3C, 0xAB, 0xA1,
+			0x06, 0xD5, 0xF3, 0xB1, 0xF2, 0x54, 0x18, 0x9F,
+			0x06, 0xD5, 0xF3, 0xB1, 0x0D, 0x94, 0x7A, 0x64,
+			0xFA, 0x3C, 0xAB, 0xA1, 0x00, 0x00, 0x38, 0xE4,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x0F, 0xD5, 0x55, 0x55, 0xF8, 0x2A, 0x71, 0xC7,
+			0x00
+		};
+		res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+		if (res < 0)
+			return res;
+	}
+
+	res = tas5825m_set_book(dev, 0x00);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x30, 0x00);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x60, 0x02);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x62, 0x09);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x4C, 0x30);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x03, 0x03);
+	if (res < 0)
+		return res;
+
+	res = tas5825m_write_at(dev, 0x78, 0x80);
+	if (res < 0)
+		return res;
+
+	return 0;
+}