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AGESA: Use common romstage ram stack

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Change-Id: Ie120360fa79aa0f6f6d82606838404bb0b0d9681
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15466
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki
2016-06-27 16:15:02 +03:00
parent a2a7e981d6
commit bce9bbdfd4
3 changed files with 8 additions and 5 deletions
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4
src/northbridge/amd/agesa/oem_s3.c
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@@ -17,6 +17,7 @@
#include <spi_flash.h>
#include <string.h>
#include <cbmem.h>
#include <program_loading.h>
#include <cpu/amd/agesa/s3_resume.h>
#include <northbridge/amd/agesa/agesawrapper.h>
#include <AGESA.h>
@@ -119,8 +120,7 @@ AGESA_STATUS OemS3Save(AMD_S3SAVE_PARAMS *S3SaveParams)
u32 MTRRStorageSize = 0;
uintptr_t pos, size;
if (HIGH_ROMSTAGE_STACK_SIZE)
cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK, HIGH_ROMSTAGE_STACK_SIZE);
romstage_ram_stack_base(HIGH_ROMSTAGE_STACK_SIZE, ROMSTAGE_STACK_CBMEM);
/* To be consumed in AmdInitResume. */
get_s3nv_data(S3DataTypeNonVolatile, &pos, &size);