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x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer

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On x86, change the type of the address parameter in
read8()/read16/read32()/write8()/write16()/write32() to be a
pointer, instead of unsigned long.

Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330
Signed-off-by: Kevin Paul Herbert <kph@meraki.net>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7784
Tested-by: build bot (Jenkins)
This commit is contained in:
Kevin Paul Herbert
2014-12-24 18:43:20 -08:00
committed by Alexandru Gagniuc
parent 4b10dec1a6
commit bde6d309df
354 changed files with 1900 additions and 1684 deletions
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12
src/soc/intel/baytrail/lpe.c
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@@ -90,7 +90,7 @@ static void lpe_enable_acpi_mode(device_t dev)
static void setup_codec_clock(device_t dev)
{
uint32_t reg;
int clk_reg;
u32 *clk_reg;
struct soc_intel_baytrail_config *config;
const char *freq_str;
@@ -119,8 +119,8 @@ static void setup_codec_clock(device_t dev)
printk(BIOS_DEBUG, "LPE Audio codec clock set to %sMHz.\n", freq_str);
clk_reg = PMC_BASE_ADDRESS + PLT_CLK_CTL_0;
clk_reg += 4 * config->lpe_codec_clk_num;
clk_reg = (u32 *)(PMC_BASE_ADDRESS + PLT_CLK_CTL_0);
clk_reg += config->lpe_codec_clk_num;
write32(clk_reg, (read32(clk_reg) & ~0x7) | reg);
}
@@ -144,8 +144,10 @@ static void lpe_stash_firmware_info(device_t dev)
/* C0 and later steppings use an offset in the MMIO space. */
if (pattrs->stepping >= STEP_C0) {
mmio = find_resource(dev, PCI_BASE_ADDRESS_0);
write32(mmio->base + FIRMWARE_REG_BASE_C0, res->base);
write32(mmio->base + FIRMWARE_REG_LENGTH_C0, res->size);
write32((u32 *)(uintptr_t)(mmio->base + FIRMWARE_REG_BASE_C0),
res->base);
write32((u32 *)(uintptr_t)(mmio->base + FIRMWARE_REG_LENGTH_C0),
res->size);
}
}