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x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer

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On x86, change the type of the address parameter in
read8()/read16/read32()/write8()/write16()/write32() to be a
pointer, instead of unsigned long.

Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330
Signed-off-by: Kevin Paul Herbert <kph@meraki.net>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7784
Tested-by: build bot (Jenkins)
This commit is contained in:
Kevin Paul Herbert
2014-12-24 18:43:20 -08:00
committed by Alexandru Gagniuc
parent 4b10dec1a6
commit bde6d309df
354 changed files with 1900 additions and 1684 deletions
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7
src/soc/intel/broadwell/sata.c
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@@ -45,7 +45,8 @@ static inline void sir_write(struct device *dev, int idx, u32 value)
static void sata_init(struct device *dev)
{
config_t *config = dev->chip_info;
u32 reg32, abar;
u32 reg32;
u8 *abar;
u16 reg16;
printk(BIOS_DEBUG, "SATA: Initializing controller in AHCI mode.\n");
@@ -107,8 +108,8 @@ static void sata_init(struct device *dev)
pci_write_config32(dev, 0x94, reg32);
/* Initialize AHCI memory-mapped space */
abar = pci_read_config32(dev, PCI_BASE_ADDRESS_5);
printk(BIOS_DEBUG, "ABAR: %08X\n", abar);
abar = (u8 *)(pci_read_config32(dev, PCI_BASE_ADDRESS_5));
printk(BIOS_DEBUG, "ABAR: %p\n", abar);
/* CAP (HBA Capabilities) : enable power management */
reg32 = read32(abar + 0x00);