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acpi: Change Processor ACPI Name (Intel only)

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The ACPI Spec 2.0 states, that Processor declarations should be made
within the ACPI namespace \_SB and not \_PR anymore. \_PR is deprecated
and is removed here for Intel CPUs only.

Tested on:
* X11SSH (Kabylake)
* CFL Platform
* Asus P8Z77-V LX2 and Windows 10

FWTS does not return FAIL anymore on ACPI tests

Tested-by: Angel Pons <th3fanbus@gmail.com>
Change-Id: Ib101ed718f90f9056d2ecbc31b13b749ed1fc438
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37814
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Christian Walter
2019-12-18 15:07:59 +01:00
committed by Nico Huber
parent 09eb8d0c9b
commit be3979c873
30 changed files with 140 additions and 137 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/soc/intel/baytrail/acpi.c
View File

@@ -419,7 +419,7 @@ void generate_cpu_entries(struct device *device)
plen = 0;
}
/* Generate processor \_PR.CPUx */
/* Generate processor \_SB.CPUx */
acpigen_write_processor(
core, pcontrol_blk, plen);

38
src/soc/intel/baytrail/acpi/dptf/cpu.asl
View File

@@ -12,11 +12,11 @@
* GNU General Public License for more details.
*/
External (\_PR.CP00._TSS, MethodObj)
External (\_PR.CP00._TPC, MethodObj)
External (\_PR.CP00._PTC, PkgObj)
External (\_PR.CP00._TSD, PkgObj)
External (\_PR.CP00._PSS, MethodObj)
External (\_SB.CP00._TSS, MethodObj)
External (\_SB.CP00._TPC, MethodObj)
External (\_SB.CP00._PTC, PkgObj)
External (\_SB.CP00._TSD, PkgObj)
External (\_SB.CP00._PSS, MethodObj)
Device (TCPU)
{
@@ -38,8 +38,8 @@ Device (TCPU)
Method (_TSS)
{
If (CondRefOf (\_PR.CP00._TSS)) {
Return (\_PR.CP00._TSS)
If (CondRefOf (\_SB.CP00._TSS)) {
Return (\_SB.CP00._TSS)
} Else {
Return (Package ()
{
@@ -50,8 +50,8 @@ Device (TCPU)
Method (_TPC)
{
If (CondRefOf (\_PR.CP00._TPC)) {
Return (\_PR.CP00._TPC)
If (CondRefOf (\_SB.CP00._TPC)) {
Return (\_SB.CP00._TPC)
} Else {
Return (0)
}
@@ -59,8 +59,8 @@ Device (TCPU)
Method (_PTC)
{
If (CondRefOf (\_PR.CP00._PTC)) {
Return (\_PR.CP00._PTC)
If (CondRefOf (\_SB.CP00._PTC)) {
Return (\_SB.CP00._PTC)
} Else {
Return (Package ()
{
@@ -72,8 +72,8 @@ Device (TCPU)
Method (_TSD)
{
If (CondRefOf (\_PR.CP00._TSD)) {
Return (\_PR.CP00._TSD)
If (CondRefOf (\_SB.CP00._TSD)) {
Return (\_SB.CP00._TSD)
} Else {
Return (Package ()
{
@@ -84,8 +84,8 @@ Device (TCPU)
Method (_TDL)
{
If (CondRefOf (\_PR.CP00._TSS)) {
Store (SizeOf (\_PR.CP00._TSS ()), Local0)
If (CondRefOf (\_SB.CP00._TSS)) {
Store (SizeOf (\_SB.CP00._TSS ()), Local0)
Decrement (Local0)
Return (Local0)
} Else {
@@ -112,8 +112,8 @@ Device (TCPU)
Method (_PSS)
{
If (CondRefOf (\_PR.CP00._PSS)) {
Return (\_PR.CP00._PSS)
If (CondRefOf (\_SB.CP00._PSS)) {
Return (\_SB.CP00._PSS)
} Else {
Return (Package ()
{
@@ -127,8 +127,8 @@ Device (TCPU)
/* Check for mainboard specific _PDL override */
If (CondRefOf (\_SB.MPDL)) {
Return (\_SB.MPDL)
} ElseIf (CondRefOf (\_PR.CP00._PSS)) {
Store (SizeOf (\_PR.CP00._PSS ()), Local0)
} ElseIf (CondRefOf (\_SB.CP00._PSS)) {
Store (SizeOf (\_SB.CP00._PSS ()), Local0)
Decrement (Local0)
Return (Local0)
} Else {

2
src/soc/intel/braswell/acpi.c
View File

@@ -422,7 +422,7 @@ void generate_cpu_entries(struct device *device)
plen = 0;
}
/* Generate processor \_PR.CPUx */
/* Generate processor \_SB.CPUx */
acpigen_write_processor(core, pcontrol_blk, plen);
/* Generate P-state tables */

38
src/soc/intel/braswell/acpi/dptf/cpu.asl
View File

@@ -41,11 +41,11 @@
#define DPTF_CPU_ACTIVE_AC4 50
#endif
External (\_PR.CP00._TSS, MethodObj)
External (\_PR.CP00._TPC, MethodObj)
External (\_PR.CP00._PTC, PkgObj)
External (\_PR.CP00._TSD, PkgObj)
External (\_PR.CP00._PSS, MethodObj)
External (\_SB.CP00._TSS, MethodObj)
External (\_SB.CP00._TPC, MethodObj)
External (\_SB.CP00._PTC, PkgObj)
External (\_SB.CP00._TSD, PkgObj)
External (\_SB.CP00._PSS, MethodObj)
Device (B0DB)
{
@@ -66,8 +66,8 @@ Device (B0DB)
Method (_TSS)
{
If (CondRefOf (\_PR.CP00._TSS)) {
Return (\_PR.CP00._TSS)
If (CondRefOf (\_SB.CP00._TSS)) {
Return (\_SB.CP00._TSS)
} Else {
Return (Package ()
{
@@ -78,8 +78,8 @@ Device (B0DB)
Method (_TPC)
{
If (CondRefOf (\_PR.CP00._TPC)) {
Return (\_PR.CP00._TPC)
If (CondRefOf (\_SB.CP00._TPC)) {
Return (\_SB.CP00._TPC)
} Else {
Return (0)
}
@@ -87,8 +87,8 @@ Device (B0DB)
Method (_PTC)
{
If (CondRefOf (\_PR.CP00._PTC)) {
Return (\_PR.CP00._PTC)
If (CondRefOf (\_SB.CP00._PTC)) {
Return (\_SB.CP00._PTC)
} Else {
Return (Package ()
{
@@ -100,8 +100,8 @@ Device (B0DB)
Method (_TSD)
{
If (CondRefOf (\_PR.CP00._TSD)) {
Return (\_PR.CP00._TSD)
If (CondRefOf (\_SB.CP00._TSD)) {
Return (\_SB.CP00._TSD)
} Else {
Return (Package ()
{
@@ -112,8 +112,8 @@ Device (B0DB)
Method (_TDL)
{
If (CondRefOf (\_PR.CP00._TSS)) {
Store (SizeOf (\_PR.CP00._TSS ()), Local0)
If (CondRefOf (\_SB.CP00._TSS)) {
Store (SizeOf (\_SB.CP00._TSS ()), Local0)
Decrement (Local0)
Return (Local0)
} Else {
@@ -140,8 +140,8 @@ Device (B0DB)
Method (_PSS)
{
If (CondRefOf (\_PR.CP00._PSS)) {
Return (\_PR.CP00._PSS)
If (CondRefOf (\_SB.CP00._PSS)) {
Return (\_SB.CP00._PSS)
} Else {
Return (Package ()
{
@@ -155,8 +155,8 @@ Device (B0DB)
/* Check for mainboard specific _PDL override */
If (CondRefOf (\_SB.MPDL)) {
Return (\_SB.MPDL)
} ElseIf (CondRefOf (\_PR.CP00._PSS)) {
Store (SizeOf (\_PR.CP00._PSS ()), Local0)
} ElseIf (CondRefOf (\_SB.CP00._PSS)) {
Store (SizeOf (\_SB.CP00._PSS ()), Local0)
Decrement (Local0)
Return (Local0)
} Else {

2
src/soc/intel/broadwell/acpi.c
View File

@@ -517,7 +517,7 @@ void generate_cpu_entries(struct device *device)
plen = 0;
}
/* Generate processor \_PR.CPUx */
/* Generate processor \_SB.CPUx */
acpigen_write_processor(
(cpuID - 1) * cores_per_package+coreID - 1,
pcontrol_blk, plen);

6
src/soc/intel/broadwell/acpi/ctdp.asl
View File

@@ -71,16 +71,16 @@ Scope (\_SB.PCI0.MCHC)
* Package (6) { freq, power, tlat, blat, control, status }
* }
*/
External (\_PR.CP00._PSS)
External (\_SB.CP00._PSS)
Method (PSSS, 1, NotSerialized)
{
Store (One, Local0) /* Start at P1 */
Store (SizeOf (\_PR.CP00._PSS), Local1)
Store (SizeOf (\_SB.CP00._PSS), Local1)
While (LLess (Local0, Local1)) {
/* Store _PSS entry Control value to Local2 */
ShiftRight (DeRefOf (Index (DeRefOf (Index
(\_PR.CP00._PSS, Local0)), 4)), 8, Local2)
(\_SB.CP00._PSS, Local0)), 4)), 8, Local2)
If (LEqual (Local2, Arg0)) {
Return (Subtract (Local0, 1))
}

38
src/soc/intel/common/acpi/dptf/cpu.asl
View File

@@ -12,11 +12,11 @@
* GNU General Public License for more details.
*/
External (\_PR.CP00._PSS, PkgObj)
External (\_PR.CP00._TSS, PkgObj)
External (\_PR.CP00._TPC, MethodObj)
External (\_PR.CP00._PTC, PkgObj)
External (\_PR.CP00._TSD, PkgObj)
External (\_SB.CP00._PSS, PkgObj)
External (\_SB.CP00._TSS, PkgObj)
External (\_SB.CP00._TPC, MethodObj)
External (\_SB.CP00._PTC, PkgObj)
External (\_SB.CP00._TSD, PkgObj)
External (\_SB.MPDL, IntObj)
Device (DPTF_CPU_DEVICE)
@@ -38,8 +38,8 @@ Device (DPTF_CPU_DEVICE)
Method (_TSS)
{
If (CondRefOf (\_PR.CP00._TSS)) {
Return (\_PR.CP00._TSS)
If (CondRefOf (\_SB.CP00._TSS)) {
Return (\_SB.CP00._TSS)
} Else {
Return (Package ()
{
@@ -50,8 +50,8 @@ Device (DPTF_CPU_DEVICE)
Method (_TPC)
{
If (CondRefOf (\_PR.CP00._TPC)) {
Return (\_PR.CP00._TPC)
If (CondRefOf (\_SB.CP00._TPC)) {
Return (\_SB.CP00._TPC)
} Else {
Return (0)
}
@@ -59,8 +59,8 @@ Device (DPTF_CPU_DEVICE)
Method (_PTC)
{
If (CondRefOf (\_PR.CP00._PTC)) {
Return (\_PR.CP00._PTC)
If (CondRefOf (\_SB.CP00._PTC)) {
Return (\_SB.CP00._PTC)
} Else {
Return (Package ()
{
@@ -72,8 +72,8 @@ Device (DPTF_CPU_DEVICE)
Method (_TSD)
{
If (CondRefOf (\_PR.CP00._TSD)) {
Return (\_PR.CP00._TSD)
If (CondRefOf (\_SB.CP00._TSD)) {
Return (\_SB.CP00._TSD)
} Else {
Return (Package ()
{
@@ -84,8 +84,8 @@ Device (DPTF_CPU_DEVICE)
Method (_TDL)
{
If (CondRefOf (\_PR.CP00._TSS)) {
Store (SizeOf (\_PR.CP00._TSS), Local0)
If (CondRefOf (\_SB.CP00._TSS)) {
Store (SizeOf (\_SB.CP00._TSS), Local0)
Decrement (Local0)
Return (Local0)
} Else {
@@ -112,8 +112,8 @@ Device (DPTF_CPU_DEVICE)
Method (_PSS)
{
If (CondRefOf (\_PR.CP00._PSS)) {
Return (\_PR.CP00._PSS)
If (CondRefOf (\_SB.CP00._PSS)) {
Return (\_SB.CP00._PSS)
} Else {
Return (Package ()
{
@@ -128,8 +128,8 @@ Device (DPTF_CPU_DEVICE)
/* Check for mainboard specific _PDL override */
If (CondRefOf (\_SB.MPDL)) {
Return (\_SB.MPDL)
} ElseIf (CondRefOf (\_PR.CP00._PSS)) {
Store (SizeOf (\_PR.CP00._PSS), Local0)
} ElseIf (CondRefOf (\_SB.CP00._PSS)) {
Store (SizeOf (\_SB.CP00._PSS), Local0)
Decrement (Local0)
Return (Local0)
} Else {

2
src/soc/intel/common/block/acpi/acpi.c
View File

@@ -433,7 +433,7 @@ void generate_cpu_entries(struct device *device)
plen = 0;
}
/* Generate processor \_PR.CPUx */
/* Generate processor \_SB.CPUx */
acpigen_write_processor((cpu_id) * cores_per_package +
core_id, pcontrol_blk, plen);

2
src/soc/intel/skylake/acpi.c
View File

@@ -522,7 +522,7 @@ void generate_cpu_entries(struct device *device)
plen = 0;
}
/* Generate processor \_PR.CPUx */
/* Generate processor \_SB.CPUx */
acpigen_write_processor(
cpu_id*cores_per_package+core_id,
pcontrol_blk, plen);

10
src/soc/intel/skylake/acpi/dptf/cpu.asl
View File

@@ -20,7 +20,7 @@
#define DPTF_CPU_CRITICAL 90
#endif
External (\_PR.CP00._PSS, PkgObj)
External (\_SB.CP00._PSS, PkgObj)
External (\_SB.MPDL, IntObj)
Device (B0D4)
@@ -55,8 +55,8 @@ Device (B0D4)
Method (_PSS)
{
If (CondRefOf (\_PR.CP00._PSS)) {
Return (\_PR.CP00._PSS)
If (CondRefOf (\_SB.CP00._PSS)) {
Return (\_SB.CP00._PSS)
} Else {
Return (Package ()
{
@@ -71,8 +71,8 @@ Device (B0D4)
/* Check for mainboard specific _PDL override */
If (CondRefOf (\_SB.MPDL)) {
Return (\_SB.MPDL)
} ElseIf (CondRefOf (\_PR.CP00._PSS)) {
Store (SizeOf (\_PR.CP00._PSS), Local0)
} ElseIf (CondRefOf (\_SB.CP00._PSS)) {
Store (SizeOf (\_SB.CP00._PSS), Local0)
Decrement (Local0)
Return (Local0)
} Else {