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This, ladies and gentlement, is commit #4000.

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Use the (almost) same strict CFLAGS in v2 that we use on v3. And fix a few
include files and missing prototypes. Also, fix up the Config-abuild.lb files
to properly work for cross compiling.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4000 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
2009-03-13 15:42:27 +00:00
committed by Stefan Reinauer
parent cc46e73a02
commit be7f79867e
44 changed files with 136 additions and 109 deletions
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20
targets/digitallogic/msm586seg/Config-abuild.lb
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@@ -1,24 +1,16 @@
target digitallogic_msm586seg
mainboard digitallogic/msm586seg
target VENDOR_MAINBOARD
mainboard VENDOR/MAINBOARD
option DEFAULT_CONSOLE_LOGLEVEL=9
option MAXIMUM_CONSOLE_LOGLEVEL=9
option CONFIG_COMPRESS=0
option CC="CROSSCC"
option CROSS_COMPILE="CROSS_PREFIX"
option HOSTCC="CROSS_HOSTCC"
__COMPRESSION__
option CONFIG_CONSOLE_VGA=1
romimage "fallback"
option FALLBACK_SIZE = 256 * 1024
# option ROM_SIZE=512*1024
# option ROM_SECTION_SIZE=512*1024
option USE_FALLBACK_IMAGE=1
# option ROM_IMAGE_SIZE=32 * 1024 # 0x8000
option ROM_IMAGE_SIZE=128 * 1024 # 0x10000
# option ROM_IMAGE_SIZE=512 * 1024 # 0x10000
option ROM_IMAGE_SIZE= 128 * 1024
option COREBOOT_EXTRA_VERSION=".0Fallback"
payload __PAYLOAD__
end

9
targets/gigabyte/ga_2761gxdk/Config-abuild.lb
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@@ -18,8 +18,13 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
target gigabyte_ga_2761gxdk
mainboard gigabyte/ga_2761gxdk
target VENDOR_MAINBOARD
mainboard VENDOR/MAINBOARD
option CC="CROSSCC"
option CROSS_COMPILE="CROSS_PREFIX"
option HOSTCC="CROSS_HOSTCC"
__COMPRESSION__

8
targets/iei/juki-511p/Config-abuild.lb
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@@ -1,7 +1,9 @@
# abuild config file for JUKI-511P
target VENDOR_MAINBOARD
mainboard VENDOR/MAINBOARD
target iei_juki-511p
mainboard iei/juki-511p
option CC="CROSSCC"
option CROSS_COMPILE="CROSS_PREFIX"
option HOSTCC="CROSS_HOSTCC"
__COMPRESSION__

8
targets/msi/ms7260/Config-abuild.lb
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@@ -18,8 +18,12 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
target msi_ms7260
mainboard msi/ms7260
target VENDOR_MAINBOARD
mainboard VENDOR/MAINBOARD
option CC="CROSSCC"
option CROSS_COMPILE="CROSS_PREFIX"
option HOSTCC="CROSS_HOSTCC"
__COMPRESSION__

10
targets/rca/rm4100/Config-abuild.lb
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@@ -18,8 +18,14 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
target rca_rm4100
mainboard rca/rm4100
target VENDOR_MAINBOARD
mainboard VENDOR/MAINBOARD
option CC="CROSSCC"
option CROSS_COMPILE="CROSS_PREFIX"
option HOSTCC="CROSS_HOSTCC"
__COMPRESSION__
romimage "fallback"
option USE_FALLBACK_IMAGE = 1

15
targets/technologic/ts5300/Config-abuild.lb
View File

@@ -1,20 +1,17 @@
target technologic_ts5300
mainboard technologic/ts5300
target VENDOR_MAINBOARD
mainboard VENDOR/MAINBOARD
option DEFAULT_CONSOLE_LOGLEVEL=9
option MAXIMUM_CONSOLE_LOGLEVEL=9
option CONFIG_COMPRESS=0
option CC="CROSSCC"
option CROSS_COMPILE="CROSS_PREFIX"
option HOSTCC="CROSS_HOSTCC"
__COMPRESSION__
romimage "fallback"
option FALLBACK_SIZE = 256 * 1024
# option ROM_SIZE=512*1024
# option ROM_SECTION_SIZE=512*1024
option USE_FALLBACK_IMAGE=1
# option ROM_IMAGE_SIZE=32 * 1024 # 0x8000
option ROM_IMAGE_SIZE=128 * 1024 # 0x10000
option COREBOOT_EXTRA_VERSION=".0Fallback"
option COREBOOT_EXTRA_VERSION=".0-Fallback"
payload __PAYLOAD__
end

10
targets/thomson/ip1000/Config-abuild.lb
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@@ -18,8 +18,14 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
target thomson_ip1000
mainboard thomson/ip1000
target VENDOR_MAINBOARD
mainboard VENDOR/MAINBOARD
option CC="CROSSCC"
option CROSS_COMPILE="CROSS_PREFIX"
option HOSTCC="CROSS_HOSTCC"
__COMPRESSION__
romimage "fallback"
option USE_FALLBACK_IMAGE = 1

28
targets/via/epia-m/Config-abuild.lb
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@@ -1,32 +1,14 @@
# abuild config file for EPIA-M
target VENDOR_MAINBOARD
mainboard VENDOR/MAINBOARD
target via_epia-m
mainboard via/epia-m
option MAXIMUM_CONSOLE_LOGLEVEL=8
option DEFAULT_CONSOLE_LOGLEVEL=8
option CONFIG_CONSOLE_SERIAL8250=1
option CC="CROSSCC"
option CROSS_COMPILE="CROSS_PREFIX"
option HOSTCC="CROSS_HOSTCC"
__COMPRESSION__
option ROM_SIZE=256*1024
option HAVE_OPTION_TABLE=1
option CONFIG_ROM_PAYLOAD=1
option HAVE_FALLBACK_BOOT=1
###
### Compute the location and size of where this firmware image
### (coreboot plus bootloader) will live in the boot rom chip.
###
option FALLBACK_SIZE=131072
## Coreboot C code runs at this location in RAM
option _RAMBASE=0x00004000
#
# Via EPIA M
#
romimage "normal"
option USE_FALLBACK_IMAGE=0
option ROM_IMAGE_SIZE=64*1024