sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

minor reformat

Browse Source 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1892 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Li-Ta Lo
2005-01-19 23:19:26 +00:00
parent af02157530
commit bec039cb93
7 changed files with 26 additions and 33 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
src/cpu/amd/mtrr/amd_mtrr.c
View File

@@ -17,7 +17,6 @@ static unsigned long resk(uint64_t value)
return resultk;
}
#if 1
static unsigned fixed_mtrr_index(unsigned long addrk)
{
unsigned index;
@@ -34,7 +33,6 @@ static unsigned fixed_mtrr_index(unsigned long addrk)
return index;
}
static unsigned int mtrr_msr[] = {
MTRRfix64K_00000_MSR, MTRRfix16K_80000_MSR, MTRRfix16K_A0000_MSR,
MTRRfix4K_C0000_MSR, MTRRfix4K_C8000_MSR, MTRRfix4K_D0000_MSR, MTRRfix4K_D8000_MSR,
@@ -98,14 +96,11 @@ static void set_fixed_mtrr_resource(void *gp, struct device *dev, struct resourc
return;
}
printk_debug("Setting fixed MTRRs(%d-%d) Type: WB\n",
start_mtrr, last_mtrr);
start_mtrr, last_mtrr);
set_fixed_mtrrs(start_mtrr, last_mtrr, MTRR_TYPE_WRBACK | MTRR_READ_MEM | MTRR_WRITE_MEM);
}
#endif
void amd_setup_mtrrs(void)
{
struct mem_state state;
@@ -120,7 +115,7 @@ void amd_setup_mtrrs(void)
printk_debug("\n");
/* Initialized the fixed_mtrrs to uncached */
printk_debug("Setting fixed MTRRs(%d-%d) type: UC\n",
0, NUM_FIXED_RANGES);
0, NUM_FIXED_RANGES);
set_fixed_mtrrs(0, NUM_FIXED_RANGES, MTRR_TYPE_UNCACHEABLE);
/* Except for the PCI MMIO hole just before 4GB there are no

7
src/cpu/x86/mtrr/earlymtrr.c
View File

@@ -37,8 +37,8 @@ static void disable_var_mtrr(unsigned reg)
wrmsr(MTRRphysMask_MSR(reg), zero);
}
static void set_var_mtrr(
unsigned reg, unsigned base, unsigned size, unsigned type)
static void set_var_mtrr(unsigned reg, unsigned base, unsigned size,
unsigned type)
{
/* Bit Bit 32-35 of MTRRphysMask should be set to 1 */
@@ -59,7 +59,6 @@ static void cache_lbmem(int type)
enable_cache();
}
/* the fixed and variable MTTRs are power-up with random values,
* clear them to MTRR_TYPE_UNCACHEABLE for safty.
*/
@@ -77,7 +76,7 @@ static void do_early_mtrr_init(const unsigned long *mtrr_msrs)
msr.lo = 0;
msr.hi = 0;
unsigned long msr_nr;
for(msr_addr = mtrr_msrs; (msr_nr = *msr_addr); msr_addr++) {
for (msr_addr = mtrr_msrs; (msr_nr = *msr_addr); msr_addr++) {
wrmsr(msr_nr, msr);
}