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soc/amd/common: add Kconfig help text to pre-family-17h-only blocks

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The cpu/car code only applies to pre-family-17h CPUs that still use
cache as RAM (CAR) and the PI code only applies to the pre-FSP vendor
code blob binaryPI interface.

Change-Id: I5a13d7e202bb745255fabb46110850c36b07de7a
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47274
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2020-11-06 00:26:03 +01:00 committed by Patrick Georgi
parent 4a08736242
commit befec1e92e
2 changed files with 5 additions and 1 deletions
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3
src/soc/amd/common/block/cpu/Kconfig
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@ -8,3 +8,6 @@ config SOC_AMD_COMMON_BLOCK_CAR
it may not be appropriate for a romstage implementation without
additional consideration. If this option is not used, the SOC must
implement these functions separately.
This is only used for AMD CPU before family 17h. From family 17h on
the RAM is already initialized by the PSP before the x86 cores are
released from reset.

3
src/soc/amd/common/block/pi/Kconfig
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@ -3,7 +3,8 @@ config SOC_AMD_COMMON_BLOCK_PI
select HAVE_DEBUG_RAM_SETUP
default n
help
This option builds functions that interface AMD's AGESA.
This option builds functions that interface AMD's AGESA reference
code packaged in the binaryPI form.
if SOC_AMD_COMMON_BLOCK_PI