soc/amd/common/include: introduce and use FCH_IRQ_ROUTING_ENTRIES

Instead of using magic constants for the fch_pic_routing and
fch_apic_routing array sizes, define FCH_IRQ_ROUTING_ENTRIES in the
common code headers and use this definition. This also allows to drop
the static assert for the array sizes. In the Stoneyridge mainboard code
the equivalent arrays are named mainboard_picr_data and
mainboard_intr_data; also use FCH_IRQ_ROUTING_ENTRIES as fixed array
size there.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I2d7ee46bd013ce413189398a144e46ceac0c2a10
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68818
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2022-10-25 18:18:36 +02:00
parent 886c1ffc65
commit bf26485d36
12 changed files with 24 additions and 46 deletions

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@ -27,11 +27,8 @@
* Index/Data pair. These values are chipset and mainboard * Index/Data pair. These values are chipset and mainboard
* dependent and should be updated accordingly. * dependent and should be updated accordingly.
*/ */
static uint8_t fch_pic_routing[0x80]; static uint8_t fch_pic_routing[FCH_IRQ_ROUTING_ENTRIES];
static uint8_t fch_apic_routing[0x80]; static uint8_t fch_apic_routing[FCH_IRQ_ROUTING_ENTRIES];
_Static_assert(sizeof(fch_pic_routing) == sizeof(fch_apic_routing),
"PIC and APIC FCH interrupt tables must be the same size");
static const struct fch_irq_routing bilby_fch[] = { static const struct fch_irq_routing bilby_fch[] = {
{ PIRQ_A, 8, 16 }, { PIRQ_A, 8, 16 },

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@ -18,11 +18,8 @@
* Index/Data pair. These values are chipset and mainboard * Index/Data pair. These values are chipset and mainboard
* dependent and should be updated accordingly. * dependent and should be updated accordingly.
*/ */
static uint8_t fch_pic_routing[0x80]; static uint8_t fch_pic_routing[FCH_IRQ_ROUTING_ENTRIES];
static uint8_t fch_apic_routing[0x80]; static uint8_t fch_apic_routing[FCH_IRQ_ROUTING_ENTRIES];
_Static_assert(sizeof(fch_pic_routing) == sizeof(fch_apic_routing),
"PIC and APIC FCH interrupt tables must be the same size");
/* /*
* This controls the device -> IRQ routing. * This controls the device -> IRQ routing.

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@ -16,11 +16,8 @@
* Index/Data pair. These values are chipset and mainboard * Index/Data pair. These values are chipset and mainboard
* dependent and should be updated accordingly. * dependent and should be updated accordingly.
*/ */
static uint8_t fch_pic_routing[0x80]; static uint8_t fch_pic_routing[FCH_IRQ_ROUTING_ENTRIES];
static uint8_t fch_apic_routing[0x80]; static uint8_t fch_apic_routing[FCH_IRQ_ROUTING_ENTRIES];
_Static_assert(sizeof(fch_pic_routing) == sizeof(fch_apic_routing),
"PIC and APIC FCH interrupt tables must be the same size");
/* /*
* This controls the device -> IRQ routing. * This controls the device -> IRQ routing.

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@ -19,7 +19,7 @@
* These values are used by the PCI configuration space, * These values are used by the PCI configuration space,
* MP Tables. TODO: Make ACPI use these values too. * MP Tables. TODO: Make ACPI use these values too.
*/ */
static const u8 mainboard_picr_data[] = { static const u8 mainboard_picr_data[FCH_IRQ_ROUTING_ENTRIES] = {
[0x00] = 0x03, 0x04, 0x05, 0x07, 0x0B, 0x0A, 0x1F, 0x1F, [0x00] = 0x03, 0x04, 0x05, 0x07, 0x0B, 0x0A, 0x1F, 0x1F,
[0x08] = 0xFA, 0xF1, 0x00, 0x00, 0x1F, 0x1F, 0x1F, 0x1F, [0x08] = 0xFA, 0xF1, 0x00, 0x00, 0x1F, 0x1F, 0x1F, 0x1F,
[0x10] = 0x1F, 0x1F, 0x1F, 0x03, 0x1F, 0x1F, 0x1F, 0x1F, [0x10] = 0x1F, 0x1F, 0x1F, 0x03, 0x1F, 0x1F, 0x1F, 0x1F,
@ -38,7 +38,7 @@ static const u8 mainboard_picr_data[] = {
[0x78] = 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, [0x78] = 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F,
}; };
static const u8 mainboard_intr_data[] = { static const u8 mainboard_intr_data[FCH_IRQ_ROUTING_ENTRIES] = {
[0x00] = 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, [0x00] = 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
[0x08] = 0x00, 0x00, 0x00, 0x00, 0x1F, 0x1F, 0x1F, 0x1F, [0x08] = 0x00, 0x00, 0x00, 0x00, 0x1F, 0x1F, 0x1F, 0x1F,
[0x10] = 0x09, 0x1F, 0x1F, 0x10, 0x1F, 0x1F, 0x1F, 0x10, [0x10] = 0x09, 0x1F, 0x1F, 0x10, 0x1F, 0x1F, 0x1F, 0x10,

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@ -15,11 +15,8 @@
* Index/Data pair. These values are chipset and mainboard * Index/Data pair. These values are chipset and mainboard
* dependent and should be updated accordingly. * dependent and should be updated accordingly.
*/ */
static uint8_t fch_pic_routing[0x80]; static uint8_t fch_pic_routing[FCH_IRQ_ROUTING_ENTRIES];
static uint8_t fch_apic_routing[0x80]; static uint8_t fch_apic_routing[FCH_IRQ_ROUTING_ENTRIES];
_Static_assert(sizeof(fch_pic_routing) == sizeof(fch_apic_routing),
"PIC and APIC FCH interrupt tables must be the same size");
/* /*
* This controls the device -> IRQ routing. * This controls the device -> IRQ routing.

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@ -22,11 +22,8 @@
* Index/Data pair. These values are chipset and mainboard * Index/Data pair. These values are chipset and mainboard
* dependent and should be updated accordingly. * dependent and should be updated accordingly.
*/ */
static uint8_t fch_pic_routing[0x80]; static uint8_t fch_pic_routing[FCH_IRQ_ROUTING_ENTRIES];
static uint8_t fch_apic_routing[0x80]; static uint8_t fch_apic_routing[FCH_IRQ_ROUTING_ENTRIES];
_Static_assert(sizeof(fch_pic_routing) == sizeof(fch_apic_routing),
"PIC and APIC FCH interrupt tables must be the same size");
static const struct fch_irq_routing mandolin_fch[] = { static const struct fch_irq_routing mandolin_fch[] = {
{ PIRQ_A, 8, 16 }, { PIRQ_A, 8, 16 },

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@ -20,7 +20,7 @@
* These values are used by the PCI configuration space, * These values are used by the PCI configuration space,
* MP Tables. * MP Tables.
*/ */
static const u8 mainboard_picr_data[] = { static const u8 mainboard_picr_data[FCH_IRQ_ROUTING_ENTRIES] = {
[0x00] = 0x03, 0x04, 0x05, 0x07, 0x0B, 0x0A, 0x1F, 0x1F, [0x00] = 0x03, 0x04, 0x05, 0x07, 0x0B, 0x0A, 0x1F, 0x1F,
[0x08] = 0xFA, 0xF1, 0x00, 0x00, 0x1F, 0x1F, 0x1F, 0x1F, [0x08] = 0xFA, 0xF1, 0x00, 0x00, 0x1F, 0x1F, 0x1F, 0x1F,
[0x10] = 0x1F, 0x1F, 0x1F, 0x03, 0x1F, 0x1F, 0x1F, 0x1F, [0x10] = 0x1F, 0x1F, 0x1F, 0x03, 0x1F, 0x1F, 0x1F, 0x1F,
@ -39,7 +39,7 @@ static const u8 mainboard_picr_data[] = {
[0x78] = 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, [0x78] = 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F,
}; };
static const u8 mainboard_intr_data[] = { static const u8 mainboard_intr_data[FCH_IRQ_ROUTING_ENTRIES] = {
[0x00] = 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, [0x00] = 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
[0x08] = 0x00, 0x00, 0x00, 0x00, 0x1F, 0x1F, 0x1F, 0x1F, [0x08] = 0x00, 0x00, 0x00, 0x00, 0x1F, 0x1F, 0x1F, 0x1F,
[0x10] = 0x09, 0x1F, 0x1F, 0x10, 0x1F, 0x1F, 0x1F, 0x10, [0x10] = 0x09, 0x1F, 0x1F, 0x10, 0x1F, 0x1F, 0x1F, 0x10,

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@ -30,11 +30,8 @@
* Index/Data pair. These values are chipset and mainboard * Index/Data pair. These values are chipset and mainboard
* dependent and should be updated accordingly. * dependent and should be updated accordingly.
*/ */
static uint8_t fch_pic_routing[0x80]; static uint8_t fch_pic_routing[FCH_IRQ_ROUTING_ENTRIES];
static uint8_t fch_apic_routing[0x80]; static uint8_t fch_apic_routing[FCH_IRQ_ROUTING_ENTRIES];
_Static_assert(sizeof(fch_pic_routing) == sizeof(fch_apic_routing),
"PIC and APIC FCH interrupt tables must be the same size");
/* /*
* This controls the device -> IRQ routing. * This controls the device -> IRQ routing.

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@ -30,7 +30,7 @@
* MP Tables. TODO: Make ACPI use these values too. * MP Tables. TODO: Make ACPI use these values too.
*/ */
static const u8 mainboard_picr_data[] = { static const u8 mainboard_picr_data[FCH_IRQ_ROUTING_ENTRIES] = {
[0x00] = 0x03, 0x04, 0x05, 0x07, 0x0B, 0x1F, 0x1F, 0x1F, [0x00] = 0x03, 0x04, 0x05, 0x07, 0x0B, 0x1F, 0x1F, 0x1F,
[0x08] = 0xFA, 0xF1, 0x00, 0x00, 0x1F, 0x1F, 0x1F, 0x1F, [0x08] = 0xFA, 0xF1, 0x00, 0x00, 0x1F, 0x1F, 0x1F, 0x1F,
[0x10] = 0x09, 0x1F, 0x1F, 0x03, 0x1F, 0x1F, 0x1F, 0x03, [0x10] = 0x09, 0x1F, 0x1F, 0x03, 0x1F, 0x1F, 0x1F, 0x03,
@ -49,7 +49,7 @@ static const u8 mainboard_picr_data[] = {
[0x78] = 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, [0x78] = 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F,
}; };
static const u8 mainboard_intr_data[] = { static const u8 mainboard_intr_data[FCH_IRQ_ROUTING_ENTRIES] = {
[0x00] = 0x10, 0x11, 0x12, 0x13, 0x14, 0x1F, 0x16, 0x17, [0x00] = 0x10, 0x11, 0x12, 0x13, 0x14, 0x1F, 0x16, 0x17,
[0x08] = 0x00, 0x00, 0x00, 0x00, 0x1F, 0x1F, 0x1F, 0x1F, [0x08] = 0x00, 0x00, 0x00, 0x00, 0x1F, 0x1F, 0x1F, 0x1F,
[0x10] = 0x09, 0x1F, 0x1F, 0x10, 0x1F, 0x1F, 0x1F, 0x10, [0x10] = 0x09, 0x1F, 0x1F, 0x10, 0x1F, 0x1F, 0x1F, 0x10,

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@ -16,11 +16,8 @@
* Index/Data pair. These values are chipset and mainboard * Index/Data pair. These values are chipset and mainboard
* dependent and should be updated accordingly. * dependent and should be updated accordingly.
*/ */
static uint8_t fch_pic_routing[0x80]; static uint8_t fch_pic_routing[FCH_IRQ_ROUTING_ENTRIES];
static uint8_t fch_apic_routing[0x80]; static uint8_t fch_apic_routing[FCH_IRQ_ROUTING_ENTRIES];
_Static_assert(sizeof(fch_pic_routing) == sizeof(fch_apic_routing),
"PIC and APIC FCH interrupt tables must be the same size");
/* /*
* This controls the device -> IRQ routing. * This controls the device -> IRQ routing.

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@ -39,11 +39,8 @@
* Index/Data pair. These values are chipset and mainboard * Index/Data pair. These values are chipset and mainboard
* dependent and should be updated accordingly. * dependent and should be updated accordingly.
*/ */
static uint8_t fch_pic_routing[0x80]; static uint8_t fch_pic_routing[FCH_IRQ_ROUTING_ENTRIES];
static uint8_t fch_apic_routing[0x80]; static uint8_t fch_apic_routing[FCH_IRQ_ROUTING_ENTRIES];
_Static_assert(sizeof(fch_pic_routing) == sizeof(fch_apic_routing),
"PIC and APIC FCH interrupt tables must be the same size");
/* /*
* This controls the device -> IRQ routing. * This controls the device -> IRQ routing.

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@ -11,6 +11,8 @@
#define PCI_INTR_INDEX 0xc00 #define PCI_INTR_INDEX 0xc00
#define PCI_INTR_DATA 0xc01 #define PCI_INTR_DATA 0xc01
#define FCH_IRQ_ROUTING_ENTRIES 0x80
struct fch_irq_routing { struct fch_irq_routing {
uint8_t intr_index; uint8_t intr_index;
uint8_t pic_irq_num; uint8_t pic_irq_num;