AMD fam10: Drop PCI_BUS_SEGN_BITS

All boards in tree use 0.  Looks like this is all work that was
never completed and tested.

We also have static setting sysconf.segbit=0 which would conflict
with PCI_BUS_SEGN_BITS>0.

Having PCI_BUS_SEGN_BITS>0 would also require PCI MMCONF support
to cover over 255 buses.

Change-Id: I060efc44d1560541473b01690c2e8192863c1eb5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8554
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

src/device/Kconfig

@@ -259,10 +259,6 @@ config PCIEXP_CLK_PM
 	help
 	  Detect and enable Clock Power Management on PCIe.
 
-config PCI_BUS_SEGN_BITS
-	int
-	default 0
-
 config EARLY_PCI_BRIDGE
 	bool "Early PCI bridge"
 	depends on PCI