Remove pc80/serial.c includes in ROMCC boards and include

it centrally in console/console.h instead.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5538 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/include/console/console.h

@@ -129,6 +129,7 @@ int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf,
 #define print_spew_hex32(HEX)    printk(BIOS_SPEW,   "%08x", (HEX))
 #else
 
+#include <pc80/serial.c>
 
 /* __ROMCC__ */
 static void __console_tx_byte(unsigned char byte)

src/mainboard/a-trend/atc-6220/romstage.c

@@ -25,7 +25,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"

src/mainboard/a-trend/atc-6240/romstage.c

@@ -25,7 +25,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"

src/mainboard/abit/be6-ii_v2_0/romstage.c

@@ -25,7 +25,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"

src/mainboard/advantech/pcm-5820/romstage.c

@@ -23,7 +23,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/amd/gx1/raminit.c"

src/mainboard/amd/rumba/romstage.c

@@ -4,7 +4,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"

src/mainboard/asi/mb_5blgp/romstage.c

@@ -23,7 +23,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/amd/gx1/raminit.c"

src/mainboard/asi/mb_5blmp/romstage.c

@@ -24,7 +24,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/amd/gx1/raminit.c"

src/mainboard/asus/mew-am/romstage.c

@@ -25,7 +25,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ax/i82801ax_early_smbus.c"

src/mainboard/asus/mew-vm/romstage.c

@@ -25,7 +25,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "superio/smsc/lpc47b272/lpc47b272_early_serial.c"

src/mainboard/asus/p2b-d/romstage.c

@@ -26,7 +26,6 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include <cpu/x86/lapic.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"

src/mainboard/asus/p2b-ds/romstage.c

@@ -26,7 +26,6 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include <cpu/x86/lapic.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"

src/mainboard/asus/p2b-f/romstage.c

@@ -25,7 +25,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"

src/mainboard/asus/p2b-ls/romstage.c

@@ -25,7 +25,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"

src/mainboard/asus/p2b/romstage.c

@@ -25,7 +25,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"

src/mainboard/asus/p3b-f/romstage.c

@@ -25,7 +25,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"

src/mainboard/axus/tc320/romstage.c

@@ -24,7 +24,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/amd/gx1/raminit.c"

src/mainboard/azza/pt-6ibd/romstage.c

@@ -25,7 +25,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"

src/mainboard/bcom/winnet100/romstage.c

@@ -24,7 +24,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/amd/gx1/raminit.c"

src/mainboard/biostar/m6tba/romstage.c

@@ -25,7 +25,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"

src/mainboard/compaq/deskpro_en_sff_p600/romstage.c

@@ -25,7 +25,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"

src/mainboard/dell/s1850/romstage.c

@@ -7,7 +7,6 @@
 #include <stdlib.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"

src/mainboard/digitallogic/msm586seg/romstage.c

@@ -5,7 +5,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "cpu/x86/bist.h"

src/mainboard/eaglelion/5bcm/romstage.c

@@ -5,7 +5,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 //#include "southbridge/intel/i440bx/i440bx_early_smbus.c"

src/mainboard/emulation/qemu-x86/romstage.c

@@ -7,7 +7,6 @@
 #include <arch/hlt.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "pc80/udelay_io.c"
 #include "lib/delay.c"

src/mainboard/gigabyte/ga-6bxc/romstage.c

@@ -25,7 +25,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"

src/mainboard/hp/e_vectra_p2706t/romstage.c

@@ -25,7 +25,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 /* TODO: It's a PC87364 actually! */

src/mainboard/iei/juki-511p/romstage.c

@@ -24,7 +24,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "superio/winbond/w83977f/w83977f_early_serial.c"

src/mainboard/iei/nova4899r/romstage.c

@@ -24,7 +24,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "superio/winbond/w83977tf/w83977tf_early_serial.c"

src/mainboard/intel/jarrell/romstage.c

@@ -7,7 +7,6 @@
 #include <stdlib.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"

src/mainboard/intel/mtarvon/romstage.c

@@ -27,7 +27,6 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i3100/i3100_early_smbus.c"

src/mainboard/intel/truxton/romstage.c

@@ -27,7 +27,6 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include "pc80/udelay_io.c"
 #include <console/console.h>
 #include "lib/ramtest.c"

src/mainboard/intel/xe7501devkit/romstage.c

@@ -8,7 +8,6 @@
 #include <stdlib.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801cx/i82801cx_early_smbus.c"

src/mainboard/lippert/frontrunner/romstage.c

@@ -4,7 +4,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"

src/mainboard/mitac/6513wu/romstage.c

@@ -25,7 +25,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ax/i82801ax_early_smbus.c"

src/mainboard/msi/ms6119/romstage.c

@@ -25,7 +25,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"

src/mainboard/msi/ms6147/romstage.c

@@ -25,7 +25,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"

src/mainboard/msi/ms6156/romstage.c

@@ -25,7 +25,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"

src/mainboard/msi/ms6178/romstage.c

@@ -25,7 +25,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"

src/mainboard/nec/powermate2000/romstage.c

@@ -25,7 +25,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"

src/mainboard/nokia/ip530/romstage.c

@@ -25,7 +25,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"

src/mainboard/olpc/btest/romstage.c

@@ -4,7 +4,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"

src/mainboard/olpc/rev_a/romstage.c

@@ -4,7 +4,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"

src/mainboard/soyo/sy-6ba-plus-iii/romstage.c

@@ -25,7 +25,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"

src/mainboard/supermicro/x6dai_g/romstage.c

@@ -7,7 +7,6 @@
 #include <stdlib.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "pc80/udelay_io.c"

src/mainboard/supermicro/x6dhe_g/romstage.c

@@ -7,7 +7,6 @@
 #include <stdlib.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "pc80/udelay_io.c"

src/mainboard/supermicro/x6dhe_g2/romstage.c

@@ -7,7 +7,6 @@
 #include <stdlib.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"

src/mainboard/supermicro/x6dhr_ig/romstage.c

@@ -7,7 +7,6 @@
 #include <stdlib.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"

src/mainboard/supermicro/x6dhr_ig2/romstage.c

@@ -7,7 +7,6 @@
 #include <stdlib.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"

src/mainboard/technologic/ts5300/romstage.c

@@ -11,7 +11,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "cpu/x86/bist.h"

src/mainboard/televideo/tc7020/romstage.c

@@ -24,7 +24,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/amd/gx1/raminit.c"

src/mainboard/tyan/s1846/romstage.c

@@ -25,7 +25,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"

src/mainboard/via/epia-m/romstage.c

@@ -6,7 +6,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/via/vt8623/raminit.h"

src/mainboard/via/epia-n/romstage.c

@@ -26,7 +26,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/via/cn400/raminit.h"

src/mainboard/via/epia/romstage.c

@@ -5,7 +5,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/via/vt8601/raminit.h"

src/mainboard/wyse/s50/romstage.c

@@ -4,15 +4,12 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "cpu/x86/bist.h"
 #include "cpu/x86/msr.h"
 #include <cpu/amd/gx2def.h>
 
-#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
-
 #include "southbridge/amd/cs5536/cs5536_early_smbus.c"
 #include "southbridge/amd/cs5536/cs5536_early_setup.c"