superio/ite: Remove custom ITE GPIO drivers and code
Since a generic ITE GPIO driver is available and in use, the existence of chips-specific drivers no longer make sense. Remove the dead code in favor of generic GPIO driver. Change-Id: I7e031d12192af4bd47923d87c1d02c64f9c851a2 Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83497 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Nico Huber
parent
001f33cc03
commit
bfbc5cfcb2
@@ -11,24 +11,4 @@
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#define IT8659E_GPIO 0x07 /* GPIO */
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#define IT8659E_GPIO 0x07 /* GPIO */
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#define IT8659E_CIR 0x0A /* CIR */
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#define IT8659E_CIR 0x0A /* CIR */
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/* GPIO Polarity Select: 1: Inverting, 0: Non-inverting */
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#define GPIO_REG_POLARITY(x) (0xb0 + (x))
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#define GPIO_POL_NO_INVERT 0
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#define GPIO_POL_INVERT 1
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/* GPIO Internal Pull-up: 1: Enable, 0: Disable */
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#define GPIO_REG_PULLUP(x) (0xb8 + (x))
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#define GPIO_PULLUP_DIS 0
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#define GPIO_PULLUP_EN 1
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/* GPIO Function Select: 1: Simple I/O, 0: Alternate function */
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#define GPIO_REG_ENABLE(x) (0xc0 + (x))
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#define GPIO_ALT_FN 0
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#define GPIO_SIMPLE_IO 1
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/* GPIO Mode: 0: input mode, 1: output mode */
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#define GPIO_REG_OUTPUT(x) (0xc8 + (x))
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#define GPIO_INPUT_MODE 0
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#define GPIO_OUTPUT_MODE 1
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#endif /* SUPERIO_ITE_IT8659E_H */
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#endif /* SUPERIO_ITE_IT8659E_H */
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@@ -1,6 +1,3 @@
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# SPDX-License-Identifier: GPL-2.0-or-later
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# SPDX-License-Identifier: GPL-2.0-or-later
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bootblock-$(CONFIG_SUPERIO_ITE_IT8772F) += early_init.c
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romstage-$(CONFIG_SUPERIO_ITE_IT8772F) += early_init.c
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ramstage-$(CONFIG_SUPERIO_ITE_IT8772F) += superio.c
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ramstage-$(CONFIG_SUPERIO_ITE_IT8772F) += superio.c
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smm-$(CONFIG_SUPERIO_ITE_IT8772F) += early_init.c
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@@ -1,63 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <arch/io.h>
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#include <device/pnp_def.h>
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#include <device/pnp_ops.h>
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#include "it8772f.h"
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#include "../common/ite.h"
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#define IT8772F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */
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/* NOTICE: This file is deprecated, use ite/common instead */
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static void it8772f_enter_conf(pnp_devfn_t dev)
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{
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u16 port = dev >> 8;
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outb(0x87, port);
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outb(0x01, port);
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outb(0x55, port);
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outb((port == 0x4e) ? 0xaa : 0x55, port);
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}
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static void it8772f_exit_conf(pnp_devfn_t dev)
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{
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pnp_write_config(dev, IT8772F_CONFIG_REG_CC, 0x02);
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}
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/* Configure a set of GPIOs */
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void it8772f_gpio_setup(pnp_devfn_t dev, int set, u8 select, u8 polarity,
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u8 pullup, u8 output, u8 enable)
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{
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set--; /* Set 1 is offset 0 */
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it8772f_enter_conf(dev);
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pnp_set_logical_device(dev);
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if (set < 5) {
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pnp_write_config(dev, GPIO_REG_SELECT(set), select);
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pnp_write_config(dev, GPIO_REG_ENABLE(set), enable);
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pnp_write_config(dev, GPIO_REG_POLARITY(set), polarity);
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}
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pnp_write_config(dev, GPIO_REG_OUTPUT(set), output);
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pnp_write_config(dev, GPIO_REG_PULLUP(set), pullup);
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it8772f_exit_conf(dev);
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}
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/* Configure LED GPIOs */
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void it8772f_gpio_led(pnp_devfn_t dev,int set, u8 select, u8 polarity, u8 pullup,
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u8 output, u8 enable, u8 led_pin_map, u8 led_freq)
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{
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set--; /* Set 1 is offset 0 */
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it8772f_enter_conf(dev);
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pnp_set_logical_device(dev);
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if (set < 5) {
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pnp_write_config(dev, IT8772F_GPIO_LED_BLINK1_PINMAP, led_pin_map);
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pnp_write_config(dev, IT8772F_GPIO_LED_BLINK1_CONTROL, led_freq);
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pnp_write_config(dev, GPIO_REG_SELECT(set), select);
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pnp_write_config(dev, GPIO_REG_ENABLE(set), enable);
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pnp_write_config(dev, GPIO_REG_POLARITY(set), polarity);
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}
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pnp_write_config(dev, GPIO_REG_OUTPUT(set), output);
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pnp_write_config(dev, GPIO_REG_PULLUP(set), pullup);
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it8772f_exit_conf(dev);
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}
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@@ -11,42 +11,4 @@
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#define IT8772F_GPIO 0x07 /* GPIO */
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#define IT8772F_GPIO 0x07 /* GPIO */
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#define IT8772F_IR 0x0a /* Consumer IR */
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#define IT8772F_IR 0x0a /* Consumer IR */
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/* GPIO interface */
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#define IT8772F_GPIO_LED_BLINK1_PINMAP 0xf8
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#define SIO_GPIO_BLINK_GPIO10 0x08
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#define SIO_GPIO_BLINK_GPIO22 0x12
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#define SIO_GPIO_BLINK_GPIO45 0x25
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#define IT8772F_GPIO_LED_BLINK1_CONTROL 0xf9
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#define IT8772F_GPIO_BLINK_FREQUENCY_4_HZ (0<<1)
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#define IT8772F_GPIO_BLINK_FREQUENCY_1_HZ (1<<1)
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#define IT8772F_GPIO_BLINK_FREQUENCY_1_4_HZ (2<<1)
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#define IT8772F_GPIO_BLINK_FREQUENCY_1_8_HZ (3<<1)
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#define GPIO_REG_SELECT(x) (0x25 + (x))
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/* GPIO Polarity Select: 1: Inverting, 0: Non-inverting */
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#define GPIO_REG_POLARITY(x) (0xb0 + (x))
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/* GPIO Internal Pull-up: 1: Enable, 0: Disable */
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#define GPIO_REG_PULLUP(x) (0xb8 + (x))
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/* GPIO Function Select: 1: Simple I/O, 0: Alternate function */
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#define GPIO_REG_ENABLE(x) (0xc0 + (x))
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/* GPIO Mode: 0: input mode, 1: output mode */
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#define GPIO_REG_OUTPUT(x) (0xc8 + (x))
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#include <device/pnp_type.h>
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#include <stdint.h>
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void it8772f_gpio_setup(pnp_devfn_t dev, int set, u8 select, u8 polarity,
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u8 pullup, u8 output, u8 enable);
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void it8772f_gpio_led(pnp_devfn_t dev, int set, u8 select, u8 polarity, u8 pullup,
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u8 output, u8 enable, u8 led_pin_map, u8 led_freq);
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#endif /* SUPERIO_ITE_IT8772F_H */
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#endif /* SUPERIO_ITE_IT8772F_H */
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