drivers/intel/fsp1_1: Add function to report FSP-T output
This allows to compare the FSP-T output in %ecx and %edx to coreboot's CAR symbols. Tested on Facebook FBG1701 Change-Id: Ice748e542180f6e1dc1505e7f37b6b6c68772bda Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47758 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
committed by
Patrick Georgi
parent
335eb1219c
commit
c022a79503
@@ -9,6 +9,7 @@ verstage-$(CONFIG_VBOOT_SEPARATE_VERSTAGE) += verstage.c
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bootblock-$(CONFIG_USE_GENERIC_FSP_CAR_INC) += cache_as_ram.S
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bootblock-$(CONFIG_USE_GENERIC_FSP_CAR_INC) += cache_as_ram.S
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bootblock-y += fsp_util.c
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bootblock-y += fsp_util.c
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bootblock-y += ../../../cpu/intel/microcode/microcode_asm.S
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bootblock-y += ../../../cpu/intel/microcode/microcode_asm.S
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bootblock-y += fsp_report.c
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romstage-y += car.c
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romstage-y += car.c
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romstage-y += fsp_util.c
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romstage-y += fsp_util.c
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@@ -145,6 +145,14 @@ CAR_init_done:
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* mm1: high 32-bits of TSC value
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* mm1: high 32-bits of TSC value
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*/
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*/
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/*
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* temp_memory_start/end reside in the .bss section, which gets cleared
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* below. Save the FSP return value to the stack before writing those
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* variables.
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*/
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push %ecx
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push %edx
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/* clear .bss section */
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/* clear .bss section */
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cld
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cld
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xor %eax, %eax
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xor %eax, %eax
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@@ -154,6 +162,11 @@ CAR_init_done:
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shrl $2, %ecx
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shrl $2, %ecx
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rep stosl
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rep stosl
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pop %edx
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movl %edx, temp_memory_end
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pop %ecx
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movl %ecx, temp_memory_start
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/* Need to align stack to 16 bytes at call instruction. Account for
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/* Need to align stack to 16 bytes at call instruction. Account for
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the pushes below. */
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the pushes below. */
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andl $0xfffffff0, %esp
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andl $0xfffffff0, %esp
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27
src/drivers/intel/fsp1_1/fsp_report.c
Normal file
27
src/drivers/intel/fsp1_1/fsp_report.c
Normal file
@@ -0,0 +1,27 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <arch/symbols.h>
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#include <console/console.h>
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#include <fsp/util.h>
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/* filled in assembly after FSP-T ran */
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uintptr_t temp_memory_start;
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uintptr_t temp_memory_end;
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void report_fsp_output(void)
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{
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const struct region fsp_car_region = {
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.offset = temp_memory_start,
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.size = temp_memory_end - temp_memory_start,
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};
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const struct region coreboot_car_region = {
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.offset = (uintptr_t)_car_region_start,
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.size = (uintptr_t)_car_region_size,
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};
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printk(BIOS_DEBUG, "FSP: reported temp_mem region: [0x%08lx,0x%08lx)\n",
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temp_memory_start, temp_memory_end);
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if (!region_is_subregion(&fsp_car_region, &coreboot_car_region)) {
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printk(BIOS_ERR, "Wrong CAR region used!\n");
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printk(BIOS_ERR, "Adapt DCACHE_RAM_BASE and DCACHE_RAM_SIZE to match FSP-T\n");
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}
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}
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@@ -31,6 +31,7 @@ void *get_next_resource_hob(const EFI_GUID *guid, const void *hob_start);
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void *get_first_resource_hob(const EFI_GUID *guid);
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void *get_first_resource_hob(const EFI_GUID *guid);
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void fsp_display_upd_value(const char *name, uint32_t size, uint64_t old,
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void fsp_display_upd_value(const char *name, uint32_t size, uint64_t old,
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uint64_t new);
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uint64_t new);
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void report_fsp_output(void);
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/* Return version of FSP associated with fih. */
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/* Return version of FSP associated with fih. */
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static inline uint32_t fsp_version(FSP_INFO_HEADER *fih)
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static inline uint32_t fsp_version(FSP_INFO_HEADER *fih)
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