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printk_foo -> printk(BIOS_FOO, ...)

Browse Source 
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
2010-03-22 11:42:32 +00:00
committed by Stefan Reinauer
parent 27852aba67
commit c02b4fc9db
539 changed files with 3744 additions and 3759 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
src/drivers/ati/ragexl/mach64_ct.c
View File

@@ -2,7 +2,7 @@
/* FIXME: remove the FAIL definition */
#if 0
#define FAIL(x) do { printk_debug(x); return -EINVAL; } while (0)
#define FAIL(x) do { printk(BIOS_DEBUG, x); return -EINVAL; } while (0)
#else
#define FAIL(x)
#endif
@@ -31,7 +31,7 @@ static int aty_dsp_gt(const struct fb_info_aty *info, u32 bpp,
u32 memcntl, n, t_pfc, t_rp, t_ras, t_rcd, t_crd, t_rcc, t_lat;
#if DEBUG_PLL==1
printk_debug("aty_dsp_gt : mclk_fb_mult=%d\n", pll->mclk_fb_mult);
printk(BIOS_DEBUG, "aty_dsp_gt : mclk_fb_mult=%d\n", pll->mclk_fb_mult);
#endif
/* (64*xclk/vclk/bpp)<<11 = xclocks_per_row<<11 */
@@ -150,7 +150,7 @@ static int aty_valid_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
pllsclk = (1000000 * 2 * pll->sclk_fb_div) /
(info->ref_clk_per * pll->pll_ref_div);
printk_debug("aty_valid_pll_ct: pllsclk=%d MHz, mclk=%d MHz\n",
printk(BIOS_DEBUG, "aty_valid_pll_ct: pllsclk=%d MHz, mclk=%d MHz\n",
pllsclk, pllsclk / pll->mclk_post_div_real);
#endif
@@ -175,7 +175,7 @@ static int aty_valid_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
#if DEBUG_PLL==1
pllmclk = (1000000 * pll->mclk_fb_mult * pll->mclk_fb_div) /
(info->ref_clk_per * pll->pll_ref_div);
printk_debug("aty_valid_pll_ct: pllmclk=%d MHz, xclk=%d MHz\n",
printk(BIOS_DEBUG, "aty_valid_pll_ct: pllmclk=%d MHz, xclk=%d MHz\n",
pllmclk, pllmclk / pll->xclk_post_div_real);
#endif
@@ -301,7 +301,7 @@ u32 aty_pll_ct_to_var(const struct fb_info_aty *info,
void aty_set_pll_ct(const struct fb_info_aty *info, const union aty_pll *pll)
{
#if DEBUG_PLL==1
printk_debug("aty_set_pll_ct: about to program:\n"
printk(BIOS_DEBUG, "aty_set_pll_ct: about to program:\n"
"refdiv=%d, extcntl=0x%02x, mfbdiv=%d\n"
"spllcntl2=0x%02x, sfbdiv=%d, gencntl=0x%02x\n"
"vclkcntl=0x%02x, vpostdiv=0x%02x, vfbdiv=%d\n"

14
src/drivers/ati/ragexl/xlinit.c
View File

@@ -541,7 +541,7 @@ static void ati_ragexl_init(device_t dev)
#endif
#if 0
printk_debug("ati_regbase = 0x%08x, frame_buffer = 0x%08x\r\n", info->ati_regbase, info->frame_buffer);
printk(BIOS_DEBUG, "ati_regbase = 0x%08x, frame_buffer = 0x%08x\r\n", info->ati_regbase, info->frame_buffer);
#endif
chip_id = aty_ld_le32(CONFIG_CHIP_ID, info);
@@ -557,11 +557,11 @@ static void ati_ragexl_init(device_t dev)
info->features = aty_chips[j].features;
goto found;
}
printk_spew("ati_ragexl_init: Unknown mach64 0x%04x rev 0x%04x\n", type, rev);
printk(BIOS_SPEW, "ati_ragexl_init: Unknown mach64 0x%04x rev 0x%04x\n", type, rev);
return ;
found:
printk_info("ati_ragexl_init: %s [0x%04x rev 0x%02x]\r\n", chipname, type, rev);
printk(BIOS_INFO, "ati_ragexl_init: %s [0x%04x rev 0x%02x]\r\n", chipname, type, rev);
#if 0
if (M64_HAS(INTEGRATED)) {
/* for many chips, the mclk is 67 MHz for SDRAM, 63 MHz otherwise */
@@ -717,7 +717,7 @@ found:
if (atyfb_decode_var(&var, &info->default_par, info)) {
#if 0
printk_debug("atyfb: can't set default video mode\n");
printk(BIOS_DEBUG, "atyfb: can't set default video mode\n");
#endif
return ;
}
@@ -750,7 +750,7 @@ found:
#if PLL_CRTC_DECODE==1
printk_spew("framebuffer=0x%08x, width=%d, height=%d, bpp=%d, pitch=%d\n",info->frame_buffer,
printk(BIOS_SPEW, "framebuffer=0x%08x, width=%d, height=%d, bpp=%d, pitch=%d\n",info->frame_buffer,
(((info->current_par.crtc.h_tot_disp>>16) & 0xff)+1)*8,
((info->current_par.crtc.v_tot_disp>>16) & 0x7ff)+1,
info->current_par.crtc.bpp,
@@ -762,7 +762,7 @@ found:
info->current_par.crtc.bpp,
info->current_par.crtc.vxres*info->current_par.crtc.bpp/8,info->frame_buffer);
#else
printk_spew("framebuffer=0x%08x, width=%d, height=%d, bpp=%d, pitch=%d\n",info->frame_buffer,
printk(BIOS_SPEW, "framebuffer=0x%08x, width=%d, height=%d, bpp=%d, pitch=%d\n",info->frame_buffer,
(((info->default_par.crtc.h_tot_disp>>16) & 0xff)+1)*8,
((info->default_par.crtc.v_tot_disp>>16) & 0x7ff)+1,
info->default_par.crtc.bpp,
@@ -1184,7 +1184,7 @@ static int atyfb_set_var(struct fb_var_screeninfo *var, int con,
atyfb_encode_var(var, &par, (struct fb_info_aty *)info);
#if 0
printk_info("atyfb_set_var: activate=%d\n", activate & FB_ACTIVATE_MASK);
printk(BIOS_INFO, "atyfb_set_var: activate=%d\n", activate & FB_ACTIVATE_MASK);
#endif
if ((activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) {

2
src/drivers/emulation/qemu/init.c
View File

@@ -56,7 +56,7 @@ static void qemu_init(void)
{
int width=640, height=480, depth=8;
printk_debug("Initializing VGA!\n");
printk(BIOS_DEBUG, "Initializing VGA!\n");
vbe_outw(VBE_DISPI_INDEX_XRES, width);
vbe_outw(VBE_DISPI_INDEX_YRES, height);

66
src/drivers/generic/debug/debug_dev.c
View File

@@ -17,10 +17,10 @@ static void print_pci_regs(struct device *dev)
for(i=0;i<256;i++) {
byte = pci_read_config8(dev, i);
if((i & 0xf)==0) printk_debug("\n%02x:",i);
printk_debug(" %02x",byte);
if((i & 0xf)==0) printk(BIOS_DEBUG, "\n%02x:",i);
printk(BIOS_DEBUG, " %02x",byte);
}
printk_debug("\n");
printk(BIOS_DEBUG, "\n");
}
static void print_mem(void)
@@ -28,10 +28,10 @@ static void print_mem(void)
unsigned int i;
unsigned int start = 0xfffff000;
for(i=start;i<0xffffffff;i++) {
if((i & 0xf)==0) printk_debug("\n %08x:",i);
printk_debug(" %02x",(unsigned char)*((unsigned char *)i));
if((i & 0xf)==0) printk(BIOS_DEBUG, "\n %08x:",i);
printk(BIOS_DEBUG, " %02x",(unsigned char)*((unsigned char *)i));
}
printk_debug(" %02x\n",(unsigned char)*((unsigned char *)i));
printk(BIOS_DEBUG, " %02x\n",(unsigned char)*((unsigned char *)i));
}
static void print_pci_regs_all(void)
@@ -51,7 +51,7 @@ static void print_pci_regs_all(void)
if(!dev->enabled) {
continue;
}
printk_debug("\n%02x:%02x:%02x aka %s",
printk(BIOS_DEBUG, "\n%02x:%02x:%02x aka %s",
bus, device, function, dev_path(dev));
print_pci_regs(dev);
}
@@ -65,19 +65,19 @@ static void print_cpuid()
unsigned index;
unsigned eax, ebx, ecx, edx;
index = 0x80000007;
printk_debug("calling cpuid 0x%08x\n", index);
printk(BIOS_DEBUG, "calling cpuid 0x%08x\n", index);
asm volatile(
"cpuid"
: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
: "a" (index)
);
printk_debug("cpuid[%08x]: %08x %08x %08x %08x\n",
printk(BIOS_DEBUG, "cpuid[%08x]: %08x %08x %08x %08x\n",
index, eax, ebx, ecx, edx);
if (edx & (3 << 1)) {
index = 0xC0010042;
printk_debug("Reading msr: 0x%08x\n", index);
printk(BIOS_DEBUG, "Reading msr: 0x%08x\n", index);
msr = rdmsr(index);
printk_debug("msr[0x%08x]: 0x%08x%08x\n",
printk(BIOS_DEBUG, "msr[0x%08x]: 0x%08x%08x\n",
index, msr.hi, msr.lo);
}
@@ -85,23 +85,23 @@ static void print_cpuid()
static void print_smbus_regs(struct device *dev)
{
int j;
printk_debug("smbus: %s[%d]->", dev_path(dev->bus->dev), dev->bus->link);
printk_debug("%s", dev_path(dev));
printk(BIOS_DEBUG, "smbus: %s[%d]->", dev_path(dev->bus->dev), dev->bus->link);
printk(BIOS_DEBUG, "%s", dev_path(dev));
for(j = 0; j < 256; j++) {
int status;
unsigned char byte;
status = smbus_read_byte(dev, j);
if (status < 0) {
// printk_debug("bad device status= %08x\r\n", status);
// printk(BIOS_DEBUG, "bad device status= %08x\r\n", status);
break;
}
if ((j & 0xf) == 0) {
printk_debug("\r\n%02x: ", j);
printk(BIOS_DEBUG, "\r\n%02x: ", j);
}
byte = status & 0xff;
printk_debug("%02x ", byte);
printk(BIOS_DEBUG, "%02x ", byte);
}
printk_debug("\r\n");
printk(BIOS_DEBUG, "\r\n");
}
static void print_smbus_regs_all(struct device *dev)
@@ -133,28 +133,28 @@ static void print_msr_dualcore(void)
unsigned index;
unsigned eax, ebx, ecx, edx;
index = 0x80000008;
printk_debug("calling cpuid 0x%08x\n", index);
printk(BIOS_DEBUG, "calling cpuid 0x%08x\n", index);
asm volatile(
"cpuid"
: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
: "a" (index)
);
printk_debug("cpuid[%08x]: %08x %08x %08x %08x\n",
printk(BIOS_DEBUG, "cpuid[%08x]: %08x %08x %08x %08x\n",
index, eax, ebx, ecx, edx);
printk_debug("core number %d\n", ecx & 0xff);
printk(BIOS_DEBUG, "core number %d\n", ecx & 0xff);
index = 0xc001001f;
printk_debug("Reading msr: 0x%08x\n", index);
printk(BIOS_DEBUG, "Reading msr: 0x%08x\n", index);
msr = rdmsr(index);
printk_debug("msr[0x%08x]: 0x%08x%08x bit 54 is %d\n",
printk(BIOS_DEBUG, "msr[0x%08x]: 0x%08x%08x bit 54 is %d\n",
index, msr.hi, msr.lo, (msr.hi>> (54-32)) & 1);
#if 0
msr.hi |= (1<<(54-32));
wrmsr(index, msr);
msr = rdmsr(index);
printk_debug("msr[0x%08x]: 0x%08x%08x\n",
printk(BIOS_DEBUG, "msr[0x%08x]: 0x%08x%08x\n",
index, msr.hi, msr.lo);
#endif
@@ -166,7 +166,7 @@ static void print_cache_size(void)
unsigned int n, eax, ebx, ecx, edx;
index = 0x80000000;
printk_debug("calling cpuid 0x%08x\n", index);
printk(BIOS_DEBUG, "calling cpuid 0x%08x\n", index);
asm volatile(
"cpuid"
: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
@@ -176,25 +176,25 @@ static void print_cache_size(void)
if (n >= 0x80000005) {
index = 0x80000005;
printk_debug("calling cpuid 0x%08x\n", index);
printk(BIOS_DEBUG, "calling cpuid 0x%08x\n", index);
asm volatile(
"cpuid"
: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
: "a" (index)
);
printk_debug("CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
printk(BIOS_DEBUG, "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
}
if (n >= 0x80000006) {
index = 0x80000006;
printk_debug("calling cpuid 0x%08x\n", index);
printk(BIOS_DEBUG, "calling cpuid 0x%08x\n", index);
asm volatile(
"cpuid"
: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
: "a" (index)
);
printk_debug("CPU: L2 Cache: %dK (%d bytes/line)\n",
printk(BIOS_DEBUG, "CPU: L2 Cache: %dK (%d bytes/line)\n",
ecx >> 16, ecx & 0xFF);
}
@@ -220,11 +220,11 @@ static void print_tsc(void) {
tsc_t tsc;
tsc = rdtsc();
printk_debug("tsc: 0x%08x%08x\n",
printk(BIOS_DEBUG, "tsc: 0x%08x%08x\n",
tsc.hi, tsc.lo);
udelay(1);
tsc = rdtsc();
printk_debug("tsc: 0x%08x%08x after udelay(1) \n",
printk(BIOS_DEBUG, "tsc: 0x%08x%08x after udelay(1) \n",
tsc.hi, tsc.lo);
}
@@ -238,11 +238,11 @@ static void debug_init(device_t dev)
switch(dev->path.pnp.device) {
case 0:
parent = dev->bus->dev;
printk_debug("DEBUG: %s", dev_path(parent));
printk(BIOS_DEBUG, "DEBUG: %s", dev_path(parent));
if(parent->chip_ops && parent->chip_ops->name) {
printk_debug(": %s\n", parent->chip_ops->name);
printk(BIOS_DEBUG, ": %s\n", parent->chip_ops->name);
} else {
printk_debug("\n");
printk(BIOS_DEBUG, "\n");
}
break;

2
src/drivers/i2c/adm1026/adm1026.c
View File

@@ -44,7 +44,7 @@ static void adm1026_enable_monitoring(device_t dev)
result = smbus_read_byte(dev, ADM1026_REG_CONFIG1);
if (!(result & CFG1_MONITOR)) {
printk_debug("ADM1026: monitoring would not enable");
printk(BIOS_DEBUG, "ADM1026: monitoring would not enable");
}
}
static void adm1026_noop(device_t dummy)

6
src/drivers/i2c/adm1027/adm1027.c
View File

@@ -26,7 +26,7 @@ static void adm1027_enable_monitoring(device_t dev)
result = smbus_read_byte(dev, ADM1027_REG_CONFIG1);
if (!(result & CFG1_RDY)) {
printk_debug("ADM1027: monitoring not ready\r\n");
printk(BIOS_DEBUG, "ADM1027: monitoring not ready\r\n");
return;
}
result = (result | CFG1_STRT);
@@ -34,9 +34,9 @@ static void adm1027_enable_monitoring(device_t dev)
result = smbus_read_byte(dev, ADM1027_REG_CONFIG1);
if (!(result & CFG1_STRT)) {
printk_debug("ADM1027: monitoring would not enable\r\n");
printk(BIOS_DEBUG, "ADM1027: monitoring would not enable\r\n");
}
printk_debug("ADM1027: monitoring enabled\r\n");
printk(BIOS_DEBUG, "ADM1027: monitoring enabled\r\n");
}
static void adm1027_init(device_t dev)

2
src/drivers/si/3114/si_sata.c
View File

@@ -45,7 +45,7 @@ static void si_sata_init(struct device *dev)
dword &= ~(1<<0);
pci_write_config32(dev, 0x40, dword);
printk_debug("Class code restored.\n");
printk(BIOS_DEBUG, "Class code restored.\n");
}

14
src/drivers/trident/blade3d/blade3d.c
View File

@@ -777,7 +777,7 @@ static int init9880(void)
//if chip revB
if (CHIPREV == 0x02) {
printk_debug("blade3d: chip revision B\n");
printk(BIOS_DEBUG, "blade3d: chip revision B\n");
outp(Port_CRX, 0xc0);
outp(Port_CRX + 1, 0x00);
}
@@ -805,7 +805,7 @@ static void config_OEM_regs(void)
lpMode3_temp = &Mode3_temp[0];
lpInit_reg = &Init_reg[0];
printk_debug("blade3d: config_OEM_regs()\n");
printk(BIOS_DEBUG, "blade3d: config_OEM_regs()\n");
outp(Port_GRX, 0x24);
outp(Port_GRX + 1, 0xe0);
@@ -943,13 +943,13 @@ static void init_SGRAM(void)
}
} else { //SGRAM
printk_debug("blade3d: No SGRAM found.\n");
printk(BIOS_DEBUG, "blade3d: No SGRAM found.\n");
}
}
static void config_video_memory(void)
{
printk_debug("blade3d: Error: no video memory init\n");
printk(BIOS_DEBUG, "blade3d: Error: no video memory init\n");
}
static void set_video_mode(void)
@@ -959,7 +959,7 @@ static void set_video_mode(void)
lpDef_Reg_struct lpMode3_reg;
lpMode3_reg = &Mode3_reg[0];
printk_debug("blade3d: setting video mode\n");
printk(BIOS_DEBUG, "blade3d: setting video mode\n");
outp(0x3c2, 0x67);
for (i = 0; i < Length_Mode3_reg; i++) {
if (lpMode3_reg[i].rPort == Port_BRX) {
@@ -982,7 +982,7 @@ static void set_video_mode(void)
static void set_font(void)
{
printk_debug("blade3d: setting font (not implemented)\n");
printk(BIOS_DEBUG, "blade3d: setting font (not implemented)\n");
}
static void clear_MEM(void)
@@ -1008,7 +1008,7 @@ static void clear_MEM(void)
static void trident_blade3d_init(struct device *dev)
{
printk_info("blade3d: initializing video card\n");
printk(BIOS_INFO, "blade3d: initializing video card\n");
init9880();
}