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printk_foo -> printk(BIOS_FOO, ...)

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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
2010-03-22 11:42:32 +00:00
committed by Stefan Reinauer
parent 27852aba67
commit c02b4fc9db
539 changed files with 3744 additions and 3759 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
src/arch/i386/boot/acpi.c
View File

@@ -69,7 +69,7 @@ void acpi_add_table(acpi_rsdp_t *rsdp, void *table)
}
if (i >= entries_num) {
printk_err("ACPI: Error: Could not add ACPI table, too many tables.\n");
printk(BIOS_ERR, "ACPI: Error: Could not add ACPI table, too many tables.\n");
return;
}
@@ -101,7 +101,7 @@ void acpi_add_table(acpi_rsdp_t *rsdp, void *table)
xsdt->header.length);
}
printk_debug("ACPI: added table %d/%d Length now %d\n",
printk(BIOS_DEBUG, "ACPI: added table %d/%d Length now %d\n",
i+1, entries_num, rsdt->header.length);
}
@@ -497,17 +497,17 @@ static acpi_rsdp_t *valid_rsdp(acpi_rsdp_t *rsdp)
if (strncmp((char *)rsdp, RSDP_SIG, sizeof(RSDP_SIG) - 1) != 0)
return NULL;
printk_debug("Looking on %p for valid checksum\n", rsdp);
printk(BIOS_DEBUG, "Looking on %p for valid checksum\n", rsdp);
if (acpi_checksum((void *)rsdp, 20) != 0)
return NULL;
printk_debug("Checksum 1 passed\n");
printk(BIOS_DEBUG, "Checksum 1 passed\n");
if ((rsdp->revision > 1) && (acpi_checksum((void *)rsdp,
rsdp->length) != 0))
return NULL;
printk_debug("Checksum 2 passed all OK\n");
printk(BIOS_DEBUG, "Checksum 2 passed all OK\n");
return rsdp;
}
@@ -534,7 +534,7 @@ void *acpi_find_wakeup_vector(void)
if (!acpi_is_wakeup())
return NULL;
printk_debug("Trying to find the wakeup vector ...\n");
printk(BIOS_DEBUG, "Trying to find the wakeup vector ...\n");
/* find RSDP */
for (p = (char *) 0xe0000; p < (char *) 0xfffff; p+=16) {
@@ -545,11 +545,11 @@ void *acpi_find_wakeup_vector(void)
if (rsdp == NULL)
return NULL;
printk_debug("RSDP found at %p\n", rsdp);
printk(BIOS_DEBUG, "RSDP found at %p\n", rsdp);
rsdt = (acpi_rsdt_t *) rsdp->rsdt_address;
end = (char *) rsdt + rsdt->header.length;
printk_debug("RSDT found at %p ends at %p\n", rsdt, end);
printk(BIOS_DEBUG, "RSDT found at %p ends at %p\n", rsdt, end);
for (i = 0; ((char *) &rsdt->entry[i]) < end; i++) {
fadt = (acpi_fadt_t *) rsdt->entry[i];
@@ -561,17 +561,17 @@ void *acpi_find_wakeup_vector(void)
if (fadt == NULL)
return NULL;
printk_debug("FADT found at %p\n", fadt);
printk(BIOS_DEBUG, "FADT found at %p\n", fadt);
facs = (acpi_facs_t *)fadt->firmware_ctrl;
if (facs == NULL) {
printk_debug("No FACS found, wake up from S3 not possible.\n");
printk(BIOS_DEBUG, "No FACS found, wake up from S3 not possible.\n");
return NULL;
}
printk_debug("FACS found at %p\n", facs);
printk(BIOS_DEBUG, "FACS found at %p\n", facs);
wake_vec = (void *) facs->firmware_waking_vector;
printk_debug("OS waking vector is %p\n", wake_vec);
printk(BIOS_DEBUG, "OS waking vector is %p\n", wake_vec);
return wake_vec;
}

14
src/arch/i386/boot/boot.c
View File

@@ -84,13 +84,13 @@ void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size)
adjusted_boot_notes = (unsigned long)&elf_boot_notes;
adjusted_boot_notes += adjust;
printk_spew("entry = 0x%08lx\n", (unsigned long)entry);
printk_spew("lb_start = 0x%08lx\n", lb_start);
printk_spew("lb_size = 0x%08lx\n", lb_size);
printk_spew("adjust = 0x%08lx\n", adjust);
printk_spew("buffer = 0x%08lx\n", buffer);
printk_spew(" elf_boot_notes = 0x%08lx\n", (unsigned long)&elf_boot_notes);
printk_spew("adjusted_boot_notes = 0x%08lx\n", adjusted_boot_notes);
printk(BIOS_SPEW, "entry = 0x%08lx\n", (unsigned long)entry);
printk(BIOS_SPEW, "lb_start = 0x%08lx\n", lb_start);
printk(BIOS_SPEW, "lb_size = 0x%08lx\n", lb_size);
printk(BIOS_SPEW, "adjust = 0x%08lx\n", adjust);
printk(BIOS_SPEW, "buffer = 0x%08lx\n", buffer);
printk(BIOS_SPEW, " elf_boot_notes = 0x%08lx\n", (unsigned long)&elf_boot_notes);
printk(BIOS_SPEW, "adjusted_boot_notes = 0x%08lx\n", adjusted_boot_notes);
/* Jump to kernel */
__asm__ __volatile__(

24
src/arch/i386/boot/coreboot_table.c
View File

@@ -307,7 +307,7 @@ static unsigned long lb_table_fini(struct lb_header *head, int fixup)
head->table_checksum = compute_ip_checksum(first_rec, head->table_bytes);
head->header_checksum = 0;
head->header_checksum = compute_ip_checksum(head, sizeof(*head));
printk_debug("Wrote coreboot table at: %p - %p checksum %x\n",
printk(BIOS_DEBUG, "Wrote coreboot table at: %p - %p checksum %x\n",
head, rec, head->table_checksum);
return (unsigned long)rec;
}
@@ -428,7 +428,7 @@ static void lb_dump_memory_ranges(struct lb_memory *mem)
int i;
entries = (mem->size - sizeof(*mem))/sizeof(mem->map[0]);
printk_debug("coreboot memory table:\n");
printk(BIOS_DEBUG, "coreboot memory table:\n");
for(i = 0; i < entries; i++) {
uint64_t entry_start = unpack_lb64(mem->map[i].start);
uint64_t entry_size = unpack_lb64(mem->map[i].size);
@@ -445,7 +445,7 @@ static void lb_dump_memory_ranges(struct lb_memory *mem)
default: entry_type="UNKNOWN!"; break;
}
printk_debug("%2d. %016llx-%016llx: %s\n",
printk(BIOS_DEBUG, "%2d. %016llx-%016llx: %s\n",
i, entry_start, entry_start+entry_size-1, entry_type);
}
@@ -497,19 +497,19 @@ unsigned long write_coreboot_table(
struct lb_memory *mem;
#if CONFIG_WRITE_HIGH_TABLES == 1
printk_debug("Writing high table forward entry at 0x%08lx\n",
printk(BIOS_DEBUG, "Writing high table forward entry at 0x%08lx\n",
low_table_end);
head = lb_table_init(low_table_end);
lb_forward(head, (struct lb_header*)rom_table_end);
low_table_end = (unsigned long) lb_table_fini(head, 0);
printk_debug("New low_table_end: 0x%08lx\n", low_table_end);
printk_debug("Now going to write high coreboot table at 0x%08lx\n",
printk(BIOS_DEBUG, "New low_table_end: 0x%08lx\n", low_table_end);
printk(BIOS_DEBUG, "Now going to write high coreboot table at 0x%08lx\n",
rom_table_end);
head = lb_table_init(rom_table_end);
rom_table_end = (unsigned long)head;
printk_debug("rom_table_end = 0x%08lx\n", rom_table_end);
printk(BIOS_DEBUG, "rom_table_end = 0x%08lx\n", rom_table_end);
#else
if(low_table_end > (0x1000 - sizeof(struct lb_header))) { /* after 4K */
/* We need to put lbtable on to [0xf0000,0x100000) */
@@ -521,16 +521,16 @@ unsigned long write_coreboot_table(
}
#endif
printk_debug("Adjust low_table_end from 0x%08lx to ", low_table_end);
printk(BIOS_DEBUG, "Adjust low_table_end from 0x%08lx to ", low_table_end);
low_table_end += 0xfff; // 4K aligned
low_table_end &= ~0xfff;
printk_debug("0x%08lx \n", low_table_end);
printk(BIOS_DEBUG, "0x%08lx \n", low_table_end);
/* The Linux kernel assumes this region is reserved */
printk_debug("Adjust rom_table_end from 0x%08lx to ", rom_table_end);
printk(BIOS_DEBUG, "Adjust rom_table_end from 0x%08lx to ", rom_table_end);
rom_table_end += 0xffff; // 64K align
rom_table_end &= ~0xffff;
printk_debug("0x%08lx \n", rom_table_end);
printk(BIOS_DEBUG, "0x%08lx \n", rom_table_end);
#if (CONFIG_HAVE_OPTION_TABLE == 1)
{
@@ -553,7 +553,7 @@ unsigned long write_coreboot_table(
rom_table_start, rom_table_end-rom_table_start);
#if CONFIG_WRITE_HIGH_TABLES == 1
printk_debug("Adding high table area\n");
printk(BIOS_DEBUG, "Adding high table area\n");
// should this be LB_MEM_ACPI?
lb_add_memory_range(mem, LB_MEM_TABLE,
high_tables_base, high_tables_size);

4
src/arch/i386/boot/gdt.c
View File

@@ -47,7 +47,7 @@ void move_gdt(void)
printk(BIOS_ERR, "Error: Could not relocate GDT.\n");
return;
}
printk_debug("Moving GDT to %p...", newgdt);
printk(BIOS_DEBUG, "Moving GDT to %p...", newgdt);
memcpy((void*)newgdt, &gdt, num_gdt_bytes);
}
@@ -55,6 +55,6 @@ void move_gdt(void)
gdtarg.limit = num_gdt_bytes - 1;
__asm__ __volatile__ ("lgdt %0\n\t" : : "m" (gdtarg));
printk_debug("ok\n");
printk(BIOS_DEBUG, "ok\n");
}

2
src/arch/i386/boot/multiboot.c
View File

@@ -112,7 +112,7 @@ unsigned long write_multiboot_info(
mbi->mmap_length = ((u32) mb_mem) - mbi->mmap_addr;
mbi->flags |= MB_INFO_MEM_MAP;
printk_info("Multiboot Information structure has been written.\n");
printk(BIOS_INFO, "Multiboot Information structure has been written.\n");
return (unsigned long)mb_mem;
}

40
src/arch/i386/boot/pirq_routing.c
View File

@@ -14,10 +14,10 @@ static void check_pirq_routing_table(struct irq_routing_table *rt)
uint8_t sum=0;
int i;
printk_info("Checking Interrupt Routing Table consistency...\n");
printk(BIOS_INFO, "Checking Interrupt Routing Table consistency...\n");
if (sizeof(struct irq_routing_table) != rt->size) {
printk_warning("Inconsistent Interrupt Routing Table size (0x%x/0x%x).\n",
printk(BIOS_WARNING, "Inconsistent Interrupt Routing Table size (0x%x/0x%x).\n",
sizeof(struct irq_routing_table),
rt->size
);
@@ -27,21 +27,21 @@ static void check_pirq_routing_table(struct irq_routing_table *rt)
for (i = 0; i < rt->size; i++)
sum += addr[i];
printk_debug("%s(): Interrupt Routing Table located at %p.\n",
printk(BIOS_DEBUG, "%s(): Interrupt Routing Table located at %p.\n",
__func__, addr);
sum = rt->checksum - sum;
if (sum != rt->checksum) {
printk_warning("Interrupt Routing Table checksum is: 0x%02x but should be: 0x%02x.\n",
printk(BIOS_WARNING, "Interrupt Routing Table checksum is: 0x%02x but should be: 0x%02x.\n",
rt->checksum, sum);
rt->checksum = sum;
}
if (rt->signature != PIRQ_SIGNATURE || rt->version != PIRQ_VERSION ||
rt->size % 16 ) {
printk_warning("Interrupt Routing Table not valid.\n");
printk(BIOS_WARNING, "Interrupt Routing Table not valid.\n");
return;
}
@@ -54,11 +54,11 @@ static void check_pirq_routing_table(struct irq_routing_table *rt)
* function would have bailed out earlier.
*/
if (sum) {
printk_warning("Checksum error in Interrupt Routing Table "
printk(BIOS_WARNING, "Checksum error in Interrupt Routing Table "
"could not be fixed.\n");
}
printk_info("done.\n");
printk(BIOS_INFO, "done.\n");
}
static int verify_copy_pirq_routing_table(unsigned long addr)
@@ -68,14 +68,14 @@ static int verify_copy_pirq_routing_table(unsigned long addr)
rt_curr = (uint8_t*)addr;
rt_orig = (uint8_t*)&intel_irq_routing_table;
printk_info("Verifing copy of Interrupt Routing Table at 0x%08x... ", addr);
printk(BIOS_INFO, "Verifing copy of Interrupt Routing Table at 0x%08x... ", addr);
for (i = 0; i < intel_irq_routing_table.size; i++) {
if (*(rt_curr + i) != *(rt_orig + i)) {
printk_info("failed\n");
printk(BIOS_INFO, "failed\n");
return -1;
}
}
printk_info("done\n");
printk(BIOS_INFO, "done\n");
check_pirq_routing_table((struct irq_routing_table *)addr);
@@ -90,9 +90,9 @@ unsigned long copy_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
printk_info("Copying Interrupt Routing Table to 0x%08lx... ", addr);
printk(BIOS_INFO, "Copying Interrupt Routing Table to 0x%08lx... ", addr);
memcpy((void *)addr, &intel_irq_routing_table, intel_irq_routing_table.size);
printk_info("done.\n");
printk(BIOS_INFO, "done.\n");
#if CONFIG_DEBUG
verify_copy_pirq_routing_table(addr);
#endif
@@ -114,7 +114,7 @@ void pirq_routing_irqs(unsigned long addr)
/* Set PCI IRQs. */
for (i = 0; i < num_entries; i++) {
printk_debug("PIRQ Entry %d Dev/Fn: %X Slot: %d\n", i,
printk(BIOS_DEBUG, "PIRQ Entry %d Dev/Fn: %X Slot: %d\n", i,
pirq_tbl->slots[i].devfn >> 3, pirq_tbl->slots[i].slot);
for (j = 0; j < 4; j++) {
@@ -123,12 +123,12 @@ void pirq_routing_irqs(unsigned long addr)
int bitmap = pirq_tbl->slots[i].irq[j].bitmap;
int irq = 0;
printk_debug("INT: %c link: %x bitmap: %x ",
printk(BIOS_DEBUG, "INT: %c link: %x bitmap: %x ",
'A' + j, link, bitmap);
if (!bitmap|| !link || link > 4) {
printk_debug("not routed\n");
printk(BIOS_DEBUG, "not routed\n");
irq_slot[j] = irq;
continue;
}
@@ -154,7 +154,7 @@ void pirq_routing_irqs(unsigned long addr)
else
irq = pirq[link - 1];
printk_debug("IRQ: %d\n", irq);
printk(BIOS_DEBUG, "IRQ: %d\n", irq);
irq_slot[j] = irq;
}
@@ -163,10 +163,10 @@ void pirq_routing_irqs(unsigned long addr)
pirq_tbl->slots[i].devfn >> 3, irq_slot);
}
printk_debug("PIRQ1: %d\n", pirq[0]);
printk_debug("PIRQ2: %d\n", pirq[1]);
printk_debug("PIRQ3: %d\n", pirq[2]);
printk_debug("PIRQ4: %d\n", pirq[3]);
printk(BIOS_DEBUG, "PIRQ1: %d\n", pirq[0]);
printk(BIOS_DEBUG, "PIRQ2: %d\n", pirq[1]);
printk(BIOS_DEBUG, "PIRQ3: %d\n", pirq[2]);
printk(BIOS_DEBUG, "PIRQ4: %d\n", pirq[3]);
pirq_assign_irqs(pirq);
}

8
src/arch/i386/boot/tables.c
View File

@@ -53,12 +53,12 @@ struct lb_memory *write_tables(void)
unsigned long high_table_pointer;
if (!high_tables_base) {
printk_err("ERROR: High Tables Base is not set.\n");
printk(BIOS_ERR, "ERROR: High Tables Base is not set.\n");
// Are there any boards without?
// Stepan thinks we should die() here!
}
printk_debug("High Tables Base is %llx.\n", high_tables_base);
printk(BIOS_DEBUG, "High Tables Base is %llx.\n", high_tables_base);
rom_table_start = 0xf0000;
rom_table_end = 0xf0000;
@@ -169,7 +169,7 @@ struct lb_memory *write_tables(void)
(acpi_rsdt_t *)(high_rsdp->rsdt_address),
(acpi_xsdt_t *)((unsigned long)high_rsdp->xsdt_address));
} else {
printk_err("ERROR: Didn't find RSDP in high table.\n");
printk(BIOS_ERR, "ERROR: Didn't find RSDP in high table.\n");
}
rom_table_end = ALIGN(rom_table_end + sizeof(acpi_rsdp_t), 16);
} else {
@@ -202,7 +202,7 @@ struct lb_memory *write_tables(void)
if (new_high_table_pointer > (high_table_pointer +
MAX_COREBOOT_TABLE_SIZE))
printk_err("%s: coreboot table didn't fit (%lx)\n",
printk(BIOS_ERR, "%s: coreboot table didn't fit (%lx)\n",
__func__, new_high_table_pointer -
high_table_pointer);

38
src/arch/i386/lib/console_printk.c
View File

@@ -1,21 +1,21 @@
#define printk_emerg(fmt, arg...) do_printk(BIOS_EMERG ,fmt, ##arg)
#define printk_alert(fmt, arg...) do_printk(BIOS_ALERT ,fmt, ##arg)
#define printk(BIOS_EMERG, fmt, arg...) do_printk(BIOS_EMERG ,fmt, ##arg)
#define printk(BIOS_ALERT, fmt, arg...) do_printk(BIOS_ALERT ,fmt, ##arg)
#define printk_crit(fmt, arg...) do_printk(BIOS_CRIT ,fmt, ##arg)
#define printk_err(fmt, arg...) do_printk(BIOS_ERR ,fmt, ##arg)
#define printk_warning(fmt, arg...) do_printk(BIOS_WARNING ,fmt, ##arg)
#define printk(BIOS_ERR, fmt, arg...) do_printk(BIOS_ERR ,fmt, ##arg)
#define printk(BIOS_WARNING, fmt, arg...) do_printk(BIOS_WARNING ,fmt, ##arg)
#define printk_notice(fmt, arg...) do_printk(BIOS_NOTICE ,fmt, ##arg)
#define printk_info(fmt, arg...) do_printk(BIOS_INFO ,fmt, ##arg)
#define printk_debug(fmt, arg...) do_printk(BIOS_DEBUG ,fmt, ##arg)
#define printk_spew(fmt, arg...) do_printk(BIOS_SPEW ,fmt, ##arg)
#define printk(BIOS_INFO, fmt, arg...) do_printk(BIOS_INFO ,fmt, ##arg)
#define printk(BIOS_DEBUG, fmt, arg...) do_printk(BIOS_DEBUG ,fmt, ##arg)
#define printk(BIOS_SPEW, fmt, arg...) do_printk(BIOS_SPEW ,fmt, ##arg)
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_EMERG
#undef printk_emerg
#define printk_emerg(fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#define printk(BIOS_EMERG, fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_ALERT
#undef printk_alert
#define printk_alert(fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#define printk(BIOS_ALERT, fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_CRIT
#undef printk_crit
@@ -23,11 +23,11 @@
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_ERR
#undef printk_err
#define printk_err(fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#define printk(BIOS_ERR, fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_WARNING
#undef printk_warning
#define printk_warning(fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#define printk(BIOS_WARNING, fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_NOTICE
#undef printk_notice
@@ -35,22 +35,22 @@
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_INFO
#undef printk_info
#define printk_info(fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#define printk(BIOS_INFO, fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_DEBUG
#undef printk_debug
#define printk_debug(fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#define printk(BIOS_DEBUG, fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#endif
#if CONFIG_MAXIMUM_CONSOLE_LOGLEVEL < BIOS_SPEW
#undef printk_spew
#define printk_spew(fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#define printk(BIOS_SPEW, fmt, arg...) do_printk(BIOS_EMERG , "", ##arg)
#endif
#define print_emerg(STR) printk_emerg ("%s", (STR))
#define print_alert(STR) printk_alert ("%s", (STR))
#define print_crit(STR) printk_crit ("%s", (STR))
#define print_err(STR) printk_err ("%s", (STR))
#define print_warning(STR) printk_warning("%s", (STR))
#define print_warning(STR) printk(BIOS_WARNING, "%s", (STR))
#define print_notice(STR) printk_notice ("%s", (STR))
#define print_info(STR) printk_info ("%s", (STR))
#define print_debug(STR) printk_debug ("%s", (STR))
@@ -60,7 +60,7 @@
#define print_alert_char(CH) printk_alert ("%c", (CH))
#define print_crit_char(CH) printk_crit ("%c", (CH))
#define print_err_char(CH) printk_err ("%c", (CH))
#define print_warning_char(CH) printk_warning("%c", (CH))
#define print_warning_char(CH) printk(BIOS_WARNING, "%c", (CH))
#define print_notice_char(CH) printk_notice ("%c", (CH))
#define print_info_char(CH) printk_info ("%c", (CH))
#define print_debug_char(CH) printk_debug ("%c", (CH))
@@ -70,7 +70,7 @@
#define print_alert_hex8(HEX) printk_alert ("%02x", (HEX))
#define print_crit_hex8(HEX) printk_crit ("%02x", (HEX))
#define print_err_hex8(HEX) printk_err ("%02x", (HEX))
#define print_warning_hex8(HEX) printk_warning("%02x", (HEX))
#define print_warning_hex8(HEX) printk(BIOS_WARNING, "%02x", (HEX))
#define print_notice_hex8(HEX) printk_notice ("%02x", (HEX))
#define print_info_hex8(HEX) printk_info ("%02x", (HEX))
#define print_debug_hex8(HEX) printk_debug ("%02x", (HEX))
@@ -80,7 +80,7 @@
#define print_alert_hex16(HEX) printk_alert ("%04x", (HEX))
#define print_crit_hex16(HEX) printk_crit ("%04x", (HEX))
#define print_err_hex16(HEX) printk_err ("%04x", (HEX))
#define print_warning_hex16(HEX) printk_warning("%04x", (HEX))
#define print_warning_hex16(HEX) printk(BIOS_WARNING, "%04x", (HEX))
#define print_notice_hex16(HEX) printk_notice ("%04x", (HEX))
#define print_info_hex16(HEX) printk_info ("%04x", (HEX))
#define print_debug_hex16(HEX) printk_debug ("%04x", (HEX))
@@ -90,7 +90,7 @@
#define print_alert_hex32(HEX) printk_alert ("%08x", (HEX))
#define print_crit_hex32(HEX) printk_crit ("%08x", (HEX))
#define print_err_hex32(HEX) printk_err ("%08x", (HEX))
#define print_warning_hex32(HEX) printk_warning("%08x", (HEX))
#define print_warning_hex32(HEX) printk(BIOS_WARNING, "%08x", (HEX))
#define print_notice_hex32(HEX) printk_notice ("%08x", (HEX))
#define print_info_hex32(HEX) printk_info ("%08x", (HEX))
#define print_debug_hex32(HEX) printk_debug ("%08x", (HEX))

10
src/arch/i386/lib/cpu.c
View File

@@ -224,7 +224,7 @@ void cpu_initialize(void)
info = cpu_info();
printk_info("Initializing CPU #%ld\n", info->index);
printk(BIOS_INFO, "Initializing CPU #%ld\n", info->index);
cpu = info->cpu;
if (!cpu) {
@@ -233,12 +233,12 @@ void cpu_initialize(void)
/* Find what type of cpu we are dealing with */
identify_cpu(cpu);
printk_debug("CPU: vendor %s device %x\n",
printk(BIOS_DEBUG, "CPU: vendor %s device %x\n",
cpu_vendor_name(cpu->vendor), cpu->device);
get_fms(&c, cpu->device);
printk_debug("CPU: family %02x, model %02x, stepping %02x\n", c.x86, c.x86_model, c.x86_mask);
printk(BIOS_DEBUG, "CPU: family %02x, model %02x, stepping %02x\n", c.x86, c.x86_model, c.x86_mask);
/* Lookup the cpu's operations */
set_cpu_ops(cpu);
@@ -249,7 +249,7 @@ void cpu_initialize(void)
set_cpu_ops(cpu);
cpu->device += c.x86_mask;
if(!cpu->ops) die("Unknown cpu");
printk_debug("Using generic cpu ops (good)\n");
printk(BIOS_DEBUG, "Using generic cpu ops (good)\n");
}
@@ -260,7 +260,7 @@ void cpu_initialize(void)
cpu->ops->init(cpu);
}
printk_info("CPU #%ld initialized\n", info->index);
printk(BIOS_INFO, "CPU #%ld initialized\n", info->index);
return;
}

2
src/arch/i386/lib/exception.c
View File

@@ -475,7 +475,7 @@ void x86_exception(struct eregs *info)
put_packet(out_buffer);
}
#else /* !CONFIG_GDB_STUB */
printk_emerg(
printk(BIOS_EMERG,
"Unexpected Exception: %d @ %02x:%08x - Halting\n"
"Code: %d eflags: %08x\n"
"eax: %08x ebx: %08x ecx: %08x edx: %08x\n"

8
src/arch/i386/lib/pci_ops_auto.c
View File

@@ -37,7 +37,7 @@ static int pci_sanity_check(const struct pci_bus_operations *o)
return 1;
}
}
printk_err("PCI: Sanity check failed\n");
printk(BIOS_ERR, "PCI: Sanity check failed\n");
return 0;
}
@@ -58,7 +58,7 @@ static const struct pci_bus_operations *pci_check_direct(void)
pci_sanity_check(&pci_cf8_conf1))
{
outl(tmp, 0xCF8);
printk_debug("PCI: Using configuration type 1\n");
printk(BIOS_DEBUG, "PCI: Using configuration type 1\n");
return &pci_cf8_conf1;
}
outl(tmp, 0xCF8);
@@ -74,7 +74,7 @@ static const struct pci_bus_operations *pci_check_direct(void)
if ((inb(0xCF8) == 0x00 && inb(0xCFA) == 0x00) &&
pci_sanity_check(&pci_cf8_conf2))
{
printk_debug("PCI: Using configuration type 2\n");
printk(BIOS_DEBUG, "PCI: Using configuration type 2\n");
return &pci_cf8_conf2;
}
}
@@ -94,7 +94,7 @@ const struct pci_bus_operations *pci_remember_direct(void)
*/
void pci_set_method(device_t dev)
{
printk_info("Finding PCI configuration type.\n");
printk(BIOS_INFO, "Finding PCI configuration type.\n");
dev->ops->ops_pci_bus = pci_remember_direct();
post_code(0x5f);
}

26
src/arch/i386/smp/ioapic.c
View File

@@ -40,13 +40,13 @@ void clear_ioapic(u32 ioapic_base)
u32 low, high;
u32 i, ioapic_interrupts;
printk_debug("IOAPIC: Clearing IOAPIC at 0x%08x\n", ioapic_base);
printk(BIOS_DEBUG, "IOAPIC: Clearing IOAPIC at 0x%08x\n", ioapic_base);
/* Read the available number of interrupts */
ioapic_interrupts = (io_apic_read(ioapic_base, 1) >> 16) & 0xff;
if (!ioapic_interrupts || ioapic_interrupts == 0xff)
ioapic_interrupts = 24;
printk_debug("IOAPIC: %d interrupts\n", ioapic_interrupts);
printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts);
low = DISABLED;
high = NONE;
@@ -55,11 +55,11 @@ void clear_ioapic(u32 ioapic_base)
io_apic_write(ioapic_base, i * 2 + 0x10, low);
io_apic_write(ioapic_base, i * 2 + 0x11, high);
printk_spew("IOAPIC: reg 0x%08x value 0x%08x 0x%08x\n", i, high, low);
printk(BIOS_SPEW, "IOAPIC: reg 0x%08x value 0x%08x 0x%08x\n", i, high, low);
}
if (io_apic_read(ioapic_base, 0x10) == 0xffffffff) {
printk_warning("IO APIC not responding.\n");
printk(BIOS_WARNING, "IO APIC not responding.\n");
return;
}
}
@@ -70,12 +70,12 @@ void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
u32 low, high;
u32 i, ioapic_interrupts;
printk_debug("IOAPIC: Initializing IOAPIC at 0x%08x\n", ioapic_base);
printk_debug("IOAPIC: Bootstrap Processor Local APIC = %02x\n",
printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at 0x%08x\n", ioapic_base);
printk(BIOS_DEBUG, "IOAPIC: Bootstrap Processor Local APIC = %02x\n",
bsp_lapicid);
if (ioapic_id) {
printk_debug("IOAPIC: ID = 0x%02x\n", ioapic_id);
printk(BIOS_DEBUG, "IOAPIC: ID = 0x%02x\n", ioapic_id);
/* Set IOAPIC ID if it has been specified */
io_apic_write(ioapic_base, 0x00,
(io_apic_read(ioapic_base, 0x00) & 0xfff0ffff) |
@@ -86,7 +86,7 @@ void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
ioapic_interrupts = (io_apic_read(ioapic_base, 1) >> 16) & 0xff;
if (!ioapic_interrupts || ioapic_interrupts == 0xff)
ioapic_interrupts = 24;
printk_debug("IOAPIC: %d interrupts\n", ioapic_interrupts);
printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts);
// XXX this decision should probably be made elsewhere, and
@@ -101,11 +101,11 @@ void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
/* For the Pentium 4 and above APICs deliver their interrupts
* on the front side bus, enable that.
*/
printk_debug("IOAPIC: Enabling interrupts on FSB\n");
printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on FSB\n");
io_apic_write(ioapic_base, 0x03, io_apic_read(ioapic_base, 0x03) | (1 << 0));
#endif
#ifdef IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
printk_debug("IOAPIC: Enabling interrupts on APIC serial bus\n");
printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on APIC serial bus\n");
io_apic_write(ioapic_base, 0x03, 0);
#endif
@@ -117,11 +117,11 @@ void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
io_apic_write(ioapic_base, 0x11, high);
if (io_apic_read(ioapic_base, 0x10) == 0xffffffff) {
printk_warning("IO APIC not responding.\n");
printk(BIOS_WARNING, "IO APIC not responding.\n");
return;
}
printk_spew("IOAPIC: reg 0x%08x value 0x%08x 0x%08x\n", 0, high, low);
printk(BIOS_SPEW, "IOAPIC: reg 0x%08x value 0x%08x 0x%08x\n", 0, high, low);
low = DISABLED;
high = NONE;
@@ -130,6 +130,6 @@ void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
io_apic_write(ioapic_base, i * 2 + 0x10, low);
io_apic_write(ioapic_base, i * 2 + 0x11, high);
printk_spew("IOAPIC: reg 0x%08x value 0x%08x 0x%08x\n", i, high, low);
printk(BIOS_SPEW, "IOAPIC: reg 0x%08x value 0x%08x 0x%08x\n", i, high, low);
}
}

6
src/arch/i386/smp/mpspec.c
View File

@@ -177,7 +177,7 @@ void smp_write_intsrc(struct mp_config_table *mc,
mpc->mpc_dstirq = dstirq;
smp_add_mpc_entry(mc, sizeof(*mpc));
#ifdef DEBUG_MPTABLE
printk_debug("add intsrc srcbus 0x%x srcbusirq 0x%x, dstapic 0x%x, dstirq 0x%x\n",
printk(BIOS_DEBUG, "add intsrc srcbus 0x%x srcbusirq 0x%x, dstapic 0x%x, dstirq 0x%x\n",
srcbus, srcbusirq, dstapic, dstirq);
hexdump(__func__, mpc, sizeof(*mpc));
#endif
@@ -215,7 +215,7 @@ void smp_write_intsrc_pci_bridge(struct mp_config_table *mc,
if ((child->class >> 16) != PCI_BASE_CLASS_BRIDGE) {
/* pci device */
printk_debug("route irq: %s\n", dev_path(child));
printk(BIOS_DEBUG, "route irq: %s\n", dev_path(child));
for (i = 0; i < 4; i++)
smp_write_intsrc(mc, irqtype, irqflag, srcbus, (slot<<2)|i, dstapic, dstirq_x[i]);
goto next;
@@ -225,7 +225,7 @@ void smp_write_intsrc_pci_bridge(struct mp_config_table *mc,
case PCI_CLASS_BRIDGE_PCI:
case PCI_CLASS_BRIDGE_PCMCIA:
case PCI_CLASS_BRIDGE_CARDBUS:
printk_debug("route irq bridge: %s\n", dev_path(child));
printk(BIOS_DEBUG, "route irq bridge: %s\n", dev_path(child));
smp_write_intsrc_pci_bridge(mc, irqtype, irqflag, child, dstapic, dstirq_x);
}

68
src/boot/selfboot.c
View File

@@ -80,10 +80,10 @@ void * cbfs_load_payload(struct lb_memory *lb_mem, const char *name)
payload = (struct cbfs_payload *)cbfs_find_file(name, CBFS_TYPE_PAYLOAD);
if (payload == NULL)
return (void *) -1;
printk_debug("Got a payload\n");
printk(BIOS_DEBUG, "Got a payload\n");
selfboot(lb_mem, payload);
printk_emerg("SELFBOOT RETURNED!\n");
printk(BIOS_EMERG, "SELFBOOT RETURNED!\n");
return (void *) -1;
}
@@ -175,21 +175,21 @@ static int valid_area(struct lb_memory *mem, unsigned long buffer,
break;
}
if ((mtype == LB_MEM_TABLE) && (start < mend) && (end > mstart)) {
printk_err("Payload is overwriting Coreboot tables.\n");
printk(BIOS_ERR, "Payload is overwriting Coreboot tables.\n");
break;
}
}
if (i == mem_entries) {
printk_err("No matching ram area found for range:\n");
printk_err(" [0x%016lx, 0x%016lx)\n", start, end);
printk_err("Ram areas\n");
printk(BIOS_ERR, "No matching ram area found for range:\n");
printk(BIOS_ERR, " [0x%016lx, 0x%016lx)\n", start, end);
printk(BIOS_ERR, "Ram areas\n");
for(i = 0; i < mem_entries; i++) {
uint64_t mstart, mend;
uint32_t mtype;
mtype = mem->map[i].type;
mstart = unpack_lb64(mem->map[i].start);
mend = mstart + unpack_lb64(mem->map[i].size);
printk_err(" [0x%016lx, 0x%016lx) %s\n",
printk(BIOS_ERR, " [0x%016lx, 0x%016lx) %s\n",
(unsigned long)mstart,
(unsigned long)mend,
(mtype == LB_MEM_RAM)?"RAM":"Reserved");
@@ -220,7 +220,7 @@ static int relocate_segment(unsigned long buffer, struct segment *seg)
* 0 : A new segment is inserted after the seg, or no new one. */
unsigned long start, middle, end, ret = 0;
printk_spew("lb: [0x%016lx, 0x%016lx)\n",
printk(BIOS_SPEW, "lb: [0x%016lx, 0x%016lx)\n",
lb_start, lb_end);
/* I don't conflict with coreboot so get out of here */
@@ -231,7 +231,7 @@ static int relocate_segment(unsigned long buffer, struct segment *seg)
middle = start + seg->s_filesz;
end = start + seg->s_memsz;
printk_spew("segment: [0x%016lx, 0x%016lx, 0x%016lx)\n",
printk(BIOS_SPEW, "segment: [0x%016lx, 0x%016lx, 0x%016lx)\n",
start, middle, end);
if (seg->compression == CBFS_COMPRESS_NONE) {
@@ -268,7 +268,7 @@ static int relocate_segment(unsigned long buffer, struct segment *seg)
/* compute the new value of start */
start = seg->s_dstaddr;
printk_spew(" early: [0x%016lx, 0x%016lx, 0x%016lx)\n",
printk(BIOS_SPEW, " early: [0x%016lx, 0x%016lx, 0x%016lx)\n",
new->s_dstaddr,
new->s_dstaddr + new->s_filesz,
new->s_dstaddr + new->s_memsz);
@@ -305,7 +305,7 @@ static int relocate_segment(unsigned long buffer, struct segment *seg)
seg->phdr_next->phdr_prev = new;
seg->phdr_next = new;
printk_spew(" late: [0x%016lx, 0x%016lx, 0x%016lx)\n",
printk(BIOS_SPEW, " late: [0x%016lx, 0x%016lx, 0x%016lx)\n",
new->s_dstaddr,
new->s_dstaddr + new->s_filesz,
new->s_dstaddr + new->s_memsz);
@@ -319,7 +319,7 @@ static int relocate_segment(unsigned long buffer, struct segment *seg)
*/
seg->s_dstaddr = buffer + (seg->s_dstaddr - lb_start);
printk_spew(" bounce: [0x%016lx, 0x%016lx, 0x%016lx)\n",
printk(BIOS_SPEW, " bounce: [0x%016lx, 0x%016lx, 0x%016lx)\n",
seg->s_dstaddr,
seg->s_dstaddr + seg->s_filesz,
seg->s_dstaddr + seg->s_memsz);
@@ -342,16 +342,16 @@ static int build_self_segment_list(
first_segment = segment = &payload->segments;
while(1) {
printk_debug("Loading segment from rom address 0x%p\n", segment);
printk(BIOS_DEBUG, "Loading segment from rom address 0x%p\n", segment);
switch(segment->type) {
case PAYLOAD_SEGMENT_PARAMS:
printk_debug(" parameter section (skipped)\n");
printk(BIOS_DEBUG, " parameter section (skipped)\n");
segment++;
continue;
case PAYLOAD_SEGMENT_CODE:
case PAYLOAD_SEGMENT_DATA:
printk_debug(" %s (compression=%x)\n",
printk(BIOS_DEBUG, " %s (compression=%x)\n",
segment->type == PAYLOAD_SEGMENT_CODE ? "code" : "data",
ntohl(segment->compression));
new = malloc(sizeof(*new));
@@ -361,18 +361,18 @@ static int build_self_segment_list(
new->s_srcaddr = (u32) ((unsigned char *) first_segment) + ntohl(segment->offset);
new->s_filesz = ntohl(segment->len);
printk_debug(" New segment dstaddr 0x%lx memsize 0x%lx srcaddr 0x%lx filesize 0x%lx\n",
printk(BIOS_DEBUG, " New segment dstaddr 0x%lx memsize 0x%lx srcaddr 0x%lx filesize 0x%lx\n",
new->s_dstaddr, new->s_memsz, new->s_srcaddr, new->s_filesz);
/* Clean up the values */
if (new->s_filesz > new->s_memsz) {
new->s_filesz = new->s_memsz;
}
printk_debug(" (cleaned up) New segment addr 0x%lx size 0x%lx offset 0x%lx filesize 0x%lx\n",
printk(BIOS_DEBUG, " (cleaned up) New segment addr 0x%lx size 0x%lx offset 0x%lx filesize 0x%lx\n",
new->s_dstaddr, new->s_memsz, new->s_srcaddr, new->s_filesz);
break;
case PAYLOAD_SEGMENT_BSS:
printk_debug(" BSS 0x%p (%d byte)\n", (void *) ntohl((u32) segment->load_addr),
printk(BIOS_DEBUG, " BSS 0x%p (%d byte)\n", (void *) ntohl((u32) segment->load_addr),
ntohl(segment->mem_len));
new = malloc(sizeof(*new));
new->s_filesz = 0;
@@ -381,7 +381,7 @@ static int build_self_segment_list(
break;
case PAYLOAD_SEGMENT_ENTRY:
printk_debug(" Entry Point 0x%p\n", (void *) ntohl((u32) segment->load_addr));
printk(BIOS_DEBUG, " Entry Point 0x%p\n", (void *) ntohl((u32) segment->load_addr));
*entry = ntohl((u32) segment->load_addr);
/* Per definition, a payload always has the entry point
* as last segment. Thus, we use the occurence of the
@@ -394,7 +394,7 @@ static int build_self_segment_list(
/* We found something that we don't know about. Throw
* hands into the sky and run away!
*/
printk_emerg("Bad segment type %x\n", segment->type);
printk(BIOS_EMERG, "Bad segment type %x\n", segment->type);
return -1;
}
@@ -437,7 +437,7 @@ static int load_self_segments(
}
get_bounce_buffer(mem, bounce_high - lb_start);
if (!bounce_buffer) {
printk_err("Could not find a bounce buffer...\n");
printk(BIOS_ERR, "Could not find a bounce buffer...\n");
return 0;
}
for(ptr = head->next; ptr != head; ptr = ptr->next) {
@@ -447,7 +447,7 @@ static int load_self_segments(
}
for(ptr = head->next; ptr != head; ptr = ptr->next) {
unsigned char *dest, *src;
printk_debug("Loading Segment: addr: 0x%016lx memsz: 0x%016lx filesz: 0x%016lx\n",
printk(BIOS_DEBUG, "Loading Segment: addr: 0x%016lx memsz: 0x%016lx filesz: 0x%016lx\n",
ptr->s_dstaddr, ptr->s_memsz, ptr->s_filesz);
/* Modify the segment to load onto the bounce_buffer if necessary.
@@ -457,7 +457,7 @@ static int load_self_segments(
continue;
}
printk_debug("Post relocation: addr: 0x%016lx memsz: 0x%016lx filesz: 0x%016lx\n",
printk(BIOS_DEBUG, "Post relocation: addr: 0x%016lx memsz: 0x%016lx filesz: 0x%016lx\n",
ptr->s_dstaddr, ptr->s_memsz, ptr->s_filesz);
/* Compute the boundaries of the segment */
@@ -471,13 +471,13 @@ static int load_self_segments(
len = ptr->s_filesz;
switch(ptr->compression) {
case CBFS_COMPRESS_LZMA: {
printk_debug("using LZMA\n");
printk(BIOS_DEBUG, "using LZMA\n");
len = ulzma(src, dest);
break;
}
#if CONFIG_COMPRESSED_PAYLOAD_NRV2B==1
case CBFS_COMPRESS_NRV2B: {
printk_debug("using NRV2B\n");
printk(BIOS_DEBUG, "using NRV2B\n");
unsigned long unrv2b(u8 *src, u8 *dst, unsigned long *ilen_p);
unsigned long tmp;
len = unrv2b(src, dest, &tmp);
@@ -485,17 +485,17 @@ static int load_self_segments(
}
#endif
case CBFS_COMPRESS_NONE: {
printk_debug("it's not compressed!\n");
printk(BIOS_DEBUG, "it's not compressed!\n");
memcpy(dest, src, len);
break;
}
default:
printk_info( "CBFS: Unknown compression type %d\n", ptr->compression);
printk(BIOS_INFO, "CBFS: Unknown compression type %d\n", ptr->compression);
return -1;
}
end = dest + ptr->s_memsz;
middle = dest + len;
printk_spew("[ 0x%016lx, %016lx, 0x%016lx) <- %016lx\n",
printk(BIOS_SPEW, "[ 0x%016lx, %016lx, 0x%016lx) <- %016lx\n",
(unsigned long)dest,
(unsigned long)middle,
(unsigned long)end,
@@ -503,27 +503,27 @@ static int load_self_segments(
/* Zero the extra bytes between middle & end */
if (middle < end) {
printk_debug("Clearing Segment: addr: 0x%016lx memsz: 0x%016lx\n",
printk(BIOS_DEBUG, "Clearing Segment: addr: 0x%016lx memsz: 0x%016lx\n",
(unsigned long)middle, (unsigned long)(end - middle));
/* Zero the extra bytes */
memset(middle, 0, end - middle);
}
/* Copy the data that's outside the area that shadows coreboot_ram */
printk_debug("dest %p, end %p, bouncebuffer %lx\n", dest, end, bounce_buffer);
printk(BIOS_DEBUG, "dest %p, end %p, bouncebuffer %lx\n", dest, end, bounce_buffer);
if ((unsigned long)end > bounce_buffer) {
if ((unsigned long)dest < bounce_buffer) {
unsigned char *from = dest;
unsigned char *to = (unsigned char*)(lb_start-(bounce_buffer-(unsigned long)dest));
unsigned long amount = bounce_buffer-(unsigned long)dest;
printk_debug("move prefix around: from %p, to %p, amount: %lx\n", from, to, amount);
printk(BIOS_DEBUG, "move prefix around: from %p, to %p, amount: %lx\n", from, to, amount);
memcpy(to, from, amount);
}
if ((unsigned long)end > bounce_buffer + (lb_end - lb_start)) {
unsigned long from = bounce_buffer + (lb_end - lb_start);
unsigned long to = lb_end;
unsigned long amount = (unsigned long)end - from;
printk_debug("move suffix around: from %lx, to %lx, amount: %lx\n", from, to, amount);
printk(BIOS_DEBUG, "move suffix around: from %lx, to %lx, amount: %lx\n", from, to, amount);
memcpy((char*)to, (char*)from, amount);
}
}
@@ -545,12 +545,12 @@ static int selfboot(struct lb_memory *mem, struct cbfs_payload *payload)
if (!load_self_segments(&head, mem, payload))
goto out;
printk_spew("Loaded segments\n");
printk(BIOS_SPEW, "Loaded segments\n");
/* Reset to booting from this image as late as possible */
boot_successful();
printk_debug("Jumping to boot code at %x\n", entry);
printk(BIOS_DEBUG, "Jumping to boot code at %x\n", entry);
post_code(0xfe);
/* Jump to kernel */

4
src/console/console.c
View File

@@ -76,7 +76,7 @@ void post_code(uint8_t value)
{
#if !defined(CONFIG_NO_POST) || CONFIG_NO_POST==0
#if CONFIG_SERIAL_POST==1
printk_emerg("POST: 0x%02x\n", value);
printk(BIOS_EMERG, "POST: 0x%02x\n", value);
#endif
outb(value, 0x80);
#endif
@@ -85,7 +85,7 @@ void post_code(uint8_t value)
/* Report a fatal error */
void __attribute__((noreturn)) die(const char *msg)
{
printk_emerg("%s", msg);
printk(BIOS_EMERG, "%s", msg);
post_code(0xff);
while (1); /* Halt */
}

2
src/cpu/amd/car/post_cache_as_ram.c
View File

@@ -5,7 +5,7 @@
static inline void print_debug_pcar(const char *strval, uint32_t val)
{
printk_debug("%s%08x\r\n", strval, val);
printk(BIOS_DEBUG, "%s%08x\r\n", strval, val);
}
/* from linux kernel 2.6.32 asm/string_32.h */

6
src/cpu/amd/dualcore/amd_sibling.c
View File

@@ -109,7 +109,7 @@ unsigned get_apicid_base(unsigned ioapic_num)
if((apicid_base+ioapic_num-1)>0xf) {
// We need to enable APIC EXT ID
printk_info("if the IO APIC device doesn't support 256 apic id, \r\n you need to set CONFIG_ENABLE_APIC_EXT_ID in romstage.c so you can spare 16 id for ioapic\r\n");
printk(BIOS_INFO, "if the IO APIC device doesn't support 256 apic id, \r\n you need to set CONFIG_ENABLE_APIC_EXT_ID in romstage.c so you can spare 16 id for ioapic\r\n");
enable_apic_ext_id(nodes);
}
@@ -140,7 +140,7 @@ void amd_sibling_init(device_t cpu)
}
#if 1
printk_debug("CPU: %u %d siblings\n",
printk(BIOS_DEBUG, "CPU: %u %d siblings\n",
cpu->path.apic.apic_id,
siblings);
#endif
@@ -191,7 +191,7 @@ void amd_sibling_init(device_t cpu)
new->path.apic.core_id = i;
#if 1
printk_debug("CPU: %u has sibling %u\n",
printk(BIOS_DEBUG, "CPU: %u has sibling %u\n",
cpu->path.apic.apic_id,
new->path.apic.apic_id);
#endif

10
src/cpu/amd/microcode/microcode.c
View File

@@ -61,8 +61,8 @@ static int need_apply_patch(struct microcode *m, u32 equivalent_processor_rev_id
{
if (m->processor_rev_id != equivalent_processor_rev_id) {
printk_err("microcode: rev id (%x) does not match this patch.\n", m->processor_rev_id);
printk_err("microcode: Not updated! Fix microcode_updates[] \n");
printk(BIOS_ERR, "microcode: rev id (%x) does not match this patch.\n", m->processor_rev_id);
printk(BIOS_ERR, "microcode: Not updated! Fix microcode_updates[] \n");
return 0;
}
if (m->nb_dev_id) {
@@ -93,7 +93,7 @@ void amd_update_microcode(void *microcode_updates, u32 equivalent_processor_rev_
msr = rdmsr(0x8b);
patch_id = msr.lo;
printk_debug("microcode: equivalent rev id = 0x%04x, current patch id = 0x%08x\n", equivalent_processor_rev_id, patch_id);
printk(BIOS_DEBUG, "microcode: equivalent rev id = 0x%04x, current patch id = 0x%08x\n", equivalent_processor_rev_id, patch_id);
m = microcode_updates;
@@ -107,13 +107,13 @@ void amd_update_microcode(void *microcode_updates, u32 equivalent_processor_rev_
wrmsr(0xc0010020, msr);
printk_debug("microcode: patch id to apply = 0x%08x\n", m->patch_id);
printk(BIOS_DEBUG, "microcode: patch id to apply = 0x%08x\n", m->patch_id);
//read the patch_id again
msr = rdmsr(0x8b);
new_patch_id = msr.lo;
printk_debug("microcode: updated to patch id = 0x%08x %s\n", new_patch_id , (new_patch_id == m->patch_id)?" success\n":" fail\n" );
printk(BIOS_DEBUG, "microcode: updated to patch id = 0x%08x %s\n", new_patch_id , (new_patch_id == m->patch_id)?" success\n":" fail\n" );
break;
}
c += 2048;

24
src/cpu/amd/model_10xxx/fidvid.c
View File

@@ -28,21 +28,21 @@
static void print_debug_fv(const char *str, u32 val)
{
#if FAM10_SET_FIDVID_DEBUG == 1
printk_debug("%s%x\n", str, val);
printk(BIOS_DEBUG, "%s%x\n", str, val);
#endif
}
static void print_debug_fv_8(const char *str, u8 val)
{
#if FAM10_SET_FIDVID_DEBUG == 1
printk_debug("%s%02x\n", str, val);
printk(BIOS_DEBUG, "%s%02x\n", str, val);
#endif
}
static void print_debug_fv_64(const char *str, u32 val, u32 val2)
{
#if FAM10_SET_FIDVID_DEBUG == 1
printk_debug("%s%x%x\n", str, val, val2);
printk(BIOS_DEBUG, "%s%x%x\n", str, val, val2);
#endif
}
@@ -68,7 +68,7 @@ static void enable_fid_change(u8 fid)
dword |= (u32) fid & 0x1F;
dword |= 1 << 5; // enable
pci_write_config32(dev, 0xd4, dword);
printk_debug("FID Change Node:%02x, F3xD4: %08x \n", i, dword);
printk(BIOS_DEBUG, "FID Change Node:%02x, F3xD4: %08x \n", i, dword);
}
}
@@ -186,7 +186,7 @@ static void prep_fid_change(void)
nodes = get_nodes();
for(i = 0; i < nodes; i++) {
printk_debug("Prep FID/VID Node:%02x \n", i);
printk(BIOS_DEBUG, "Prep FID/VID Node:%02x \n", i);
dev = NODE_PCI(i,3);
dword = pci_read_config32(dev, 0xd8);
@@ -286,15 +286,15 @@ static void prep_fid_change(void)
pci_write_config32(dev, 0x80, dword);
dword = pci_read_config32(dev, 0x80);
printk_debug(" F3x80: %08x \n", dword);
printk(BIOS_DEBUG, " F3x80: %08x \n", dword);
dword = pci_read_config32(dev, 0x84);
printk_debug(" F3x84: %08x \n", dword);
printk(BIOS_DEBUG, " F3x84: %08x \n", dword);
dword = pci_read_config32(dev, 0xD4);
printk_debug(" F3xD4: %08x \n", dword);
printk(BIOS_DEBUG, " F3xD4: %08x \n", dword);
dword = pci_read_config32(dev, 0xD8);
printk_debug(" F3xD8: %08x \n", dword);
printk(BIOS_DEBUG, " F3xD8: %08x \n", dword);
dword = pci_read_config32(dev, 0xDC);
printk_debug(" F3xDC: %08x \n", dword);
printk(BIOS_DEBUG, " F3xDC: %08x \n", dword);
}
@@ -495,7 +495,7 @@ static void init_fidvid_ap(u32 bsp_apicid, u32 apicid, u32 nodeid, u32 coreid)
u8 nodes;
u8 i;
printk_debug("FIDVID on AP: %02x\n", apicid);
printk(BIOS_DEBUG, "FIDVID on AP: %02x\n", apicid);
/* Steps 1-6 of BIOS NB COF and VID Configuration
* for SVI and Single-Plane PVI Systems.
@@ -773,7 +773,7 @@ static int init_fidvid_bsp(u32 bsp_apicid, u32 nodes)
u32 reg1fc;
u8 pvimode;
printk_debug("FIDVID on BSP, APIC_id: %02x\n", bsp_apicid);
printk(BIOS_DEBUG, "FIDVID on BSP, APIC_id: %02x\n", bsp_apicid);
/* FIXME: The first half of this function is nearly the same as
* init_fidvid_bsp() and the code could be combined.
*/

36
src/cpu/amd/model_10xxx/init_cpus.c
View File

@@ -32,24 +32,24 @@
static void print_initcpu8 (const char *strval, u8 val)
{
printk_debug("%s%02x\n", strval, val);
printk(BIOS_DEBUG, "%s%02x\n", strval, val);
}
static void print_initcpu8_nocr (const char *strval, u8 val)
{
printk_debug("%s%02x", strval, val);
printk(BIOS_DEBUG, "%s%02x", strval, val);
}
static void print_initcpu16 (const char *strval, u16 val)
{
printk_debug("%s%04x\n", strval, val);
printk(BIOS_DEBUG, "%s%04x\n", strval, val);
}
static void print_initcpu(const char *strval, u32 val)
{
printk_debug("%s%08x\n", strval, val);
printk(BIOS_DEBUG, "%s%08x\n", strval, val);
}
@@ -223,7 +223,7 @@ static void init_fidvid_ap(u32 bsp_apicid, u32 apicid, u32 nodeid, u32 coreid);
static inline __attribute__((always_inline)) void print_apicid_nodeid_coreid(u32 apicid, struct node_core_id id, const char *str)
{
printk_debug("%s --- { APICID = %02x NODEID = %02x COREID = %02x} ---\n", str, apicid, id.nodeid, id.coreid);
printk(BIOS_DEBUG, "%s --- { APICID = %02x NODEID = %02x COREID = %02x} ---\n", str, apicid, id.nodeid, id.coreid);
}
@@ -406,10 +406,10 @@ static u32 init_cpus(u32 cpu_init_detectedx)
{
// check warm(bios) reset to call stage2 otherwise do stage1
if (warm_reset_detect(id.nodeid)) {
printk_debug("init_fidvid_stage2 apicid: %02x\n", apicid);
printk(BIOS_DEBUG, "init_fidvid_stage2 apicid: %02x\n", apicid);
init_fidvid_stage2(apicid, id.nodeid);
} else {
printk_debug("init_fidvid_ap(stage1) apicid: %02x\n", apicid);
printk(BIOS_DEBUG, "init_fidvid_ap(stage1) apicid: %02x\n", apicid);
init_fidvid_ap(bsp_apicid, apicid, id.nodeid, id.coreid);
}
}
@@ -424,7 +424,7 @@ static u32 init_cpus(u32 cpu_init_detectedx)
set_var_mtrr(0, 0x00000000, CONFIG_RAMTOP, MTRR_TYPE_WRBACK);
STOP_CAR_AND_CPU();
printk_debug("\nAP %02x should be halted but you are reading this....\n", apicid);
printk(BIOS_DEBUG, "\nAP %02x should be halted but you are reading this....\n", apicid);
}
return bsp_apicid;
@@ -449,12 +449,12 @@ static void wait_all_core0_started(void)
u32 i;
u32 nodes = get_nodes();
printk_debug("Wait all core0s started \n");
printk(BIOS_DEBUG, "Wait all core0s started \n");
for(i=1;i<nodes;i++) { // skip bsp, because it is running on bsp
while(!is_core0_started(i)) {}
print_initcpu8(" Core0 started on node: ", i);
}
printk_debug("Wait all core0s started done\n");
printk(BIOS_DEBUG, "Wait all core0s started done\n");
}
#if CONFIG_MAX_PHYSICAL_CPUS > 1
/**
@@ -471,7 +471,7 @@ static void start_node(u8 node)
u32 val;
/* Enable routing table */
printk_debug("Start node %02x", node);
printk(BIOS_DEBUG, "Start node %02x", node);
#if CONFIG_NORTHBRIDGE_AMD_AMDFAM10
/* For FAM10 support, we need to set Dram base/limit for the new node */
@@ -484,7 +484,7 @@ static void start_node(u8 node)
val &= ~(1 << 1);
pci_write_config32(NODE_HT(node), 0x6c, val);
printk_debug(" done.\n");
printk(BIOS_DEBUG, " done.\n");
}
@@ -514,7 +514,7 @@ static void setup_remote_node(u8 node)
};
u16 i;
printk_debug("setup_remote_node: %02x", node);
printk(BIOS_DEBUG, "setup_remote_node: %02x", node);
/* copy the default resource map from node 0 */
for(i = 0; i < ARRAY_SIZE(pci_reg); i++) {
@@ -525,7 +525,7 @@ static void setup_remote_node(u8 node)
pci_write_config32(NODE_MP(node), reg, value);
}
printk_debug(" done\n");
printk(BIOS_DEBUG, " done\n");
}
#endif /* CONFIG_MAX_PHYSICAL_CPUS > 1 */
@@ -845,7 +845,7 @@ void cpuSetAMDMSR(void)
u8 i;
u32 revision, platform;
printk_debug("cpuSetAMDMSR ");
printk(BIOS_DEBUG, "cpuSetAMDMSR ");
revision = mctGetLogicalCPUID(0xFF);
platform = get_platform_type();
@@ -863,7 +863,7 @@ void cpuSetAMDMSR(void)
}
AMD_Errata298();
printk_debug(" done\n");
printk(BIOS_DEBUG, " done\n");
}
@@ -879,7 +879,7 @@ void cpuSetAMDPCI(u8 node)
u32 val;
u8 offset;
printk_debug("cpuSetAMDPCI %02d", node);
printk(BIOS_DEBUG, "cpuSetAMDPCI %02d", node);
revision = mctGetLogicalCPUID(node);
@@ -933,7 +933,7 @@ void cpuSetAMDPCI(u8 node)
if (revision & (AMD_DR_B2 | AMD_DR_B3))
dctPhyDiag(); */
printk_debug(" done\n");
printk(BIOS_DEBUG, " done\n");
}

4
src/cpu/amd/model_10xxx/model_10xxx_init.c
View File

@@ -77,7 +77,7 @@ void model_10xxx_init(device_t dev)
#endif
id = get_node_core_id(read_nb_cfg_54()); /* nb_cfg_54 can not be set */
printk_debug("nodeid = %02d, coreid = %02d\n", id.nodeid, id.coreid);
printk(BIOS_DEBUG, "nodeid = %02d, coreid = %02d\n", id.nodeid, id.coreid);
/* Turn on caching if we haven't already */
x86_enable_cache();
@@ -114,7 +114,7 @@ void model_10xxx_init(device_t dev)
msr.hi |= 1 << (33-32);
wrmsr_amd(CPU_ID_EXT_FEATURES_MSR, msr);
}
printk_debug("siblings = %02d, ", siblings);
printk(BIOS_DEBUG, "siblings = %02d, ", siblings);
#endif
/* DisableCf8ExtCfg */

2
src/cpu/amd/model_10xxx/processor_name.c
View File

@@ -226,7 +226,7 @@ done:
strcpymax(&program_string[j], processor_name_string,
sizeof(program_string) - j);
printk_debug("CPU model: %s\n", program_string);
printk(BIOS_DEBUG, "CPU model: %s\n", program_string);
for (i = 0; i < 6; i++) {
msr.lo = p_program_string[(2 * i) + 0];

2
src/cpu/amd/model_10xxx/update_microcode.c
View File

@@ -97,7 +97,7 @@ void update_microcode(u32 cpu_deviceid)
if (equivalent_processor_rev_id != 0) {
amd_update_microcode((void *) microcode_updates, equivalent_processor_rev_id);
} else {
printk_debug("microcode: rev id not found. Skipping microcode patch!\n");
printk(BIOS_DEBUG, "microcode: rev id not found. Skipping microcode patch!\n");
}
}

24
src/cpu/amd/model_fxx/fidvid.c
View File

@@ -15,21 +15,21 @@
static inline void print_debug_fv(const char *str, unsigned val)
{
#if K8_SET_FIDVID_DEBUG == 1
printk_debug("%s%x\r\n", str, val);
printk(BIOS_DEBUG, "%s%x\r\n", str, val);
#endif
}
static inline void print_debug_fv_8(const char *str, unsigned val)
{
#if K8_SET_FIDVID_DEBUG == 1
printk_debug("%s%02x\r\n", str, val);
printk(BIOS_DEBUG, "%s%02x\r\n", str, val);
#endif
}
static inline void print_debug_fv_64(const char *str, unsigned val, unsigned val2)
{
#if K8_SET_FIDVID_DEBUG == 1
printk_debug("%s%x%x\r\n", str, val, val2);
printk(BIOS_DEBUG, "%s%x%x\r\n", str, val, val2);
#endif
}
@@ -131,7 +131,7 @@ static u32 set_fidvid(unsigned apicid, unsigned fidvid, int showmessage)
apicidx = lapicid();
if (apicid != apicidx) {
printk_err("wrong apicid, we want change %x, but it is %x\r\n", apicid, apicidx);
printk(BIOS_ERR, "wrong apicid, we want change %x, but it is %x\r\n", apicid, apicidx);
return fidvid;
}
@@ -201,8 +201,8 @@ static u32 set_fidvid(unsigned apicid, unsigned fidvid, int showmessage)
* transition to target fid
*/
printk_debug("Current fid_cur: 0x%x, fid_max: 0x%x\n", fid_cur, fid_max);
printk_debug("Requested fid_new: 0x%x\n", fid_new);
printk(BIOS_DEBUG, "Current fid_cur: 0x%x, fid_max: 0x%x\n", fid_cur, fid_max);
printk(BIOS_DEBUG, "Requested fid_new: 0x%x\n", fid_new);
step_limit = 8; /* max 8 steps just in case... */
while ((fid_cur != fid_new) && (step_limit--)) {
@@ -218,7 +218,7 @@ static u32 set_fidvid(unsigned apicid, unsigned fidvid, int showmessage)
/* If 200Mhz step OR past 3200 max table value */
if ((step == 2) || (fid_new >= 0x18 || fid_cur >= 0x18)) {
printk_debug("200MHZ step ");
printk(BIOS_DEBUG, "200MHZ step ");
/* Step +/- 200MHz at a time */
if (fid_cur < fid_new)
@@ -231,7 +231,7 @@ static u32 set_fidvid(unsigned apicid, unsigned fidvid, int showmessage)
int temp;
/* look it up in the table */
printk_debug("FidVid table step ");
printk(BIOS_DEBUG, "FidVid table step ");
temp = next_fid_200[((fid_new/2) * 13) + (fid_cur/2)];
@@ -243,7 +243,7 @@ static u32 set_fidvid(unsigned apicid, unsigned fidvid, int showmessage)
break; /* table error */
} else { /* step < 2 (100MHZ) */
printk_debug("100MHZ step ");
printk(BIOS_DEBUG, "100MHZ step ");
/* The table adjust in 200MHz increments. If requested,
* do the 100MHz increment if the CPU supports it.*/
@@ -251,17 +251,17 @@ static u32 set_fidvid(unsigned apicid, unsigned fidvid, int showmessage)
fid_temp = fid_cur + 1;
} else {
/* 100 MHZ not supported. Get out of the loop */
printk_debug("is not supported.\n");
printk(BIOS_DEBUG, "is not supported.\n");
break;
}
}
if(fid_temp > fid_max) {
printk_debug("fid_temp 0x%x > fid_max 0x%x\n", fid_temp, fid_max);
printk(BIOS_DEBUG, "fid_temp 0x%x > fid_max 0x%x\n", fid_temp, fid_max);
break;
}
printk_debug("fidvid: 0x%x\n", fid_temp);
printk(BIOS_DEBUG, "fidvid: 0x%x\n", fid_temp);
/* set target fid */
msr.hi = 0x190; /* 2 us for AMD NPT Family 0Fh Processors */

10
src/cpu/amd/model_fxx/init_cpus.c
View File

@@ -16,23 +16,23 @@
static inline void print_initcpu8 (const char *strval, unsigned val)
{
printk_debug("%s%02x\r\n", strval, val);
printk(BIOS_DEBUG, "%s%02x\r\n", strval, val);
}
static inline void print_initcpu8_nocr (const char *strval, unsigned val)
{
printk_debug("%s%02x", strval, val);
printk(BIOS_DEBUG, "%s%02x", strval, val);
}
static inline void print_initcpu16 (const char *strval, unsigned val)
{
printk_debug("%s%04x\r\n", strval, val);
printk(BIOS_DEBUG, "%s%04x\r\n", strval, val);
}
static inline void print_initcpu(const char *strval, unsigned val)
{
printk_debug("%s%08x\r\n", strval, val);
printk(BIOS_DEBUG, "%s%08x\r\n", strval, val);
}
typedef void (*process_ap_t)(unsigned apicid, void *gp);
@@ -155,7 +155,7 @@ static void init_fidvid_ap(unsigned bsp_apicid, unsigned apicid);
static inline __attribute__((always_inline)) void print_apicid_nodeid_coreid(unsigned apicid, struct node_core_id id, const char *str)
{
printk_debug("%s --- { APICID = %02x NODEID = %02x COREID = %02x} ---\r\n", str, apicid, id.nodeid, id.coreid);
printk(BIOS_DEBUG, "%s --- { APICID = %02x NODEID = %02x COREID = %02x} ---\r\n", str, apicid, id.nodeid, id.coreid);
}

20
src/cpu/amd/model_fxx/model_fxx_init.c
View File

@@ -150,16 +150,16 @@ static void print_mtrr_state(struct mtrr_state *state)
{
int i;
for(i = 0; i < MTRR_COUNT; i++) {
printk_debug("var mtrr %d: %08x%08x mask: %08x%08x\n",
printk(BIOS_DEBUG, "var mtrr %d: %08x%08x mask: %08x%08x\n",
i,
state->mtrrs[i].base.hi, state->mtrrs[i].base.lo,
state->mtrrs[i].mask.hi, state->mtrrs[i].mask.lo);
}
printk_debug("top_mem: %08x%08x\n",
printk(BIOS_DEBUG, "top_mem: %08x%08x\n",
state->top_mem.hi, state->top_mem.lo);
printk_debug("top_mem2: %08x%08x\n",
printk(BIOS_DEBUG, "top_mem2: %08x%08x\n",
state->top_mem2.hi, state->top_mem2.lo);
printk_debug("def_type: %08x%08x\n",
printk(BIOS_DEBUG, "def_type: %08x%08x\n",
state->def_type.hi, state->def_type.lo);
}
#endif
@@ -214,7 +214,7 @@ static inline void clear_2M_ram(unsigned long basek, struct mtrr_state *mtrr_sta
enable_lapic();
/* Print a status message */
printk_debug("%c", (basek >= TOLM_KB)?'+':'-');
printk(BIOS_DEBUG, "%c", (basek >= TOLM_KB)?'+':'-');
/* Return to the initialization state */
set_init_ecc_mtrrs();
@@ -232,7 +232,7 @@ static inline void clear_2M_ram(unsigned long basek, struct mtrr_state *mtrr_sta
size = (limitk - basek) << 10;
addr = map_2M_page(basek >> 11);
if (addr == MAPPING_ERROR) {
printk_err("Cannot map page: %lx\n", basek >> 11);
printk(BIOS_ERR, "Cannot map page: %lx\n", basek >> 11);
return;
}
@@ -276,14 +276,14 @@ static void init_ecc_memory(unsigned node_id)
} else {
pci_write_config32(f3_dev, SCRUB_CONTROL,
(SCRUB_NONE << 16) | (SCRUB_NONE << 8) | (SCRUB_NONE << 0));
printk_debug("Scrubbing Disabled\n");
printk(BIOS_DEBUG, "Scrubbing Disabled\n");
}
/* If ecc support is not enabled don't touch memory */
dcl = pci_read_config32(f2_dev, DRAM_CONFIG_LOW);
if (!(dcl & DCL_DimmEccEn)) {
printk_debug("ECC Disabled\n");
printk(BIOS_DEBUG, "ECC Disabled\n");
return;
}
@@ -313,7 +313,7 @@ static void init_ecc_memory(unsigned node_id)
begink = (CONFIG_RAMTOP >>10);
}
printk_debug("Clearing memory %luK - %luK: ", begink, endk);
printk(BIOS_DEBUG, "Clearing memory %luK - %luK: ", begink, endk);
/* Save the normal state */
save_mtrr_state(&mtrr_state);
@@ -362,7 +362,7 @@ static void init_ecc_memory(unsigned node_id)
(SCRUB_84ms << 16) | (SCRUB_84ms << 8) | (SCRUB_84ms << 0));
}
printk_debug(" done\n");
printk(BIOS_DEBUG, " done\n");
}

16
src/cpu/amd/model_fxx/powernow_acpi.c
View File

@@ -156,14 +156,14 @@ static int pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP)
v[10] = cpuid1.ecx;
v[11] = cpuid1.edx;
processor_brand[48] = 0;
printk_info("processor_brand=%s\n", processor_brand);
printk(BIOS_INFO, "processor_brand=%s\n", processor_brand);
/*
* Based on the CPU socket type,cmp_cap and pwr_lmt , get the power limit.
* socket_type : 0x10 SocketF; 0x11 AM2/ASB1 ; 0x12 S1G1
* cmp_cap : 0x0 SingleCore ; 0x1 DualCore
*/
printk_info("Pstates Algorithm ...\n");
printk(BIOS_INFO, "Pstates Algorithm ...\n");
cmp_cap =
(pci_read_config16(dev_find_slot(0, PCI_DEVFN(0x18, 3)), 0xE8) &
0x3000) >> 12;
@@ -181,7 +181,7 @@ static int pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP)
/* See if the CPUID(0x80000007) returned EDX[2:1]==11b */
cpuid1 = cpuid(0x80000007);
if ((cpuid1.edx & 0x6) != 0x6) {
printk_info("No valid set of P-states\n");
printk(BIOS_INFO, "No valid set of P-states\n");
goto write_pstates;
}
@@ -204,7 +204,7 @@ static int pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP)
PstateStep_coef = 2;
if (IntPstateSup == 0) {
printk_info("No intermediate P-states are supported\n");
printk(BIOS_INFO, "No intermediate P-states are supported\n");
goto write_pstates;
}
@@ -352,12 +352,12 @@ static int pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP)
/* Print Pstate freq,vid,volt,power */
for (index = 0; index < Pstate_num; index++) {
printk_info("Pstate_freq[%d] = %dMHz\t", index,
printk(BIOS_INFO, "Pstate_freq[%d] = %dMHz\t", index,
Pstate_feq[index]);
printk_info("Pstate_vid[%d] = %d\t", index, Pstate_vid[index]);
printk_info("Pstate_volt[%d] = %dmv\t", index,
printk(BIOS_INFO, "Pstate_vid[%d] = %d\t", index, Pstate_vid[index]);
printk(BIOS_INFO, "Pstate_volt[%d] = %dmv\t", index,
Pstate_volt[index]);
printk_info("Pstate_power[%d] = %dmw\n", index,
printk(BIOS_INFO, "Pstate_power[%d] = %dmw\n", index,
Pstate_power[index]);
}

2
src/cpu/amd/model_fxx/processor_name.c
View File

@@ -443,7 +443,7 @@ int init_processor_name(void)
}
}
printk_debug("CPU model %s\n", program_string);
printk(BIOS_DEBUG, "CPU model %s\n", program_string);
for (i=0; i<6; i++) {
progmsr.lo = program_values[(2*i)+0];

10
src/cpu/amd/model_gx2/cpubug.c
View File

@@ -169,7 +169,7 @@ eng2900(void)
{
msr_t msr;
printk_debug("CPU_BUG:%s\n", __func__);
printk(BIOS_DEBUG, "CPU_BUG:%s\n", __func__);
/* Clear bit 43, disables the sysenter/sysexit in CPUID3 */
msr = rdmsr(0x3003);
msr.hi &= 0xFFFFF7FF;
@@ -356,10 +356,10 @@ cpubug(void)
rev = msr.lo & 0xff;
if (rev < 0x20) {
printk_err("%s: rev < 0x20! bailing!\n");
printk(BIOS_ERR, "%s: rev < 0x20! bailing!\n");
return;
}
printk_debug("Doing cpubug fixes for rev 0x%x\n", rev);
printk(BIOS_DEBUG, "Doing cpubug fixes for rev 0x%x\n", rev);
switch(rev)
{
case 0x20:
@@ -379,11 +379,11 @@ cpubug(void)
case 0x30:
break;
default:
printk_err("unknown rev %x, bailing\n", rev);
printk(BIOS_ERR, "unknown rev %x, bailing\n", rev);
return;
}
bug784();
bug118253();
disablememoryreadorder();
printk_debug("Done cpubug fixes \n");
printk(BIOS_DEBUG, "Done cpubug fixes \n");
}

4
src/cpu/amd/model_gx2/model_gx2_init.c
View File

@@ -19,7 +19,7 @@ static void vsm_end_post_smi(void)
static void model_gx2_init(device_t dev)
{
printk_debug("model_gx2_init\n");
printk(BIOS_DEBUG, "model_gx2_init\n");
/* Turn on caching if we haven't already */
x86_enable_cache();
@@ -29,7 +29,7 @@ static void model_gx2_init(device_t dev)
vsm_end_post_smi();
printk_debug("model_gx2_init DONE\n");
printk(BIOS_DEBUG, "model_gx2_init DONE\n");
};
static struct device_operations cpu_dev_ops = {

10
src/cpu/amd/model_gx2/vsmsetup.c
View File

@@ -187,16 +187,16 @@ void do_vsmbios(void)
unsigned char *buf;
int i;
printk_err( "do_vsmbios\n");
printk(BIOS_ERR, "do_vsmbios\n");
/* Clear VSM BIOS data area. */
for (i = 0x400; i < 0x500; i++)
*(volatile unsigned char *)i = 0;
if ((unsigned int)cbfs_load_stage("vsa") != VSA2_ENTRY_POINT) {
printk_err("do_vsmbios: Failed to load VSA.\n");
printk(BIOS_ERR, "do_vsmbios: Failed to load VSA.\n");
}
buf = VSA2_BUFFER;
printk_debug("buf[0x20] signature is %x:%x:%x:%x\n",
printk(BIOS_DEBUG, "buf[0x20] signature is %x:%x:%x:%x\n",
buf[0x20], buf[0x21], buf[0x22], buf[0x23]);
/* Check for POST code at start of vsainit.bin. If you don't see it,
* don't bother.
@@ -207,7 +207,7 @@ void do_vsmbios(void)
}
/* ecx gets smm, edx gets sysm. */
printk_err("Call real_mode_switch_call_vsm\n");
printk(BIOS_ERR, "Call real_mode_switch_call_vsm\n");
// real_mode_switch_call_vsm(MSR_GLIU0_SMM, MSR_GLIU0_SYSMEM);
/* Restart Timer 1. */
@@ -216,7 +216,7 @@ void do_vsmbios(void)
/* Check that VSA is running OK. */
if (VSA_vrRead(SIGNATURE) == VSA2_SIGNATURE)
printk_debug("do_vsmbios: VSA2 VR signature verified\n");
printk(BIOS_DEBUG, "do_vsmbios: VSA2 VR signature verified\n");
else
die("FATAL: VSA2 VR signature not valid, install failed!\n");
}

2
src/cpu/amd/model_lx/cpubug.c
View File

@@ -87,5 +87,5 @@ void cpubug(void)
{
pcideadlock();
disablememoryreadorder();
printk_debug("Done cpubug fixes \n");
printk(BIOS_DEBUG, "Done cpubug fixes \n");
}

8
src/cpu/amd/model_lx/model_lx_init.c
View File

@@ -40,7 +40,7 @@ static void vsm_end_post_smi(void)
static void model_lx_init(device_t dev)
{
printk_debug("model_lx_init\n");
printk(BIOS_DEBUG, "model_lx_init\n");
/* Turn on caching if we haven't already */
x86_enable_cache();
@@ -52,11 +52,11 @@ static void model_lx_init(device_t dev)
vsm_end_post_smi();
// Set gate A20 (legacy vsm disables it in late init)
printk_debug("A20 (0x92): %d\n", inb(0x92));
printk(BIOS_DEBUG, "A20 (0x92): %d\n", inb(0x92));
outb(0x02, 0x92);
printk_debug("A20 (0x92): %d\n", inb(0x92));
printk(BIOS_DEBUG, "A20 (0x92): %d\n", inb(0x92));
printk_debug("CPU model_lx_init DONE\n");
printk(BIOS_DEBUG, "CPU model_lx_init DONE\n");
};
static struct device_operations cpu_dev_ops = {

51
src/cpu/amd/model_lx/vsmsetup.c
View File

@@ -274,7 +274,7 @@ void do_vsmbios(void)
unsigned int size = SMM_SIZE * 1024;
int i;
printk_err("do_vsmbios\n");
printk(BIOS_ERR, "do_vsmbios\n");
/* clear vsm bios data area */
for (i = 0x400; i < 0x500; i++) {
*(volatile unsigned char *)i = 0;
@@ -288,23 +288,23 @@ void do_vsmbios(void)
*/
if ((unsigned int)cbfs_load_stage("vsa") != VSA2_ENTRY_POINT) {
printk_err("do_vsmbios: Failed to load VSA.\n");
printk(BIOS_ERR, "do_vsmbios: Failed to load VSA.\n");
}
buf = (unsigned char *)VSA2_BUFFER;
printk_debug("buf %p *buf %d buf[256k] %d\n",
printk(BIOS_DEBUG, "buf %p *buf %d buf[256k] %d\n",
buf, buf[0], buf[SMM_SIZE * 1024]);
printk_debug("buf[0x20] signature is %x:%x:%x:%x\n",
printk(BIOS_DEBUG, "buf[0x20] signature is %x:%x:%x:%x\n",
buf[0x20], buf[0x21], buf[0x22], buf[0x23]);
/* check for post code at start of vsainit.bin. If you don't see it,
don't bother. */
if ((buf[0x20] != 0xb0) || (buf[0x21] != 0x10) ||
(buf[0x22] != 0xe6) || (buf[0x23] != 0x80)) {
printk_err("do_vsmbios: no vsainit.bin signature, skipping!\n");
printk(BIOS_ERR, "do_vsmbios: no vsainit.bin signature, skipping!\n");
return;
}
/* ecx gets smm, edx gets sysm */
printk_err("Call real_mode_switch_call_vsm\n");
printk(BIOS_ERR, "Call real_mode_switch_call_vsm\n");
real_mode_switch_call_vsm(MSR_GLIU0_SMM, MSR_GLIU0_SYSMEM);
/* restart timer 1 */
@@ -313,10 +313,9 @@ void do_vsmbios(void)
// check that VSA is running OK
if (VSA_vrRead(SIGNATURE) == VSA2_SIGNATURE)
printk_debug("do_vsmbios: VSA2 VR signature verified\n");
printk(BIOS_DEBUG, "do_vsmbios: VSA2 VR signature verified\n");
else
printk_err
("do_vsmbios: VSA2 VR signature not valid, install failed!\n");
printk(BIOS_ERR, "do_vsmbios: VSA2 VR signature not valid, install failed!\n");
}
// we had hoped to avoid this.
@@ -495,30 +494,30 @@ int biosint(unsigned long intnumber,
cs = cs_ip >> 16;
flags = stackflags;
printk_debug("biosint: INT# 0x%lx\n", intnumber);
printk_debug("biosint: eax 0x%lx ebx 0x%lx ecx 0x%lx edx 0x%lx\n",
printk(BIOS_DEBUG, "biosint: INT# 0x%lx\n", intnumber);
printk(BIOS_DEBUG, "biosint: eax 0x%lx ebx 0x%lx ecx 0x%lx edx 0x%lx\n",
eax, ebx, ecx, edx);
printk_debug("biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n",
printk(BIOS_DEBUG, "biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n",
ebp, esp, edi, esi);
printk_debug("biosint: ip 0x%x cs 0x%x flags 0x%x\n",
printk(BIOS_DEBUG, "biosint: ip 0x%x cs 0x%x flags 0x%x\n",
(u32)ip, (u32)cs, (u32)flags);
printk_debug("biosint: gs 0x%x fs 0x%x ds 0x%x es 0x%x\n",
printk(BIOS_DEBUG, "biosint: gs 0x%x fs 0x%x ds 0x%x es 0x%x\n",
(u16)(gsfs >> 16), (u16)(gsfs & 0xffff), (u16)(dses >> 16), (u16)(dses & 0xffff));
// cases in a good compiler are just as good as your own tables.
switch (intnumber) {
case 0 ... 15:
// These are not BIOS service, but the CPU-generated exceptions
printk_info("biosint: Oops, exception 0x%x\n", (u32)intnumber);
printk(BIOS_INFO, "biosint: Oops, exception 0x%x\n", (u32)intnumber);
if (esp < 0x1000) {
printk_debug("Stack contents: ");
printk(BIOS_DEBUG, "Stack contents: ");
while (esp < 0x1000) {
printk_debug("0x%04x ", *(unsigned short *)esp);
printk(BIOS_DEBUG, "0x%04x ", *(unsigned short *)esp);
esp += 2;
}
printk_debug("\n");
printk(BIOS_DEBUG, "\n");
}
printk_debug("biosint: Bailing out ... not now\n");
printk(BIOS_DEBUG, "biosint: Bailing out ... not now\n");
// "longjmp"
//vga_exit();
break;
@@ -537,7 +536,7 @@ int biosint(unsigned long intnumber,
&ebx, &edx, &ecx, &eax, &flags);
break;
default:
printk_info("BIOSINT: Unsupported int #0x%x\n", (u32)intnumber);
printk(BIOS_INFO, "BIOSINT: Unsupported int #0x%x\n", (u32)intnumber);
break;
}
if (ret)
@@ -648,7 +647,7 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp,
// devfn is an int, so we mask it off.
busdevfn = (dev->bus->secondary << 8)
| (dev->path.pci.devfn & 0xff);
printk_debug("0x%x: return 0x%x\n", func,
printk(BIOS_DEBUG, "0x%x: return 0x%x\n", func,
busdevfn);
*pebx = busdevfn;
retval = 0;
@@ -675,8 +674,7 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp,
reg = *pedi;
dev = dev_find_slot(bus, devfn);
if (!dev) {
printk_debug
("0x%x: BAD DEVICE bus %d devfn 0x%x\n",
printk(BIOS_DEBUG, "0x%x: BAD DEVICE bus %d devfn 0x%x\n",
func, bus, devfn);
// idiots. the pcibios guys assumed you'd never pass a bad bus/devfn!
*peax = PCIBIOS_BADREG;
@@ -711,15 +709,14 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp,
if (retval)
retval = PCIBIOS_BADREG;
printk_debug
("0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n",
printk(BIOS_DEBUG, "0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n",
func, bus, devfn, reg, *pecx);
*peax = 0;
retval = 0;
}
break;
default:
printk_err("UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func);
printk(BIOS_ERR, "UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func);
break;
}
@@ -731,7 +728,7 @@ int handleint21(unsigned long *edi, unsigned long *esi, unsigned long *ebp,
unsigned long *ecx, unsigned long *eax, unsigned long *flags)
{
int res = -1;
printk_debug("handleint21, eax 0x%x\n", (u32)*eax);
printk(BIOS_DEBUG, "handleint21, eax 0x%x\n", (u32)*eax);
switch (*eax & 0xffff) {
case 0x5f19:
break;

8
src/cpu/amd/mtrr/amd_mtrr.c
View File

@@ -95,7 +95,7 @@ static void set_fixed_mtrr_resource(void *gp, struct device *dev, struct resourc
if (start_mtrr >= NUM_FIXED_RANGES) {
return;
}
printk_debug("Setting fixed MTRRs(%d-%d) Type: WB, RdMEM, WrMEM\n",
printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) Type: WB, RdMEM, WrMEM\n",
start_mtrr, last_mtrr);
set_fixed_mtrrs(start_mtrr, last_mtrr, MTRR_TYPE_WRBACK | MTRR_READ_MEM | MTRR_WRITE_MEM);
@@ -116,9 +116,9 @@ void amd_setup_mtrrs(void)
wrmsr(SYSCFG_MSR, msr);
enable_cache();
printk_debug("\n");
printk(BIOS_DEBUG, "\n");
/* Initialized the fixed_mtrrs to uncached */
printk_debug("Setting fixed MTRRs(%d-%d) type: UC\n",
printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) type: UC\n",
0, NUM_FIXED_RANGES);
set_fixed_mtrrs(0, NUM_FIXED_RANGES, MTRR_TYPE_UNCACHEABLE);
@@ -130,7 +130,7 @@ void amd_setup_mtrrs(void)
search_global_resources(
IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE,
set_fixed_mtrr_resource, &state);
printk_debug("DONE fixed MTRRs\n");
printk(BIOS_DEBUG, "DONE fixed MTRRs\n");
if (state.mmio_basek > state.tomk) {
state.mmio_basek = state.tomk;

2
src/cpu/amd/quadcore/amd_sibling.c
View File

@@ -114,7 +114,7 @@ u32 get_apicid_base(u32 ioapic_num)
if((apicid_base+ioapic_num-1)>0xf) {
// We need to enable APIC EXT ID
printk_spew("if the IO APIC device doesn't support 256 apic id, \r\n you need to set CONFIG_ENABLE_APIC_EXT_ID in MB Option.lb so you can spare 16 id for ioapic\r\n");
printk(BIOS_SPEW, "if the IO APIC device doesn't support 256 apic id, \r\n you need to set CONFIG_ENABLE_APIC_EXT_ID in MB Option.lb so you can spare 16 id for ioapic\r\n");
enable_apic_ext_id(sysconf.nodes);
}

6
src/cpu/amd/quadcore/quadcore.c
View File

@@ -59,7 +59,7 @@ static void real_start_other_core(u32 nodeid, u32 cores)
{
u32 dword, i;
printk_debug("Start other core - nodeid: %02x cores: %02x\n", nodeid, cores);
printk(BIOS_DEBUG, "Start other core - nodeid: %02x cores: %02x\n", nodeid, cores);
/* set PCI_DEV(0, 0x18+nodeid, 3), 0x44 bit 27 to redirect all MC4
accesses and error logging to core0 */
@@ -88,7 +88,7 @@ static void start_other_cores(void)
// disable quad_core
if (read_option(CMOS_VSTART_quad_core, CMOS_VLEN_quad_core, 0) != 0) {
printk_debug("Skip additional core init\n");
printk(BIOS_DEBUG, "Skip additional core init\n");
return;
}
@@ -96,7 +96,7 @@ static void start_other_cores(void)
for (nodeid = 0; nodeid < nodes; nodeid++) {
u32 cores = get_core_num_in_bsp(nodeid);
printk_debug("init node: %02x cores: %02x \n", nodeid, cores);
printk(BIOS_DEBUG, "init node: %02x cores: %02x \n", nodeid, cores);
if (cores > 0) {
real_start_other_core(nodeid, cores);
}

40
src/cpu/amd/sc520/sc520.c
View File

@@ -36,9 +36,9 @@ static void cpu_init(device_t dev)
unsigned long *l = (unsigned long *) 0xfffef088;
int i;
for(i = 0; i < 16; i++, l++)
printk_err("Par%d: 0x%lx\n", i, *l);
printk(BIOS_ERR, "Par%d: 0x%lx\n", i, *l);
printk_spew("SC520 random fixup ...\n");
printk(BIOS_SPEW, "SC520 random fixup ...\n");
}
@@ -49,14 +49,14 @@ static void cpu_init(device_t dev)
void sc520_enable_resources(struct device *dev) {
unsigned char command;
printk_spew("%s\n", __func__);
printk(BIOS_SPEW, "%s\n", __func__);
command = pci_read_config8(dev, PCI_COMMAND);
printk_spew("========>%s, command 0x%x\n", __func__, command);
printk(BIOS_SPEW, "========>%s, command 0x%x\n", __func__, command);
command |= PCI_COMMAND_MEMORY | PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
printk_spew("========>%s, command 0x%x\n", __func__, command);
printk(BIOS_SPEW, "========>%s, command 0x%x\n", __func__, command);
pci_write_config8(dev, PCI_COMMAND, command);
command = pci_read_config8(dev, PCI_COMMAND);
printk_spew("========>%s, command 0x%x\n", __func__, command);
printk(BIOS_SPEW, "========>%s, command 0x%x\n", __func__, command);
/*
*/
@@ -100,7 +100,7 @@ static void ram_resource(device_t dev, unsigned long index,
unsigned long basek, unsigned long sizek)
{
struct resource *resource;
printk_spew("%s sizek 0x%x\n", __func__, sizek);
printk(BIOS_SPEW, "%s sizek 0x%x\n", __func__, sizek);
if (!sizek) {
return;
}
@@ -126,14 +126,14 @@ static uint32_t find_pci_tolm(struct bus *bus)
{
struct resource *min;
uint32_t tolm;
printk_spew("%s\n", __func__);
printk(BIOS_SPEW, "%s\n", __func__);
min = 0;
search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, &min);
tolm = 0xffffffffUL;
if (min && tolm > min->base) {
tolm = min->base;
}
printk_spew("%s returns 0x%x\n", __func__, tolm);
printk(BIOS_SPEW, "%s returns 0x%x\n", __func__, tolm);
return tolm;
}
@@ -141,7 +141,7 @@ static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
uint32_t pci_tolm;
printk_spew("%s\n", __func__);
printk(BIOS_SPEW, "%s\n", __func__);
pci_tolm = find_pci_tolm(&dev->link[0]);
mc_dev = dev->link[0].children;
if (mc_dev) {
@@ -162,10 +162,10 @@ static void pci_domain_set_resources(device_t dev)
if (reg > rambits)
rambits = reg;
if (reg < rambits)
printk_err("ERROR! register 0x%x is not set!\n",
printk(BIOS_ERR, "ERROR! register 0x%x is not set!\n",
ramregs[i]);
}
printk_debug("I would set ram size to 0x%x Kbytes\n", (rambits)*8*1024);
printk(BIOS_DEBUG, "I would set ram size to 0x%x Kbytes\n", (rambits)*8*1024);
tomk = rambits*8*1024;
#endif
tomk = 32 * 1024;
@@ -186,20 +186,20 @@ static void pci_domain_set_resources(device_t dev)
#if 0
void sc520_enable_resources(device_t dev) {
printk_spew("%s\n", __func__);
printk_spew("THIS IS FOR THE SC520 =============================\n");
printk(BIOS_SPEW, "%s\n", __func__);
printk(BIOS_SPEW, "THIS IS FOR THE SC520 =============================\n");
/*
command = pci_read_config8(dev, PCI_COMMAND);
printk_spew("%s, command 0x%x\n", __func__, command);
printk(BIOS_SPEW, "%s, command 0x%x\n", __func__, command);
command |= PCI_COMMAND_MEMORY;
printk_spew("%s, command 0x%x\n", __func__, command);
printk(BIOS_SPEW, "%s, command 0x%x\n", __func__, command);
pci_write_config8(dev, PCI_COMMAND, command);
command = pci_read_config8(dev, PCI_COMMAND);
printk_spew("%s, command 0x%x\n", __func__, command);
printk(BIOS_SPEW, "%s, command 0x%x\n", __func__, command);
*/
enable_childrens_resources(dev);
printk_spew("%s\n", __func__);
printk(BIOS_SPEW, "%s\n", __func__);
}
#endif
@@ -220,7 +220,7 @@ static struct device_operations pci_domain_ops = {
#if 0
static void cpu_bus_init(device_t dev)
{
printk_spew("cpu_bus_init\n");
printk(BIOS_SPEW, "cpu_bus_init\n");
}
static void cpu_bus_noop(device_t dev)
@@ -238,7 +238,7 @@ static struct device_operations cpu_bus_ops = {
static void enable_dev(struct device *dev)
{
printk_spew("%s\n", __func__);
printk(BIOS_SPEW, "%s\n", __func__);
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
dev->ops = &pci_domain_ops;

6
src/cpu/emulation/qemu-x86/northbridge.c
View File

@@ -81,14 +81,14 @@ static void cpu_pci_domain_set_resources(device_t dev)
if (reg > rambits)
rambits = reg;
if (reg < rambits)
printk_err("ERROR! register 0x%x is not set!\n",
printk(BIOS_ERR, "ERROR! register 0x%x is not set!\n",
ramregs[i]);
}
if (rambits == 0) {
printk_err("RAM size config registers are empty; defaulting to 64 MBytes\n");
printk(BIOS_ERR, "RAM size config registers are empty; defaulting to 64 MBytes\n");
rambits = 8;
}
printk_debug("I would set ram size to 0x%x Kbytes\n", (rambits)*8*1024);
printk(BIOS_DEBUG, "I would set ram size to 0x%x Kbytes\n", (rambits)*8*1024);
tomk = rambits*8*1024;
/* Compute the top of Low memory */
tolmk = pci_tolm >> 10;

6
src/cpu/intel/hyperthreading/intel_sibling.c
View File

@@ -31,7 +31,7 @@ void intel_sibling_init(device_t cpu)
}
#if 1
printk_debug("CPU: %u %d siblings\n",
printk(BIOS_DEBUG, "CPU: %u %d siblings\n",
cpu->path.apic.apic_id,
siblings);
#endif
@@ -61,14 +61,14 @@ void intel_sibling_init(device_t cpu)
}
#if 1
printk_debug("CPU: %u has sibling %u\n",
printk(BIOS_DEBUG, "CPU: %u has sibling %u\n",
cpu->path.apic.apic_id,
new->path.apic.apic_id);
#endif
/* Start the new cpu */
if (!start_cpu(new)) {
/* Record the error in cpu? */
printk_err("CPU %u would not start!\n",
printk(BIOS_ERR, "CPU %u would not start!\n",
new->path.apic.apic_id);
}
}

2
src/cpu/intel/model_1067x/model_1067x_init.c
View File

@@ -210,7 +210,7 @@ static void model_1067x_init(device_t cpu)
/* Print processor name */
fill_processor_name(processor_name);
printk_info("CPU: %s.\n", processor_name);
printk(BIOS_INFO, "CPU: %s.\n", processor_name);
#if CONFIG_USBDEBUG_DIRECT
// Is this caution really needed?

4
src/cpu/intel/model_106cx/cache_as_ram_disable.c
View File

@@ -36,12 +36,12 @@ void stage1_main(unsigned long bist)
"movl %%esp, %0\n\t"
: "=a" (v_esp)
);
printk_spew("v_esp=%08x\r\n", v_esp);
printk(BIOS_SPEW, "v_esp=%08x\r\n", v_esp);
}
cpu_reset_x:
printk_spew("cpu_reset = %08x\r\n",cpu_reset);
printk(BIOS_SPEW, "cpu_reset = %08x\r\n",cpu_reset);
if(cpu_reset == 0) {
print_spew("Clearing initial memory region: ");

2
src/cpu/intel/model_106cx/model_106cx_init.c
View File

@@ -171,7 +171,7 @@ static void model_106cx_init(device_t cpu)
/* Print processor name */
fill_processor_name(processor_name);
printk_info("CPU: %s.\n", processor_name);
printk(BIOS_INFO, "CPU: %s.\n", processor_name);
#if CONFIG_USBDEBUG_DIRECT
// Is this caution really needed?

8
src/cpu/intel/model_6ex/cache_as_ram_disable.c
View File

@@ -37,13 +37,13 @@ void stage1_main(unsigned long bist)
"movl %%esp, %0\n"
: "=a" (v_esp)
);
printk_spew("v_esp=%08x\n", v_esp);
printk(BIOS_SPEW, "v_esp=%08x\n", v_esp);
#endif
cpu_reset_x:
printk_spew("cpu_reset = %08x\n", cpu_reset);
printk_spew("No cache as ram now - ");
printk(BIOS_SPEW, "cpu_reset = %08x\n", cpu_reset);
printk(BIOS_SPEW, "No cache as ram now - ");
/* store cpu_reset to ebx */
__asm__ volatile (
@@ -83,5 +83,5 @@ cpu_reset_x:
}
/* We will not return */
printk_debug("sorry. parachute did not open.\n");
printk(BIOS_DEBUG, "sorry. parachute did not open.\n");
}

2
src/cpu/intel/model_6ex/model_6ex_init.c
View File

@@ -200,7 +200,7 @@ static void model_6ex_init(device_t cpu)
/* Print processor name */
fill_processor_name(processor_name);
printk_info("CPU: %s.\n", processor_name);
printk(BIOS_INFO, "CPU: %s.\n", processor_name);
#if CONFIG_USBDEBUG_DIRECT
// Is this caution really needed?

8
src/cpu/intel/model_6fx/cache_as_ram_disable.c
View File

@@ -38,13 +38,13 @@ void stage1_main(unsigned long bist)
"movl %%esp, %0\n"
: "=a" (v_esp)
);
printk_spew("v_esp=%08x\n", v_esp);
printk(BIOS_SPEW, "v_esp=%08x\n", v_esp);
#endif
cpu_reset_x:
printk_spew("cpu_reset = %08x\n", cpu_reset);
printk_spew("No cache as ram now - ");
printk(BIOS_SPEW, "cpu_reset = %08x\n", cpu_reset);
printk(BIOS_SPEW, "No cache as ram now - ");
/* store cpu_reset to ebx */
__asm__ volatile (
@@ -84,5 +84,5 @@ cpu_reset_x:
}
/* We will not return */
printk_debug("sorry. parachute did not open.\n");
printk(BIOS_DEBUG, "sorry. parachute did not open.\n");
}

2
src/cpu/intel/model_6fx/model_6fx_init.c
View File

@@ -227,7 +227,7 @@ static void model_6fx_init(device_t cpu)
/* Print processor name */
fill_processor_name(processor_name);
printk_info("CPU: %s.\n", processor_name);
printk(BIOS_INFO, "CPU: %s.\n", processor_name);
#if CONFIG_USBDEBUG_DIRECT
// Is this caution really needed?

8
src/cpu/intel/speedstep/acpi.c
View File

@@ -56,7 +56,7 @@ static int get_fsb(void)
case 3: return 166;
case 5: return 100;
}
printk_debug("Warning: No supported FSB frequency. Assuming 200MHz\n");
printk(BIOS_DEBUG, "Warning: No supported FSB frequency. Assuming 200MHz\n");
return 200;
}
@@ -68,7 +68,7 @@ void generate_cpu_entries(void)
int totalcores = determine_total_number_of_cores();
int cores_per_package = (cpuid_ebx(1)>>16) & 0xff;
int numcpus = totalcores/cores_per_package; // this assumes that all CPUs share the same layout
printk_debug("Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package);
printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package);
for (cpuID=1; cpuID <=numcpus; cpuID++) {
for (coreID=1; coreID<=cores_per_package; coreID++) {
@@ -93,7 +93,7 @@ void generate_cpu_entries(void)
int vid_max=msr.lo & 0x3f;
int clock_max=get_fsb()*busratio_max;
int clock_min=get_fsb()*busratio_min;
printk_debug("clocks between %d and %d MHz.\n", clock_min, clock_max);
printk(BIOS_DEBUG, "clocks between %d and %d MHz.\n", clock_min, clock_max);
#define MEROM_MIN_POWER 16000
#define MEROM_MAX_POWER 35000
int power_max=MEROM_MAX_POWER;
@@ -104,7 +104,7 @@ void generate_cpu_entries(void)
busratio_step <<= 1;
num_states >>= 1;
}
printk_debug("adding %x P-States between busratio %x and %x, incl. P0\n", num_states+1, busratio_min, busratio_max);
printk(BIOS_DEBUG, "adding %x P-States between busratio %x and %x, incl. P0\n", num_states+1, busratio_min, busratio_max);
int vid_step=(vid_max-vid_min)/num_states;
int power_step=(power_max-power_min)/num_states;
int clock_step=(clock_max-clock_min)/num_states;

36
src/cpu/via/model_c7/model_c7_init.c
View File

@@ -68,7 +68,7 @@ static int c7d_speed_translation[] = {
static void set_c7_speed(int model) {
int cnt, current, new, i;
msr_t msr;
printk_debug("Enabling improved C7 clock and voltage.\n");
printk(BIOS_DEBUG, "Enabling improved C7 clock and voltage.\n");
// Enable Speedstep
msr = rdmsr(MSR_IA32_MISC_ENABLE);
@@ -77,16 +77,16 @@ static void set_c7_speed(int model) {
msr = rdmsr(MSR_IA32_PERF_STATUS);
printk_info("Voltage: %dmV (min %dmV; max %dmV)\n",
printk(BIOS_INFO, "Voltage: %dmV (min %dmV; max %dmV)\n",
((int)(msr.lo & 0xff) * 16 + 700),
((int)((msr.hi >> 16) & 0xff) * 16 + 700),
((int)(msr.hi & 0xff) * 16 + 700));
printk_info("CPU multiplier: %dx (min %dx; max %dx)\n",
printk(BIOS_INFO, "CPU multiplier: %dx (min %dx; max %dx)\n",
(int)((msr.lo >> 8) & 0xff),
(int)((msr.hi >> 24) & 0xff), (int)((msr.hi >> 8) & 0xff));
printk_debug(" msr.lo = %x\n", msr.lo);
printk(BIOS_DEBUG, " msr.lo = %x\n", msr.lo);
/* Wait while CPU is busy */
cnt = 0;
@@ -95,7 +95,7 @@ static void set_c7_speed(int model) {
msr = rdmsr(MSR_IA32_PERF_STATUS);
cnt++;
if (cnt > 128) {
printk_warning("Could not update multiplier and voltage.\n");
printk(BIOS_WARNING, "Could not update multiplier and voltage.\n");
return;
}
}
@@ -129,7 +129,7 @@ static void set_c7_speed(int model) {
msr.lo = new;
msr.hi = 0;
printk_debug(" new msr.lo = %x\n", msr.lo);
printk(BIOS_DEBUG, " new msr.lo = %x\n", msr.lo);
wrmsr(MSR_IA32_PERF_CTL, msr);
@@ -140,13 +140,13 @@ static void set_c7_speed(int model) {
msr = rdmsr(MSR_IA32_PERF_STATUS);
cnt++;
if (cnt > 128) {
printk_warning("Error while updating multiplier and voltage\n");
printk(BIOS_WARNING, "Error while updating multiplier and voltage\n");
break;
}
} while (msr.lo & ((1 << 16) | (1 << 17)));
printk_info("Current voltage: %dmV\n", ((int)(msr.lo & 0xff) * 16 + 700));
printk_info("Current CPU multiplier: %dx\n", (int)((msr.lo >> 8) & 0xff));
printk(BIOS_INFO, "Current voltage: %dmV\n", ((int)(msr.lo & 0xff) * 16 + 700));
printk(BIOS_INFO, "Current CPU multiplier: %dx\n", (int)((msr.lo >> 8) & 0xff));
}
static void model_c7_init(device_t dev)
@@ -157,39 +157,39 @@ static void model_c7_init(device_t dev)
get_fms(&c, dev->device);
printk_info("Detected VIA ");
printk(BIOS_INFO, "Detected VIA ");
switch (c.x86_model) {
case 10:
msr = rdmsr(0x1153);
brand = (((msr.lo >> 2) ^ msr.lo) >> 18) & 3;
printk_info("Model A ");
printk(BIOS_INFO, "Model A ");
break;
case 13:
msr = rdmsr(0x1154);
brand = (((msr.lo >> 4) ^ (msr.lo >> 2))) & 0x000000ff;
printk_info("Model D ");
printk(BIOS_INFO, "Model D ");
break;
default:
printk_info("Model Unknown ");
printk(BIOS_INFO, "Model Unknown ");
brand = 0xff;
}
switch (brand) {
case 0:
printk_info("C7-M\n");
printk(BIOS_INFO, "C7-M\n");
break;
case 1:
printk_info("C7\n");
printk(BIOS_INFO, "C7\n");
break;
case 2:
printk_info("Eden\n");
printk(BIOS_INFO, "Eden\n");
break;
case 3:
printk_info("C7-D\n");
printk(BIOS_INFO, "C7-D\n");
break;
default:
printk_info("%02x (please report)\n", brand);
printk(BIOS_INFO, "%02x (please report)\n", brand);
}
/* Gear up */

2
src/cpu/x86/cache/cache.c vendored
View File

@@ -4,7 +4,7 @@
void x86_enable_cache(void)
{
post_code(0x60);
printk_info("Enabling cache\n");
printk(BIOS_INFO, "Enabling cache\n");
enable_cache();
}

8
src/cpu/x86/lapic/lapic.c
View File

@@ -17,7 +17,7 @@ void setup_lapic(void)
/* Only Pentium Pro and later have those MSR stuff */
msr_t msr;
printk_info("Setting up local apic...");
printk(BIOS_INFO, "Setting up local apic...");
/* Enable the local apic */
msr = rdmsr(LAPIC_BASE_MSR);
@@ -55,18 +55,18 @@ void setup_lapic(void)
LAPIC_DELIVERY_MODE_NMI)
);
printk_debug(" apic_id: 0x%02lx ", lapicid());
printk(BIOS_DEBUG, " apic_id: 0x%02lx ", lapicid());
#else /* !NEED_LLAPIC */
/* Only Pentium Pro and later have those MSR stuff */
msr_t msr;
printk_info("Disabling local apic...");
printk(BIOS_INFO, "Disabling local apic...");
msr = rdmsr(LAPIC_BASE_MSR);
msr.lo &= ~LAPIC_BASE_MSR_ENABLE;
wrmsr(LAPIC_BASE_MSR, msr);
#endif /* !NEED_LAPIC */
printk_info("done.\n");
printk(BIOS_INFO, "done.\n");
post_code(0x9b);
}

68
src/cpu/x86/lapic/lapic_cpu_init.c
View File

@@ -66,7 +66,7 @@ static void copy_secondary_start_to_1m_below(void)
/* copy the _secondary_start to the ram below 1M*/
memcpy((unsigned char *)start_eip, (unsigned char *)_secondary_start, code_size);
printk_debug("start_eip=0x%08lx, offset=0x%08lx, code_size=0x%08lx\n", start_eip, ((unsigned long)_secondary_start - start_eip), code_size);
printk(BIOS_DEBUG, "start_eip=0x%08lx, offset=0x%08lx, code_size=0x%08lx\n", start_eip, ((unsigned long)_secondary_start - start_eip), code_size);
#endif
}
@@ -80,7 +80,7 @@ static int lapic_start_cpu(unsigned long apicid)
* Starting actual IPI sequence...
*/
printk_spew("Asserting INIT.\n");
printk(BIOS_SPEW, "Asserting INIT.\n");
/*
* Turn INIT on target chip
@@ -94,28 +94,28 @@ static int lapic_start_cpu(unsigned long apicid)
lapic_write_around(LAPIC_ICR, LAPIC_INT_LEVELTRIG | LAPIC_INT_ASSERT
| LAPIC_DM_INIT);
printk_spew("Waiting for send to finish...\n");
printk(BIOS_SPEW, "Waiting for send to finish...\n");
timeout = 0;
do {
printk_spew("+");
printk(BIOS_SPEW, "+");
udelay(100);
send_status = lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY;
} while (send_status && (timeout++ < 1000));
if (timeout >= 1000) {
printk_err("CPU %ld: First apic write timed out. Disabling\n",
printk(BIOS_ERR, "CPU %ld: First apic write timed out. Disabling\n",
apicid);
// too bad.
printk_err("ESR is 0x%lx\n", lapic_read(LAPIC_ESR));
printk(BIOS_ERR, "ESR is 0x%lx\n", lapic_read(LAPIC_ESR));
if (lapic_read(LAPIC_ESR)) {
printk_err("Try to reset ESR\n");
printk(BIOS_ERR, "Try to reset ESR\n");
lapic_write_around(LAPIC_ESR, 0);
printk_err("ESR is 0x%lx\n", lapic_read(LAPIC_ESR));
printk(BIOS_ERR, "ESR is 0x%lx\n", lapic_read(LAPIC_ESR));
}
return 0;
}
mdelay(10);
printk_spew("Deasserting INIT.\n");
printk(BIOS_SPEW, "Deasserting INIT.\n");
/* Target chip */
lapic_write_around(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(apicid));
@@ -123,15 +123,15 @@ static int lapic_start_cpu(unsigned long apicid)
/* Send IPI */
lapic_write_around(LAPIC_ICR, LAPIC_INT_LEVELTRIG | LAPIC_DM_INIT);
printk_spew("Waiting for send to finish...\n");
printk(BIOS_SPEW, "Waiting for send to finish...\n");
timeout = 0;
do {
printk_spew("+");
printk(BIOS_SPEW, "+");
udelay(100);
send_status = lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY;
} while (send_status && (timeout++ < 1000));
if (timeout >= 1000) {
printk_err("CPU %ld: Second apic write timed out. Disabling\n",
printk(BIOS_ERR, "CPU %ld: Second apic write timed out. Disabling\n",
apicid);
// too bad.
return 0;
@@ -148,16 +148,16 @@ static int lapic_start_cpu(unsigned long apicid)
/*
* Run STARTUP IPI loop.
*/
printk_spew("#startup loops: %d.\n", num_starts);
printk(BIOS_SPEW, "#startup loops: %d.\n", num_starts);
maxlvt = 4;
for (j = 1; j <= num_starts; j++) {
printk_spew("Sending STARTUP #%d to %lu.\n", j, apicid);
printk(BIOS_SPEW, "Sending STARTUP #%d to %lu.\n", j, apicid);
lapic_read_around(LAPIC_SPIV);
lapic_write(LAPIC_ESR, 0);
lapic_read(LAPIC_ESR);
printk_spew("After apic_write.\n");
printk(BIOS_SPEW, "After apic_write.\n");
/*
* STARTUP IPI
@@ -176,12 +176,12 @@ static int lapic_start_cpu(unsigned long apicid)
*/
udelay(300);
printk_spew("Startup point 1.\n");
printk(BIOS_SPEW, "Startup point 1.\n");
printk_spew("Waiting for send to finish...\n");
printk(BIOS_SPEW, "Waiting for send to finish...\n");
timeout = 0;
do {
printk_spew("+");
printk(BIOS_SPEW, "+");
udelay(100);
send_status = lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY;
} while (send_status && (timeout++ < 1000));
@@ -201,11 +201,11 @@ static int lapic_start_cpu(unsigned long apicid)
if (send_status || accept_status)
break;
}
printk_spew("After Startup.\n");
printk(BIOS_SPEW, "After Startup.\n");
if (send_status)
printk_warning("APIC never delivered???\n");
printk(BIOS_WARNING, "APIC never delivered???\n");
if (accept_status)
printk_warning("APIC delivery error (%lx).\n", accept_status);
printk(BIOS_WARNING, "APIC delivery error (%lx).\n", accept_status);
if (send_status || accept_status)
return 0;
return 1;
@@ -294,7 +294,7 @@ void stop_this_cpu(void)
id = lapic_read(LAPIC_ID) >> 24;
printk_debug("CPU %ld going down...\n", id);
printk(BIOS_DEBUG, "CPU %ld going down...\n", id);
/* send an LAPIC INIT to myself */
lapic_write_around(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(id));
@@ -302,37 +302,37 @@ void stop_this_cpu(void)
/* wait for the ipi send to finish */
#if 0
// When these two printk_spew calls are not removed, the
// When these two printk(BIOS_SPEW, ...) calls are not removed, the
// machine will hang when log level is SPEW. Why?
printk_spew("Waiting for send to finish...\n");
printk(BIOS_SPEW, "Waiting for send to finish...\n");
#endif
timeout = 0;
do {
#if 0
printk_spew("+");
printk(BIOS_SPEW, "+");
#endif
udelay(100);
send_status = lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY;
} while (send_status && (timeout++ < 1000));
if (timeout >= 1000) {
printk_err("timed out\n");
printk(BIOS_ERR, "timed out\n");
}
mdelay(10);
printk_spew("Deasserting INIT.\n");
printk(BIOS_SPEW, "Deasserting INIT.\n");
/* Deassert the LAPIC INIT */
lapic_write_around(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(id));
lapic_write_around(LAPIC_ICR, LAPIC_INT_LEVELTRIG | LAPIC_DM_INIT);
printk_spew("Waiting for send to finish...\n");
printk(BIOS_SPEW, "Waiting for send to finish...\n");
timeout = 0;
do {
printk_spew("+");
printk(BIOS_SPEW, "+");
udelay(100);
send_status = lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY;
} while (send_status && (timeout++ < 1000));
if (timeout >= 1000) {
printk_err("timed out\n");
printk(BIOS_ERR, "timed out\n");
}
while(1) {
@@ -387,7 +387,7 @@ static void start_other_cpus(struct bus *cpu_bus, device_t bsp_cpu)
if (!start_cpu(cpu)) {
/* Record the error in cpu? */
printk_err("CPU 0x%02x would not start!\n",
printk(BIOS_ERR, "CPU 0x%02x would not start!\n",
cpu->path.apic.apic_id);
}
#if CONFIG_SERIAL_CPU_INIT == 1
@@ -408,7 +408,7 @@ static void wait_other_cpus_stop(struct bus *cpu_bus)
active_count = atomic_read(&active_cpus);
while(active_count > 1) {
if (active_count != old_active_count) {
printk_info("Waiting for %d CPUS to stop\n", active_count - 1);
printk(BIOS_INFO, "Waiting for %d CPUS to stop\n", active_count - 1);
old_active_count = active_count;
}
udelay(10);
@@ -419,11 +419,11 @@ static void wait_other_cpus_stop(struct bus *cpu_bus)
continue;
}
if (!cpu->initialized) {
printk_err("CPU 0x%02x did not initialize!\n",
printk(BIOS_ERR, "CPU 0x%02x did not initialize!\n",
cpu->path.apic.apic_id);
}
}
printk_debug("All AP CPUs stopped\n");
printk(BIOS_DEBUG, "All AP CPUs stopped\n");
}
#else /* CONFIG_SMP */

48
src/cpu/x86/mtrr/mtrr.c
View File

@@ -98,7 +98,7 @@ static void set_var_mtrr(
base.hi = basek >> 22;
base.lo = basek << 10;
printk_spew("ADDRESS_MASK_HIGH=%#x\n", address_mask_high);
printk(BIOS_SPEW, "ADDRESS_MASK_HIGH=%#x\n", address_mask_high);
if (sizek < 4*1024*1024) {
mask.hi = address_mask_high;
@@ -236,12 +236,12 @@ static unsigned int range_to_mtrr(unsigned int reg,
/* If there's no MTRR hole, this function will bail out
* here when called for the hole.
*/
printk_spew("Zero-sized MTRR range @%ldKB\n", range_startk);
printk(BIOS_SPEW, "Zero-sized MTRR range @%ldKB\n", range_startk);
return reg;
}
if (reg >= BIOS_MTRRS) {
printk_err("Warning: Out of MTRRs for base: %4ldMB, range: %ldMB, type %s\n",
printk(BIOS_ERR, "Warning: Out of MTRRs for base: %4ldMB, range: %ldMB, type %s\n",
range_startk >>10, range_sizek >> 10,
(type==MTRR_TYPE_UNCACHEABLE)?"UC":
((type==MTRR_TYPE_WRBACK)?"WB":"Other") );
@@ -258,7 +258,7 @@ static unsigned int range_to_mtrr(unsigned int reg,
align = max_align;
}
sizek = 1 << align;
printk_debug("Setting variable MTRR %d, base: %4ldMB, range: %4ldMB, type %s\n",
printk(BIOS_DEBUG, "Setting variable MTRR %d, base: %4ldMB, range: %4ldMB, type %s\n",
reg, range_startk >>10, sizek >> 10,
(type==MTRR_TYPE_UNCACHEABLE)?"UC":
((type==MTRR_TYPE_WRBACK)?"WB":"Other")
@@ -267,7 +267,7 @@ static unsigned int range_to_mtrr(unsigned int reg,
range_startk += sizek;
range_sizek -= sizek;
if (reg >= BIOS_MTRRS) {
printk_err("Running out of variable MTRRs!\n");
printk(BIOS_ERR, "Running out of variable MTRRs!\n");
break;
}
}
@@ -295,7 +295,7 @@ static void set_fixed_mtrr_resource(void *gp, struct device *dev, struct resourc
if (start_mtrr >= NUM_FIXED_RANGES) {
return;
}
printk_debug("Setting fixed MTRRs(%d-%d) Type: WB\n",
printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) Type: WB\n",
start_mtrr, last_mtrr);
set_fixed_mtrrs(start_mtrr, last_mtrr, MTRR_TYPE_WRBACK);
@@ -357,7 +357,7 @@ void set_var_mtrr_resource(void *gp, struct device *dev, struct resource *res)
#endif
}
/* Allocate an msr */
printk_spew(" Allocate an msr - basek = %08lx, sizek = %08lx,\n", basek, sizek);
printk(BIOS_SPEW, " Allocate an msr - basek = %08lx, sizek = %08lx,\n", basek, sizek);
state->range_startk = basek;
state->range_sizek = sizek;
}
@@ -369,9 +369,9 @@ void x86_setup_fixed_mtrrs(void)
* and clear out the mtrrs.
*/
printk_debug("\n");
printk(BIOS_DEBUG, "\n");
/* Initialized the fixed_mtrrs to uncached */
printk_debug("Setting fixed MTRRs(%d-%d) Type: UC\n",
printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) Type: UC\n",
0, NUM_FIXED_RANGES);
set_fixed_mtrrs(0, NUM_FIXED_RANGES, MTRR_TYPE_UNCACHEABLE);
@@ -380,10 +380,10 @@ void x86_setup_fixed_mtrrs(void)
search_global_resources(
IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE,
set_fixed_mtrr_resource, NULL);
printk_debug("DONE fixed MTRRs\n");
printk(BIOS_DEBUG, "DONE fixed MTRRs\n");
/* enable fixed MTRR */
printk_spew("call enable_fixed_mtrr()\n");
printk(BIOS_SPEW, "call enable_fixed_mtrr()\n");
enable_fixed_mtrr();
}
@@ -421,7 +421,7 @@ void x86_setup_var_mtrrs(unsigned address_bits)
#if (CONFIG_GFXUMA == 1) /* UMA or SP. */
// For now we assume the UMA space is at the end of memory
if (var_state.hole_startk || var_state.hole_sizek) {
printk_debug("Warning: Can't set up MTRR hole for UMA due to pre-existing MTRR hole.\n");
printk(BIOS_DEBUG, "Warning: Can't set up MTRR hole for UMA due to pre-existing MTRR hole.\n");
} else {
// Increase the base range and set up UMA as an UC hole instead
var_state.range_sizek += (uma_memory_size >> 10);
@@ -437,15 +437,15 @@ void x86_setup_var_mtrrs(unsigned address_bits)
var_state.reg = range_to_mtrr(var_state.reg, var_state.hole_startk,
var_state.hole_sizek, 0, MTRR_TYPE_UNCACHEABLE, var_state.address_bits);
#endif
printk_debug("DONE variable MTRRs\n");
printk_debug("Clear out the extra MTRR's\n");
printk(BIOS_DEBUG, "DONE variable MTRRs\n");
printk(BIOS_DEBUG, "Clear out the extra MTRR's\n");
/* Clear out the extra MTRR's */
while(var_state.reg < MTRRS) {
set_var_mtrr(var_state.reg++, 0, 0, 0, var_state.address_bits);
}
printk_spew("call enable_var_mtrr()\n");
printk(BIOS_SPEW, "call enable_var_mtrr()\n");
enable_var_mtrr();
printk_spew("Leave %s\n", __func__);
printk(BIOS_SPEW, "Leave %s\n", __func__);
post_code(0x6A);
}
@@ -460,24 +460,24 @@ int x86_mtrr_check(void)
{
/* Only Pentium Pro and later have MTRR */
msr_t msr;
printk_debug("\nMTRR check\n");
printk(BIOS_DEBUG, "\nMTRR check\n");
msr = rdmsr(0x2ff);
msr.lo >>= 10;
printk_debug("Fixed MTRRs : ");
printk(BIOS_DEBUG, "Fixed MTRRs : ");
if (msr.lo & 0x01)
printk_debug("Enabled\n");
printk(BIOS_DEBUG, "Enabled\n");
else
printk_debug("Disabled\n");
printk(BIOS_DEBUG, "Disabled\n");
printk_debug("Variable MTRRs: ");
printk(BIOS_DEBUG, "Variable MTRRs: ");
if (msr.lo & 0x02)
printk_debug("Enabled\n");
printk(BIOS_DEBUG, "Enabled\n");
else
printk_debug("Disabled\n");
printk(BIOS_DEBUG, "Disabled\n");
printk_debug("\n");
printk(BIOS_DEBUG, "\n");
post_code(0x93);
return ((int) msr.lo);

2
src/cpu/x86/pae/pgtbl.c
View File

@@ -66,7 +66,7 @@ void *map_2M_page(unsigned long page)
#warning "We may need to increase CONFIG_RAMTOP, it need to be more than (0x100000+20480*CONFIG_MAX_CPUS)\n"
#endif
if(x_end > (CONFIG_RAMTOP)) {
printk_debug("map_2M_page: Please increase the CONFIG_RAMTOP more than %dK\n", x_end);
printk(BIOS_DEBUG, "map_2M_page: Please increase the CONFIG_RAMTOP more than %dK\n", x_end);
die("Can not go on");
}
#else

10
src/cpu/x86/smm/smihandler.c
View File

@@ -68,7 +68,7 @@ void io_trap_handler(int smif)
/* If a handler function handled a given IO trap, it
* shall return a non-zero value
*/
printk_debug("SMI function trap 0x%x: ", smif);
printk(BIOS_DEBUG, "SMI function trap 0x%x: ", smif);
if (southbridge_io_trap_handler(smif))
return;
@@ -76,7 +76,7 @@ void io_trap_handler(int smif)
if (mainboard_io_trap_handler(smif))
return;
printk_debug("Unknown function\n");
printk(BIOS_DEBUG, "Unknown function\n");
}
/**
@@ -111,7 +111,7 @@ void smi_handler(u32 smm_revision)
console_init();
printk_spew("\nSMI# #%d\n", node);
printk(BIOS_SPEW, "\nSMI# #%d\n", node);
switch (smm_revision) {
case 0x00030002:
@@ -131,8 +131,8 @@ void smi_handler(u32 smm_revision)
(0xa8000 + 0x7e00 - (node * 0x400));
break;
default:
printk_debug("smm_revision: 0x%08x\n", smm_revision);
printk_debug("SMI# not supported on your CPU\n");
printk(BIOS_DEBUG, "smm_revision: 0x%08x\n", smm_revision);
printk(BIOS_DEBUG, "SMI# not supported on your CPU\n");
/* Don't release lock, so no further SMI will happen,
* if we don't handle it anyways.
*/

12
src/cpu/x86/tsc/delay_tsc.c
View File

@@ -78,7 +78,7 @@ static unsigned long long calibrate_tsc(void)
* 32 bits..
*/
bad_ctc:
printk_err("bad_ctc\n");
printk(BIOS_ERR, "bad_ctc\n");
return 0;
}
@@ -104,7 +104,7 @@ static unsigned long long calibrate_tsc(void)
unsigned long long start, end, delta;
unsigned long result, count;
printk_spew("Calibrating delay loop...\n");
printk(BIOS_SPEW, "Calibrating delay loop...\n");
start = rdtscll();
// no udivdi3 because we don't like libgcc. (only in x86emu)
// so we count to 1<< 20 and then right shift 20
@@ -128,10 +128,10 @@ static unsigned long long calibrate_tsc(void)
delta >>= 20;
// save this for microsecond timing.
result = delta;
printk_spew("end %llx, start %llx\n", end, start);
printk_spew("32-bit delta %ld\n", (unsigned long) delta);
printk(BIOS_SPEW, "end %llx, start %llx\n", end, start);
printk(BIOS_SPEW, "32-bit delta %ld\n", (unsigned long) delta);
printk_spew("%s 32-bit result is %ld\n",
printk(BIOS_SPEW, "%s 32-bit result is %ld\n",
__func__,
result);
return delta;
@@ -144,7 +144,7 @@ void init_timer(void)
{
if (!clocks_per_usec) {
clocks_per_usec = calibrate_tsc();
printk_info("clocks_per_usec: %lu\n", clocks_per_usec);
printk(BIOS_INFO, "clocks_per_usec: %lu\n", clocks_per_usec);
}
}

6
src/devices/cardbus_device.c
View File

@@ -166,7 +166,7 @@ void cardbus_enable_resources(device_t dev)
PCI_BRIDGE_CTL_MASTER_ABORT |
PCI_BRIDGE_CTL_BUS_RESET));
ctrl |= (PCI_CB_BRIDGE_CTL_PARITY + PCI_CB_BRIDGE_CTL_SERR); /* error check */
printk_debug("%s bridge ctrl <- %04x\n", dev_path(dev), ctrl);
printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl);
pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl);
pci_dev_enable_resources(dev);
@@ -188,7 +188,7 @@ unsigned int cardbus_scan_bridge(device_t dev, unsigned int max)
uint32_t buses;
uint16_t cr;
printk_spew("%s for %s\n", __func__, dev_path(dev));
printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(dev));
bus = &dev->link[0];
bus->dev = dev;
@@ -236,7 +236,7 @@ unsigned int cardbus_scan_bridge(device_t dev, unsigned int max)
pci_write_config32(dev, PCI_CB_PRIMARY_BUS, buses);
pci_write_config16(dev, PCI_COMMAND, cr);
printk_spew("%s returns max %d\n", __func__, max);
printk(BIOS_SPEW, "%s returns max %d\n", __func__, max);
return max;
}

86
src/devices/device.c
View File

@@ -129,7 +129,7 @@ static void read_resources(struct bus *bus)
{
struct device *curdev;
printk_spew("%s %s bus %x link: %d\n", dev_path(bus->dev), __func__,
printk(BIOS_SPEW, "%s %s bus %x link: %d\n", dev_path(bus->dev), __func__,
bus->secondary, bus->link);
/* Walk through all devices and find which resources they need. */
@@ -139,7 +139,7 @@ static void read_resources(struct bus *bus)
continue;
}
if (!curdev->ops || !curdev->ops->read_resources) {
printk_err("%s missing read_resources\n",
printk(BIOS_ERR, "%s missing read_resources\n",
dev_path(curdev));
continue;
}
@@ -149,7 +149,7 @@ static void read_resources(struct bus *bus)
for (i = 0; i < curdev->links; i++)
read_resources(&curdev->link[i]);
}
printk_spew("%s read_resources bus %d link: %d done\n",
printk(BIOS_SPEW, "%s read_resources bus %d link: %d done\n",
dev_path(bus->dev), bus->secondary, bus->link);
}
@@ -245,7 +245,7 @@ static void compute_resources(struct bus *bus, struct resource *bridge,
resource_t base;
base = round(bridge->base, bridge->align);
printk_spew( "%s %s_%s: base: %llx size: %llx align: %d gran: %d limit: %llx\n",
printk(BIOS_SPEW, "%s %s_%s: base: %llx size: %llx align: %d gran: %d limit: %llx\n",
dev_path(bus->dev), __func__,
(type & IORESOURCE_IO) ? "io" : (type & IORESOURCE_PREFETCH) ?
"prefmem" : "mem",
@@ -309,8 +309,8 @@ static void compute_resources(struct bus *bus, struct resource *bridge,
/* Warn if it looks like APICs aren't declared. */
if ((resource->limit == 0xffffffff) &&
(resource->flags & IORESOURCE_ASSIGNED)) {
printk_err("Resource limit looks wrong! (no APIC?)\n");
printk_err("%s %02lx limit %08Lx\n", dev_path(dev),
printk(BIOS_ERR, "Resource limit looks wrong! (no APIC?)\n");
printk(BIOS_ERR, "%s %02lx limit %08Lx\n", dev_path(dev),
resource->index, resource->limit);
}
@@ -336,7 +336,7 @@ static void compute_resources(struct bus *bus, struct resource *bridge,
resource->base = base;
base += resource->size;
printk_spew("%s %02lx * [0x%llx - 0x%llx] %s\n",
printk(BIOS_SPEW, "%s %02lx * [0x%llx - 0x%llx] %s\n",
dev_path(dev), resource->index,
resource->base,
resource->base + resource->size - 1,
@@ -353,7 +353,7 @@ static void compute_resources(struct bus *bus, struct resource *bridge,
bridge->size = round(base, bridge->gran) -
round(bridge->base, bridge->align);
printk_spew("%s %s_%s: base: %llx size: %llx align: %d gran: %d limit: %llx done\n",
printk(BIOS_SPEW, "%s %s_%s: base: %llx size: %llx align: %d gran: %d limit: %llx done\n",
dev_path(bus->dev), __func__,
(bridge->flags & IORESOURCE_IO) ? "io" :
(bridge->flags & IORESOURCE_PREFETCH) ? "prefmem" : "mem",
@@ -402,7 +402,7 @@ static void allocate_resources(struct bus *bus, struct resource *bridge,
resource_t base;
base = bridge->base;
printk_spew("%s %s_%s: base:%llx size:%llx align:%d gran:%d limit:%llx\n",
printk(BIOS_SPEW, "%s %s_%s: base:%llx size:%llx align:%d gran:%d limit:%llx\n",
dev_path(bus->dev), __func__,
(type & IORESOURCE_IO) ? "io" : (type & IORESOURCE_PREFETCH) ?
"prefmem" : "mem",
@@ -456,14 +456,14 @@ static void allocate_resources(struct bus *bus, struct resource *bridge,
resource->flags &= ~IORESOURCE_STORED;
base += resource->size;
} else {
printk_err("!! Resource didn't fit !!\n");
printk_err(" aligned base %llx size %llx limit %llx\n",
printk(BIOS_ERR, "!! Resource didn't fit !!\n");
printk(BIOS_ERR, " aligned base %llx size %llx limit %llx\n",
round(base, resource->align), resource->size,
resource->limit);
printk_err(" %llx needs to be <= %llx (limit)\n",
printk(BIOS_ERR, " %llx needs to be <= %llx (limit)\n",
(round(base, resource->align) +
resource->size) - 1, resource->limit);
printk_err(" %s%s %02lx * [0x%llx - 0x%llx] %s\n",
printk(BIOS_ERR, " %s%s %02lx * [0x%llx - 0x%llx] %s\n",
(resource->
flags & IORESOURCE_ASSIGNED) ? "Assigned: " :
"", dev_path(dev), resource->index,
@@ -476,7 +476,7 @@ static void allocate_resources(struct bus *bus, struct resource *bridge,
? "prefmem" : "mem");
}
printk_spew("%s%s %02lx * [0x%llx - 0x%llx] %s\n",
printk(BIOS_SPEW, "%s%s %02lx * [0x%llx - 0x%llx] %s\n",
(resource->flags & IORESOURCE_ASSIGNED) ? "Assigned: "
: "",
dev_path(dev), resource->index, resource->base,
@@ -494,7 +494,7 @@ static void allocate_resources(struct bus *bus, struct resource *bridge,
bridge->flags |= IORESOURCE_ASSIGNED;
printk_spew("%s %s_%s: next_base: %llx size: %llx align: %d gran: %d done\n",
printk(BIOS_SPEW, "%s %s_%s: next_base: %llx size: %llx align: %d gran: %d done\n",
dev_path(bus->dev), __func__,
(type & IORESOURCE_IO) ? "io" : (type & IORESOURCE_PREFETCH) ?
"prefmem" : "mem",
@@ -553,7 +553,7 @@ static void constrain_resources(struct device *dev, struct constraints* limits)
struct resource *lim;
int i;
printk_spew("%s: %s\n", __func__, dev_path(dev));
printk(BIOS_SPEW, "%s: %s\n", __func__, dev_path(dev));
/* Constrain limits based on the fixed resources of this device. */
for (i = 0; i < dev->resources; i++) {
@@ -562,7 +562,7 @@ static void constrain_resources(struct device *dev, struct constraints* limits)
continue;
if (!res->size) {
/* It makes no sense to have 0-sized, fixed resources.*/
printk_err("skipping %s@%lx fixed resource, size=0!\n",
printk(BIOS_ERR, "skipping %s@%lx fixed resource, size=0!\n",
dev_path(dev), res->index);
continue;
}
@@ -606,7 +606,7 @@ static void avoid_fixed_resources(struct device *dev)
struct resource *res;
int i;
printk_spew("%s: %s\n", __func__, dev_path(dev));
printk(BIOS_SPEW, "%s: %s\n", __func__, dev_path(dev));
/* Initialize constraints to maximum size. */
limits.pref.base = 0;
@@ -621,7 +621,7 @@ static void avoid_fixed_resources(struct device *dev)
res = &dev->resource[i];
if ((res->flags & IORESOURCE_FIXED))
continue;
printk_spew("%s:@%s %02lx limit %08Lx\n", __func__,
printk(BIOS_SPEW, "%s:@%s %02lx limit %08Lx\n", __func__,
dev_path(dev), res->index, res->limit);
if ((res->flags & MEM_MASK) == PREF_TYPE &&
(res->limit < limits.pref.limit))
@@ -655,9 +655,9 @@ static void avoid_fixed_resources(struct device *dev)
else
continue;
printk_spew("%s2: %s@%02lx limit %08Lx\n", __func__,
printk(BIOS_SPEW, "%s2: %s@%02lx limit %08Lx\n", __func__,
dev_path(dev), res->index, res->limit);
printk_spew("\tlim->base %08Lx lim->limit %08Lx\n",
printk(BIOS_SPEW, "\tlim->base %08Lx lim->limit %08Lx\n",
lim->base, lim->limit);
/* Is the resource outside the limits? */
@@ -726,7 +726,7 @@ static void set_vga_bridge_bits(void)
if (vga) {
/* VGA is first add on card or the only onboard VGA. */
printk_debug("Setting up VGA for %s\n", dev_path(vga));
printk(BIOS_DEBUG, "Setting up VGA for %s\n", dev_path(vga));
/* All legacy VGA cards have MEM & I/O space registers. */
vga->command |= (PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
vga_pri = vga;
@@ -734,7 +734,7 @@ static void set_vga_bridge_bits(void)
}
/* Now walk up the bridges setting the VGA enable. */
while (bus) {
printk_debug("Setting PCI_BRIDGE_CTL_VGA for bridge %s\n",
printk(BIOS_DEBUG, "Setting PCI_BRIDGE_CTL_VGA for bridge %s\n",
dev_path(bus->dev));
bus->bridge_ctrl |= PCI_BRIDGE_CTL_VGA;
bus = (bus == bus->dev->bus) ? 0 : bus->dev->bus;
@@ -760,7 +760,7 @@ void assign_resources(struct bus *bus)
{
struct device *curdev;
printk_spew("%s assign_resources, bus %d link: %d\n",
printk(BIOS_SPEW, "%s assign_resources, bus %d link: %d\n",
dev_path(bus->dev), bus->secondary, bus->link);
for (curdev = bus->children; curdev; curdev = curdev->sibling) {
@@ -768,13 +768,13 @@ void assign_resources(struct bus *bus)
continue;
}
if (!curdev->ops || !curdev->ops->set_resources) {
printk_err("%s missing set_resources\n",
printk(BIOS_ERR, "%s missing set_resources\n",
dev_path(curdev));
continue;
}
curdev->ops->set_resources(curdev);
}
printk_spew("%s assign_resources, bus %d link: %d\n",
printk(BIOS_SPEW, "%s assign_resources, bus %d link: %d\n",
dev_path(bus->dev), bus->secondary, bus->link);
}
@@ -802,7 +802,7 @@ void enable_resources(struct device *dev)
return;
}
if (!dev->ops || !dev->ops->enable_resources) {
printk_err("%s missing enable_resources\n", dev_path(dev));
printk(BIOS_ERR, "%s missing enable_resources\n", dev_path(dev));
return;
}
dev->ops->enable_resources(dev);
@@ -891,22 +891,22 @@ unsigned int scan_bus(struct device *busdev, unsigned int max)
void dev_enumerate(void)
{
struct device *root;
printk_info("Enumerating buses...\n");
printk(BIOS_INFO, "Enumerating buses...\n");
root = &dev_root;
show_all_devs(BIOS_SPEW, "Before Device Enumeration.");
printk_spew("Compare with tree...\n");
printk(BIOS_SPEW, "Compare with tree...\n");
show_devs_tree(root, BIOS_SPEW, 0, 0);
if (root->chip_ops && root->chip_ops->enable_dev) {
root->chip_ops->enable_dev(root);
}
if (!root->ops || !root->ops->scan_bus) {
printk_err("dev_root missing scan_bus operation");
printk(BIOS_ERR, "dev_root missing scan_bus operation");
return;
}
scan_bus(root, 0);
printk_info("done\n");
printk(BIOS_INFO, "done\n");
}
/**
@@ -933,7 +933,7 @@ void dev_configure(void)
set_vga_bridge_bits();
#endif
printk_info("Allocating resources...\n");
printk(BIOS_INFO, "Allocating resources...\n");
root = &dev_root;
@@ -944,9 +944,9 @@ void dev_configure(void)
/* Read the resources for the entire tree. */
printk_info("Reading resources...\n");
printk(BIOS_INFO, "Reading resources...\n");
read_resources(&root->link[0]);
printk_info("Done reading resources.\n");
printk(BIOS_INFO, "Done reading resources.\n");
print_resource_tree(root, BIOS_SPEW, "After reading.");
@@ -997,7 +997,7 @@ void dev_configure(void)
}
/* Store the computed resource allocations into device registers ... */
printk_info("Setting resources...\n");
printk(BIOS_INFO, "Setting resources...\n");
for (child = root->link[0].children; child; child = child->sibling) {
if (!(child->path.type == DEVICE_PATH_PCI_DOMAIN))
continue;
@@ -1023,10 +1023,10 @@ void dev_configure(void)
}
}
assign_resources(&root->link[0]);
printk_info("Done setting resources.\n");
printk(BIOS_INFO, "Done setting resources.\n");
print_resource_tree(root, BIOS_SPEW, "After assigning values.");
printk_info("Done allocating resources.\n");
printk(BIOS_INFO, "Done allocating resources.\n");
}
/**
@@ -1037,12 +1037,12 @@ void dev_configure(void)
*/
void dev_enable(void)
{
printk_info("Enabling resources...\n");
printk(BIOS_INFO, "Enabling resources...\n");
/* now enable everything. */
enable_resources(&dev_root);
printk_info("done.\n");
printk(BIOS_INFO, "done.\n");
}
/**
@@ -1056,20 +1056,20 @@ void dev_initialize(void)
{
struct device *dev;
printk_info("Initializing devices...\n");
printk(BIOS_INFO, "Initializing devices...\n");
for (dev = all_devices; dev; dev = dev->next) {
if (dev->enabled && !dev->initialized &&
dev->ops && dev->ops->init) {
if (dev->path.type == DEVICE_PATH_I2C) {
printk_debug("smbus: %s[%d]->",
printk(BIOS_DEBUG, "smbus: %s[%d]->",
dev_path(dev->bus->dev),
dev->bus->link);
}
printk_debug("%s init\n", dev_path(dev));
printk(BIOS_DEBUG, "%s init\n", dev_path(dev));
dev->initialized = 1;
dev->ops->init(dev);
}
}
printk_info("Devices initialized\n");
printk(BIOS_INFO, "Devices initialized\n");
show_all_devs(BIOS_SPEW, "After init.");
}

8
src/devices/device_util.c
View File

@@ -203,7 +203,7 @@ const char *dev_path(device_t dev)
sprintf(buffer, "CPU_BUS: %02x", dev->path.cpu_bus.id);
break;
default:
printk_err("Unknown device path type: %d\n", dev->path.type);
printk(BIOS_ERR, "Unknown device path type: %d\n", dev->path.type);
break;
}
}
@@ -253,7 +253,7 @@ int path_eq(struct device_path *path1, struct device_path *path2)
equal = (path1->cpu_bus.id == path2->cpu_bus.id);
break;
default:
printk_err("Uknown device type: %d\n", path1->type);
printk(BIOS_ERR, "Uknown device type: %d\n", path1->type);
break;
}
}
@@ -355,7 +355,7 @@ struct resource *find_resource(device_t dev, unsigned index)
/* See if there is a resource with the appropriate index */
resource = probe_resource(dev, index);
if (!resource) {
printk_emerg("%s missing resource: %02x\n",
printk(BIOS_EMERG, "%s missing resource: %02x\n",
dev_path(dev), index);
die("");
}
@@ -468,7 +468,7 @@ void report_resource_stored(device_t dev, struct resource *resource, const char
sprintf(buf, "bus %02x ", dev->link[0].secondary);
#endif
}
printk_debug(
printk(BIOS_DEBUG,
"%s %02lx <- [0x%010Lx - 0x%010Lx] size 0x%08Lx gran 0x%02x %s%s%s\n",
dev_path(dev),
resource->index,

40
src/devices/hypertransport.c
View File

@@ -192,11 +192,11 @@ static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
unsigned new_freq;
pci_write_config8(cur->dev, cur->pos + cur->freq_off, freq);
reset_needed = 1;
printk_spew("HyperT FreqP old %x new %x\n",old_freq,freq);
printk(BIOS_SPEW, "HyperT FreqP old %x new %x\n",old_freq,freq);
new_freq = pci_read_config8(cur->dev, cur->pos + cur->freq_off);
new_freq &= 0x0f;
if (new_freq != freq) {
printk_err("%s Hypertransport frequency would not set wanted: %x got: %x\n",
printk(BIOS_ERR, "%s Hypertransport frequency would not set wanted: %x got: %x\n",
dev_path(dev), freq, new_freq);
}
}
@@ -206,10 +206,10 @@ static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
pci_write_config8(cur->dev, cur->pos + cur->config_off + 1,
present_width);
reset_needed = 1;
printk_spew("HyperT widthP old %x new %x\n",old_width, present_width);
printk(BIOS_SPEW, "HyperT widthP old %x new %x\n",old_width, present_width);
new_width = pci_read_config8(cur->dev, cur->pos + cur->config_off + 1);
if (new_width != present_width) {
printk_err("%s Hypertransport width would not set wanted: %x got: %x\n",
printk(BIOS_ERR, "%s Hypertransport width would not set wanted: %x got: %x\n",
dev_path(dev), present_width, new_width);
}
}
@@ -221,11 +221,11 @@ static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
unsigned new_freq;
pci_write_config8(prev->dev, prev->pos + prev->freq_off, freq);
reset_needed = 1;
printk_spew("HyperT freqU old %x new %x\n", old_freq, freq);
printk(BIOS_SPEW, "HyperT freqU old %x new %x\n", old_freq, freq);
new_freq = pci_read_config8(prev->dev, prev->pos + prev->freq_off);
new_freq &= 0x0f;
if (new_freq != freq) {
printk_err("%s Hypertransport frequency would not set wanted: %x got: %x\n",
printk(BIOS_ERR, "%s Hypertransport frequency would not set wanted: %x got: %x\n",
dev_path(prev->dev), freq, new_freq);
}
}
@@ -234,10 +234,10 @@ static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
unsigned new_width;
pci_write_config8(prev->dev, prev->pos + prev->config_off + 1, upstream_width);
reset_needed = 1;
printk_spew("HyperT widthU old %x new %x\n", old_width, upstream_width);
printk(BIOS_SPEW, "HyperT widthU old %x new %x\n", old_width, upstream_width);
new_width = pci_read_config8(prev->dev, prev->pos + prev->config_off + 1);
if (new_width != upstream_width) {
printk_err("%s Hypertransport width would not set wanted: %x got: %x\n",
printk(BIOS_ERR, "%s Hypertransport width would not set wanted: %x got: %x\n",
dev_path(prev->dev), upstream_width, new_width);
}
}
@@ -273,7 +273,7 @@ static unsigned ht_lookup_slave_capability(struct device *dev)
if (pos) {
unsigned flags;
flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
printk_spew("flags: 0x%04x\n", flags);
printk(BIOS_SPEW, "flags: 0x%04x\n", flags);
if ((flags >> 13) == 0) {
/* Entry is a Slave secondary, success... */
break;
@@ -317,7 +317,7 @@ static void ht_collapse_early_enumeration(struct bus *bus, unsigned offset_uniti
pci_write_config16(prev.dev, prev.pos + prev.ctrl_off, ctrl);
ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
if (ctrl & ((1 << 4) | (1 << 8))) {
printk_alert("Detected error on Hypertransport Link\n");
printk(BIOS_ALERT, "Detected error on Hypertransport Link\n");
return;
}
}
@@ -371,7 +371,7 @@ static void ht_collapse_early_enumeration(struct bus *bus, unsigned offset_uniti
flags = pci_read_config16(&dummy, pos + PCI_CAP_FLAGS);
flags &= ~0x1f;
pci_write_config16(&dummy, pos + PCI_CAP_FLAGS, flags);
printk_spew("Collapsing %s [%04x/%04x]\n",
printk(BIOS_SPEW, "Collapsing %s [%04x/%04x]\n",
dev_path(&dummy), dummy.vendor, dummy.device);
}
}
@@ -441,7 +441,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
pci_write_config16(prev.dev, prev.pos + prev.ctrl_off, ctrl);
ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
if (ctrl & ((1 << 4) | (1 << 8))) {
printk_alert("Detected error on Hypertransport Link\n");
printk(BIOS_ALERT, "Detected error on Hypertransport Link\n");
goto end_of_chain;
}
}
@@ -462,7 +462,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
/* Find the hypertransport link capability */
pos = ht_lookup_slave_capability(dev);
if (pos == 0) {
printk_err("%s Hypertransport link capability not found",
printk(BIOS_ERR, "%s Hypertransport link capability not found",
dev_path(dev));
break;
}
@@ -507,7 +507,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
last_func = func;
}
/* Compute the number of unitids consumed */
printk_spew("%s count: %04x static_count: %04x\n",
printk(BIOS_SPEW, "%s count: %04x static_count: %04x\n",
dev_path(dev), count, static_count);
if (count < static_count) {
count = static_count;
@@ -532,7 +532,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
/* Setup the hypetransport link */
bus->reset_needed |= ht_setup_link(&prev, dev, pos);
printk_debug("%s [%04x/%04x] %s next_unitid: %04x\n",
printk(BIOS_DEBUG, "%s [%04x/%04x] %s next_unitid: %04x\n",
dev_path(dev),
dev->vendor, dev->device,
(dev->enabled? "enabled": "disabled"), next_unitid);
@@ -541,10 +541,10 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
end_of_chain:
#if OPT_HT_LINK == 1
if(bus->reset_needed) {
printk_info("HyperT reset needed\n");
printk(BIOS_INFO, "HyperT reset needed\n");
}
else {
printk_debug("HyperT reset not needed\n");
printk(BIOS_DEBUG, "HyperT reset not needed\n");
}
#endif
@@ -563,7 +563,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
ht_unitid_base[ht_dev_num-1] = CONFIG_HT_CHAIN_END_UNITID_BASE; // update last one
printk_debug(" unitid: %04x --> %04x\n",
printk(BIOS_DEBUG, " unitid: %04x --> %04x\n",
real_last_unitid, CONFIG_HT_CHAIN_END_UNITID_BASE);
}
@@ -583,9 +583,9 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
if(old_devices) {
device_t left;
for(left = old_devices; left; left = left->sibling) {
printk_debug("%s\n", dev_path(left));
printk(BIOS_DEBUG, "%s\n", dev_path(left));
}
printk_err("HT: Left over static devices. Check your Config.lb\n");
printk(BIOS_ERR, "HT: Left over static devices. Check your Config.lb\n");
if(last_func && !last_func->sibling) // put back the left over static device, and let pci_scan_bus disable it
last_func->sibling = old_devices;
}

62
src/devices/pci_device.c
View File

@@ -136,7 +136,7 @@ unsigned pci_find_next_capability(struct device *dev, unsigned cap,
int this_cap;
pos &= ~3;
this_cap = pci_read_config8(dev, pos + PCI_CAP_LIST_ID);
printk_spew("Capability: type 0x%02x @ 0x%02x\n", this_cap,
printk(BIOS_SPEW, "Capability: type 0x%02x @ 0x%02x\n", this_cap,
pos);
if (this_cap == 0xff) {
break;
@@ -226,8 +226,7 @@ struct resource *pci_get_resource(struct device *dev, unsigned long index)
*/
if (moving == 0) {
if (value != 0) {
printk_debug
("%s register %02lx(%08lx), read-only ignoring it\n",
printk(BIOS_DEBUG, "%s register %02lx(%08lx), read-only ignoring it\n",
dev_path(dev), index, value);
}
resource->flags = 0;
@@ -257,8 +256,8 @@ struct resource *pci_get_resource(struct device *dev, unsigned long index)
resource->flags |= IORESOURCE_PCI64;
} else {
/* Invalid value. */
printk_err("Broken BAR with value %lx\n", attr);
printk_err(" on dev %s at index %02lx\n",
printk(BIOS_ERR, "Broken BAR with value %lx\n", attr);
printk(BIOS_ERR, " on dev %s at index %02lx\n",
dev_path(dev), index);
resource->flags = 0;
}
@@ -313,8 +312,7 @@ static void pci_get_rom_resource(struct device *dev, unsigned long index)
resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY;
} else {
if (value != 0) {
printk_debug
("%s register %02lx(%08lx), read-only ignoring it\n",
printk(BIOS_DEBUG, "%s register %02lx(%08lx), read-only ignoring it\n",
dev_path(dev), index, value);
}
resource->flags = 0;
@@ -454,7 +452,7 @@ static void pci_set_resource(struct device *dev, struct resource *resource)
/* Make certain the resource has actually been assigned a value. */
if (!(resource->flags & IORESOURCE_ASSIGNED)) {
printk_err("ERROR: %s %02lx %s size: 0x%010llx not assigned\n",
printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx not assigned\n",
dev_path(dev), resource->index,
resource_type(resource), resource->size);
return;
@@ -543,7 +541,7 @@ static void pci_set_resource(struct device *dev, struct resource *resource)
} else {
/* Don't let me think I stored the resource. */
resource->flags &= ~IORESOURCE_STORED;
printk_err("ERROR: invalid resource->index %lx\n",
printk(BIOS_ERR, "ERROR: invalid resource->index %lx\n",
resource->index);
}
report_resource_stored(dev, resource, "");
@@ -594,7 +592,7 @@ void pci_dev_enable_resources(struct device *dev)
/* Set the subsystem vendor and device id for mainboard devices. */
ops = ops_pci(dev);
if (dev->on_mainboard && ops && ops->set_subsystem) {
printk_debug("%s subsystem <- %02x/%02x\n",
printk(BIOS_DEBUG, "%s subsystem <- %02x/%02x\n",
dev_path(dev),
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID,
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID);
@@ -607,7 +605,7 @@ void pci_dev_enable_resources(struct device *dev)
/* v3 has
* command |= (PCI_COMMAND_PARITY + PCI_COMMAND_SERR); // Error check.
*/
printk_debug("%s cmd <- %02x\n", dev_path(dev), command);
printk(BIOS_DEBUG, "%s cmd <- %02x\n", dev_path(dev), command);
pci_write_config16(dev, PCI_COMMAND, command);
}
@@ -623,7 +621,7 @@ void pci_bus_enable_resources(struct device *dev)
ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL);
ctrl |= dev->link[0].bridge_ctrl;
ctrl |= (PCI_BRIDGE_CTL_PARITY + PCI_BRIDGE_CTL_SERR); /* Error check. */
printk_debug("%s bridge ctrl <- %04x\n", dev_path(dev), ctrl);
printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl);
pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl);
pci_dev_enable_resources(dev);
@@ -731,7 +729,7 @@ static struct device_operations *get_pci_bridge_ops(device_t dev)
#if CONFIG_PCIX_PLUGIN_SUPPORT == 1
pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
if (pos) {
printk_debug("%s subordinate bus PCI-X\n", dev_path(dev));
printk(BIOS_DEBUG, "%s subordinate bus PCI-X\n", dev_path(dev));
return &default_pcix_ops_bus;
}
#endif
@@ -745,7 +743,7 @@ static struct device_operations *get_pci_bridge_ops(device_t dev)
flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
if ((flags >> 13) == 1) {
/* Host or Secondary Interface */
printk_debug("%s subordinate bus Hypertransport\n",
printk(BIOS_DEBUG, "%s subordinate bus Hypertransport\n",
dev_path(dev));
return &default_ht_ops_bus;
}
@@ -760,11 +758,11 @@ static struct device_operations *get_pci_bridge_ops(device_t dev)
case PCI_EXP_TYPE_ROOT_PORT:
case PCI_EXP_TYPE_UPSTREAM:
case PCI_EXP_TYPE_DOWNSTREAM:
printk_debug("%s subordinate bus PCI Express\n",
printk(BIOS_DEBUG, "%s subordinate bus PCI Express\n",
dev_path(dev));
return &default_pciexp_ops_bus;
case PCI_EXP_TYPE_PCI_BRIDGE:
printk_debug("%s subordinate PCI\n", dev_path(dev));
printk(BIOS_DEBUG, "%s subordinate PCI\n", dev_path(dev));
return &default_pci_ops_bus;
default:
break;
@@ -795,7 +793,7 @@ static void set_pci_ops(struct device *dev)
if ((driver->vendor == dev->vendor) &&
(driver->device == dev->device)) {
dev->ops = (struct device_operations *)driver->ops;
printk_spew("%s [%04x/%04x] %sops\n",
printk(BIOS_SPEW, "%s [%04x/%04x] %sops\n",
dev_path(dev),
driver->vendor, driver->device,
(driver->ops->scan_bus ? "bus " : ""));
@@ -823,7 +821,7 @@ static void set_pci_ops(struct device *dev)
default:
bad:
if (dev->enabled) {
printk_err("%s [%04x/%04x/%06x] has unknown header "
printk(BIOS_ERR, "%s [%04x/%04x/%06x] has unknown header "
"type %02x, ignoring.\n",
dev_path(dev),
dev->vendor, dev->device,
@@ -852,7 +850,7 @@ static struct device *pci_scan_get_dev(struct device **list, unsigned int devfn)
dev = 0;
for (; *list; list = &(*list)->sibling) {
if ((*list)->path.type != DEVICE_PATH_PCI) {
printk_err("child %s not a pci device\n",
printk(BIOS_ERR, "child %s not a pci device\n",
dev_path(*list));
continue;
}
@@ -916,7 +914,7 @@ device_t pci_probe_dev(device_t dev, struct bus * bus, unsigned devfn)
*/
if ((id == 0xffffffff) || (id == 0x00000000) ||
(id == 0x0000ffff) || (id == 0xffff0000)) {
printk_spew("%s, bad id 0x%x\n", dev_path(&dummy), id);
printk(BIOS_SPEW, "%s, bad id 0x%x\n", dev_path(&dummy), id);
return NULL;
}
dev = alloc_dev(bus, &dummy.path);
@@ -947,7 +945,7 @@ device_t pci_probe_dev(device_t dev, struct bus * bus, unsigned devfn)
if ((id == 0xffffffff) || (id == 0x00000000) ||
(id == 0x0000ffff) || (id == 0xffff0000)) {
if (dev->enabled) {
printk_info("PCI: Static device %s not found, disabling it.\n",
printk(BIOS_INFO, "PCI: Static device %s not found, disabling it.\n",
dev_path(dev));
dev->enabled = 0;
}
@@ -982,7 +980,7 @@ device_t pci_probe_dev(device_t dev, struct bus * bus, unsigned devfn)
}
/* Display the device. */
printk_debug("%s [%04x/%04x] %s%s\n",
printk(BIOS_DEBUG, "%s [%04x/%04x] %s%s\n",
dev_path(dev),
dev->vendor, dev->device,
dev->enabled ? "enabled" : "disabled",
@@ -1016,10 +1014,10 @@ unsigned int pci_scan_bus(struct bus *bus,
struct device *child;
#if CONFIG_PCI_BUS_SEGN_BITS
printk_debug("PCI: pci_scan_bus for bus %04x:%02x\n",
printk(BIOS_DEBUG, "PCI: pci_scan_bus for bus %04x:%02x\n",
bus->secondary >> 8, bus->secondary & 0xff);
#else
printk_debug("PCI: pci_scan_bus for bus %02x\n", bus->secondary);
printk(BIOS_DEBUG, "PCI: pci_scan_bus for bus %02x\n", bus->secondary);
#endif
old_devices = bus->children;
@@ -1055,11 +1053,11 @@ unsigned int pci_scan_bus(struct bus *bus,
*/
if (old_devices) {
device_t left;
printk_warning("PCI: Left over static devices:\n");
printk(BIOS_WARNING, "PCI: Left over static devices:\n");
for (left = old_devices; left; left = left->sibling) {
printk_warning("%s\n", dev_path(left));
printk(BIOS_WARNING, "%s\n", dev_path(left));
}
printk_warning("PCI: Check your mainboard Config.lb.\n");
printk(BIOS_WARNING, "PCI: Check your mainboard Config.lb.\n");
}
/* For all children that implement scan_bus() (i.e. bridges)
@@ -1073,7 +1071,7 @@ unsigned int pci_scan_bus(struct bus *bus,
* side of any bridges that may be on this bus plus any devices.
* Return how far we've got finding sub-buses.
*/
printk_debug("PCI: pci_scan_bus returning with max=%03x\n", max);
printk(BIOS_DEBUG, "PCI: pci_scan_bus returning with max=%03x\n", max);
post_code(0x55);
return max;
}
@@ -1100,7 +1098,7 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max,
u32 buses;
u16 cr;
printk_spew("%s for %s\n", __func__, dev_path(dev));
printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(dev));
bus = &dev->link[0];
bus->dev = dev;
@@ -1146,7 +1144,7 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max,
pci_write_config32(dev, PCI_PRIMARY_BUS, buses);
pci_write_config16(dev, PCI_COMMAND, cr);
printk_spew("%s returns max %d\n", __func__, max);
printk(BIOS_SPEW, "%s returns max %d\n", __func__, max);
return max;
}
@@ -1224,7 +1222,7 @@ void pci_assign_irqs(unsigned bus, unsigned slot,
irq = pIntAtoD[line - 1];
printk_debug("Assigning IRQ %d to %d:%x.%d\n",
printk(BIOS_DEBUG, "Assigning IRQ %d to %d:%x.%d\n",
irq, bus, slot, funct);
pci_write_config8(pdev, PCI_INTERRUPT_LINE,
@@ -1232,7 +1230,7 @@ void pci_assign_irqs(unsigned bus, unsigned slot,
#ifdef PARANOID_IRQ_ASSIGNMENTS
irq = pci_read_config8(pdev, PCI_INTERRUPT_LINE);
printk_debug(" Readback = %d\n", irq);
printk(BIOS_DEBUG, " Readback = %d\n", irq);
#endif
// Change to level triggered

4
src/devices/pci_ops.c
View File

@@ -39,7 +39,7 @@ static struct bus *get_pbus(device_t dev)
while(pbus && pbus->dev && !ops_pci_bus(pbus)) {
if (pbus == pbus->dev->bus) {
printk_alert("%s in endless loop looking for a parent "
printk(BIOS_ALERT, "%s in endless loop looking for a parent "
"bus with ops_pci_bus for %s, breaking out.\n",
__func__, dev_path(dev));
break;
@@ -48,7 +48,7 @@ static struct bus *get_pbus(device_t dev)
}
if (!pbus || !pbus->dev || !pbus->dev->ops || !pbus->dev->ops->ops_pci_bus) {
/* This can happen before the device tree is set up completely. */
//printk_emerg("%s: Cannot find pci bus operations.\n", dev_path(dev));
//printk(BIOS_EMERG, "%s: Cannot find pci bus operations.\n", dev_path(dev));
pbus = NULL;
}
return pbus;

20
src/devices/pci_rom.c
View File

@@ -38,7 +38,7 @@ struct rom_header * pci_rom_probe(struct device *dev)
rom_header = cbfs_load_optionrom(dev->vendor, dev->device, NULL);
if (rom_header) {
printk_debug("In cbfs, rom address for %s = %p\n",
printk(BIOS_DEBUG, "In cbfs, rom address for %s = %p\n",
dev_path(dev), rom_header);
} else {
unsigned long rom_address;
@@ -59,35 +59,35 @@ struct rom_header * pci_rom_probe(struct device *dev)
rom_address|PCI_ROM_ADDRESS_ENABLE);
}
printk_debug("On card, rom address for %s = %lx\n",
printk(BIOS_DEBUG, "On card, rom address for %s = %lx\n",
dev_path(dev), rom_address);
rom_header = (struct rom_header *)rom_address;
}
printk_spew("PCI Expansion ROM, signature 0x%04x, INIT size 0x%04x, data ptr 0x%04x\n",
printk(BIOS_SPEW, "PCI Expansion ROM, signature 0x%04x, INIT size 0x%04x, data ptr 0x%04x\n",
le32_to_cpu(rom_header->signature),
rom_header->size * 512, le32_to_cpu(rom_header->data));
if (le32_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
printk_err("Incorrect Expansion ROM Header Signature %04x\n",
printk(BIOS_ERR, "Incorrect Expansion ROM Header Signature %04x\n",
le32_to_cpu(rom_header->signature));
return NULL;
}
rom_data = (((void *)rom_header) + le32_to_cpu(rom_header->data));
printk_spew("PCI ROM Image, Vendor %04x, Device %04x,\n",
printk(BIOS_SPEW, "PCI ROM Image, Vendor %04x, Device %04x,\n",
rom_data->vendor, rom_data->device);
if (dev->vendor != rom_data->vendor || dev->device != rom_data->device) {
printk_err("ID mismatch: Vendor ID %04x, Device ID %04x\n",
printk(BIOS_ERR, "ID mismatch: Vendor ID %04x, Device ID %04x\n",
rom_data->vendor, rom_data->device);
return NULL;
}
printk_spew("PCI ROM Image, Class Code %04x%02x, Code Type %02x\n",
printk(BIOS_SPEW, "PCI ROM Image, Class Code %04x%02x, Code Type %02x\n",
rom_data->class_hi, rom_data->class_lo,
rom_data->type);
if (dev->class != ((rom_data->class_hi << 8) | rom_data->class_lo)) {
printk_debug("Class Code mismatch ROM %08x, dev %08x\n",
printk(BIOS_DEBUG, "Class Code mismatch ROM %08x, dev %08x\n",
(rom_data->class_hi << 8) | rom_data->class_lo,
dev->class);
//return NULL;
@@ -124,14 +124,14 @@ struct rom_header *pci_rom_load(struct device *dev, struct rom_header *rom_heade
if (dev != vga_pri) return NULL; // only one VGA supported
#endif
if ((void *)PCI_VGA_RAM_IMAGE_START != rom_header) {
printk_debug("copying VGA ROM Image from %p to 0x%x, 0x%x bytes\n",
printk(BIOS_DEBUG, "copying VGA ROM Image from %p to 0x%x, 0x%x bytes\n",
rom_header, PCI_VGA_RAM_IMAGE_START, rom_size);
memcpy((void *)PCI_VGA_RAM_IMAGE_START, rom_header, rom_size);
}
return (struct rom_header *) (PCI_VGA_RAM_IMAGE_START);
}
printk_debug("copying non-VGA ROM Image from %p to %p, 0x%x bytes\n",
printk(BIOS_DEBUG, "copying non-VGA ROM Image from %p to %p, 0x%x bytes\n",
rom_header, pci_ram_image_start, rom_size);
memcpy(pci_ram_image_start, rom_header, rom_size);

2
src/devices/pciexp_device.c
View File

@@ -35,7 +35,7 @@ static void pciexp_tune_dev(device_t dev)
return;
}
#ifdef CONFIG_PCIE_TUNING
printk_debug("PCIe: tuning %s\n", dev_path(dev));
printk(BIOS_DEBUG, "PCIe: tuning %s\n", dev_path(dev));
// TODO make this depending on ASPM
/* Enable ASPM Role Based Error Reporting */

4
src/devices/pcix_device.c
View File

@@ -38,7 +38,7 @@ static void pcix_tune_dev(device_t dev)
if (!cap) {
return;
}
printk_debug("%s PCI-X tuning\n", dev_path(dev));
printk(BIOS_DEBUG, "%s PCI-X tuning\n", dev_path(dev));
status = pci_read_config32(dev, cap + PCI_X_STATUS);
orig_cmd = cmd = pci_read_config16(dev,cap + PCI_X_CMD);
@@ -135,7 +135,7 @@ unsigned int pcix_scan_bridge(device_t dev, unsigned int max)
}
/* Print the PCI-X bus speed */
printk_debug("PCI: %02x: %s\n", dev->link[0].secondary, pcix_speed(sstatus));
printk(BIOS_DEBUG, "PCI: %02x: %s\n", dev->link[0].secondary, pcix_speed(sstatus));
return max;
}

4
src/devices/pnp_device.c
View File

@@ -103,7 +103,7 @@ void pnp_read_resources(device_t dev)
static void pnp_set_resource(device_t dev, struct resource *resource)
{
if (!(resource->flags & IORESOURCE_ASSIGNED)) {
printk_err("ERROR: %s %02lx %s size: 0x%010Lx not assigned\n",
printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010Lx not assigned\n",
dev_path(dev), resource->index,
resource_type(resource),
resource->size);
@@ -121,7 +121,7 @@ static void pnp_set_resource(device_t dev, struct resource *resource)
pnp_set_irq(dev, resource->index, resource->base);
}
else {
printk_err("ERROR: %s %02lx unknown resource type\n",
printk(BIOS_ERR, "ERROR: %s %02lx unknown resource type\n",
dev_path(dev), resource->index);
return;
}

16
src/devices/root_device.c
View File

@@ -34,7 +34,7 @@
*/
void root_dev_read_resources(device_t root)
{
printk_err("%s should never be called.\n", __func__);
printk(BIOS_ERR, "%s should never be called.\n", __func__);
}
/**
@@ -46,7 +46,7 @@ void root_dev_read_resources(device_t root)
*/
void root_dev_set_resources(device_t root)
{
printk_err("%s should never be called.\n", __func__);
printk(BIOS_ERR, "%s should never be called.\n", __func__);
}
/**
@@ -77,7 +77,7 @@ unsigned int scan_static_bus(device_t bus, unsigned int max)
device_t child;
unsigned link;
printk_spew("%s for %s\n", __func__, dev_path(bus));
printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus));
for(link = 0; link < bus->links; link++) {
/* for smbus bus enumerate */
@@ -93,10 +93,10 @@ unsigned int scan_static_bus(device_t bus, unsigned int max)
child->ops->enable(child);
}
if (child->path.type == DEVICE_PATH_I2C) {
printk_debug("smbus: %s[%d]->",
printk(BIOS_DEBUG, "smbus: %s[%d]->",
dev_path(child->bus->dev), child->bus->link );
}
printk_debug("%s %s\n",
printk(BIOS_DEBUG, "%s %s\n",
dev_path(child),
child->enabled?"enabled": "disabled");
}
@@ -105,12 +105,12 @@ unsigned int scan_static_bus(device_t bus, unsigned int max)
for(child = bus->link[link].children; child; child = child->sibling) {
if (!child->ops || !child->ops->scan_bus)
continue;
printk_spew("%s scanning...\n", dev_path(child));
printk(BIOS_SPEW, "%s scanning...\n", dev_path(child));
max = scan_bus(child, max);
}
}
printk_spew("%s for %s done\n", __func__, dev_path(bus));
printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus));
return max;
}
@@ -163,7 +163,7 @@ void root_dev_init(device_t root)
void root_dev_reset(struct bus *bus)
{
printk_info("Reseting board...\n");
printk(BIOS_INFO, "Reseting board...\n");
hard_reset();
}

8
src/devices/smbus_ops.c
View File

@@ -32,7 +32,7 @@ struct bus *get_pbus_smbus(device_t dev)
pbus = pbus->dev->bus;
}
if (!pbus || !pbus->dev || !pbus->dev->ops || !pbus->dev->ops->ops_smbus_bus) {
printk_alert("%s Cannot find smbus bus operations", dev_path(dev));
printk(BIOS_ALERT, "%s Cannot find smbus bus operations", dev_path(dev));
die("");
}
return pbus;
@@ -53,15 +53,15 @@ int smbus_set_link(device_t dev)
pbus_a[pbus_num++] = pbus;
pbus = pbus->dev->bus;
}
// printk_info("smbus_set_link: ");
// printk(BIOS_INFO, "smbus_set_link: ");
for (i=pbus_num-1; i>=0; i--) {
// printk_info(" %s[%d] -> ", dev_path(pbus_a[i]->dev), pbus_a[i]->link);
// printk(BIOS_INFO, " %s[%d] -> ", dev_path(pbus_a[i]->dev), pbus_a[i]->link);
if (ops_smbus_bus(get_pbus_smbus(pbus_a[i]->dev))) {
if (pbus_a[i]->dev->ops && pbus_a[i]->dev->ops->set_link)
pbus_a[i]->dev->ops->set_link(pbus_a[i]->dev, pbus_a[i]->link);
}
}
// printk_info(" %s\n", dev_path(dev));
// printk(BIOS_INFO, " %s\n", dev_path(dev));
return pbus_num;
}

10
src/drivers/ati/ragexl/mach64_ct.c
View File

@@ -2,7 +2,7 @@
/* FIXME: remove the FAIL definition */
#if 0
#define FAIL(x) do { printk_debug(x); return -EINVAL; } while (0)
#define FAIL(x) do { printk(BIOS_DEBUG, x); return -EINVAL; } while (0)
#else
#define FAIL(x)
#endif
@@ -31,7 +31,7 @@ static int aty_dsp_gt(const struct fb_info_aty *info, u32 bpp,
u32 memcntl, n, t_pfc, t_rp, t_ras, t_rcd, t_crd, t_rcc, t_lat;
#if DEBUG_PLL==1
printk_debug("aty_dsp_gt : mclk_fb_mult=%d\n", pll->mclk_fb_mult);
printk(BIOS_DEBUG, "aty_dsp_gt : mclk_fb_mult=%d\n", pll->mclk_fb_mult);
#endif
/* (64*xclk/vclk/bpp)<<11 = xclocks_per_row<<11 */
@@ -150,7 +150,7 @@ static int aty_valid_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
pllsclk = (1000000 * 2 * pll->sclk_fb_div) /
(info->ref_clk_per * pll->pll_ref_div);
printk_debug("aty_valid_pll_ct: pllsclk=%d MHz, mclk=%d MHz\n",
printk(BIOS_DEBUG, "aty_valid_pll_ct: pllsclk=%d MHz, mclk=%d MHz\n",
pllsclk, pllsclk / pll->mclk_post_div_real);
#endif
@@ -175,7 +175,7 @@ static int aty_valid_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
#if DEBUG_PLL==1
pllmclk = (1000000 * pll->mclk_fb_mult * pll->mclk_fb_div) /
(info->ref_clk_per * pll->pll_ref_div);
printk_debug("aty_valid_pll_ct: pllmclk=%d MHz, xclk=%d MHz\n",
printk(BIOS_DEBUG, "aty_valid_pll_ct: pllmclk=%d MHz, xclk=%d MHz\n",
pllmclk, pllmclk / pll->xclk_post_div_real);
#endif
@@ -301,7 +301,7 @@ u32 aty_pll_ct_to_var(const struct fb_info_aty *info,
void aty_set_pll_ct(const struct fb_info_aty *info, const union aty_pll *pll)
{
#if DEBUG_PLL==1
printk_debug("aty_set_pll_ct: about to program:\n"
printk(BIOS_DEBUG, "aty_set_pll_ct: about to program:\n"
"refdiv=%d, extcntl=0x%02x, mfbdiv=%d\n"
"spllcntl2=0x%02x, sfbdiv=%d, gencntl=0x%02x\n"
"vclkcntl=0x%02x, vpostdiv=0x%02x, vfbdiv=%d\n"

14
src/drivers/ati/ragexl/xlinit.c
View File

@@ -541,7 +541,7 @@ static void ati_ragexl_init(device_t dev)
#endif
#if 0
printk_debug("ati_regbase = 0x%08x, frame_buffer = 0x%08x\r\n", info->ati_regbase, info->frame_buffer);
printk(BIOS_DEBUG, "ati_regbase = 0x%08x, frame_buffer = 0x%08x\r\n", info->ati_regbase, info->frame_buffer);
#endif
chip_id = aty_ld_le32(CONFIG_CHIP_ID, info);
@@ -557,11 +557,11 @@ static void ati_ragexl_init(device_t dev)
info->features = aty_chips[j].features;
goto found;
}
printk_spew("ati_ragexl_init: Unknown mach64 0x%04x rev 0x%04x\n", type, rev);
printk(BIOS_SPEW, "ati_ragexl_init: Unknown mach64 0x%04x rev 0x%04x\n", type, rev);
return ;
found:
printk_info("ati_ragexl_init: %s [0x%04x rev 0x%02x]\r\n", chipname, type, rev);
printk(BIOS_INFO, "ati_ragexl_init: %s [0x%04x rev 0x%02x]\r\n", chipname, type, rev);
#if 0
if (M64_HAS(INTEGRATED)) {
/* for many chips, the mclk is 67 MHz for SDRAM, 63 MHz otherwise */
@@ -717,7 +717,7 @@ found:
if (atyfb_decode_var(&var, &info->default_par, info)) {
#if 0
printk_debug("atyfb: can't set default video mode\n");
printk(BIOS_DEBUG, "atyfb: can't set default video mode\n");
#endif
return ;
}
@@ -750,7 +750,7 @@ found:
#if PLL_CRTC_DECODE==1
printk_spew("framebuffer=0x%08x, width=%d, height=%d, bpp=%d, pitch=%d\n",info->frame_buffer,
printk(BIOS_SPEW, "framebuffer=0x%08x, width=%d, height=%d, bpp=%d, pitch=%d\n",info->frame_buffer,
(((info->current_par.crtc.h_tot_disp>>16) & 0xff)+1)*8,
((info->current_par.crtc.v_tot_disp>>16) & 0x7ff)+1,
info->current_par.crtc.bpp,
@@ -762,7 +762,7 @@ found:
info->current_par.crtc.bpp,
info->current_par.crtc.vxres*info->current_par.crtc.bpp/8,info->frame_buffer);
#else
printk_spew("framebuffer=0x%08x, width=%d, height=%d, bpp=%d, pitch=%d\n",info->frame_buffer,
printk(BIOS_SPEW, "framebuffer=0x%08x, width=%d, height=%d, bpp=%d, pitch=%d\n",info->frame_buffer,
(((info->default_par.crtc.h_tot_disp>>16) & 0xff)+1)*8,
((info->default_par.crtc.v_tot_disp>>16) & 0x7ff)+1,
info->default_par.crtc.bpp,
@@ -1184,7 +1184,7 @@ static int atyfb_set_var(struct fb_var_screeninfo *var, int con,
atyfb_encode_var(var, &par, (struct fb_info_aty *)info);
#if 0
printk_info("atyfb_set_var: activate=%d\n", activate & FB_ACTIVATE_MASK);
printk(BIOS_INFO, "atyfb_set_var: activate=%d\n", activate & FB_ACTIVATE_MASK);
#endif
if ((activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) {

2
src/drivers/emulation/qemu/init.c
View File

@@ -56,7 +56,7 @@ static void qemu_init(void)
{
int width=640, height=480, depth=8;
printk_debug("Initializing VGA!\n");
printk(BIOS_DEBUG, "Initializing VGA!\n");
vbe_outw(VBE_DISPI_INDEX_XRES, width);
vbe_outw(VBE_DISPI_INDEX_YRES, height);

66
src/drivers/generic/debug/debug_dev.c
View File

@@ -17,10 +17,10 @@ static void print_pci_regs(struct device *dev)
for(i=0;i<256;i++) {
byte = pci_read_config8(dev, i);
if((i & 0xf)==0) printk_debug("\n%02x:",i);
printk_debug(" %02x",byte);
if((i & 0xf)==0) printk(BIOS_DEBUG, "\n%02x:",i);
printk(BIOS_DEBUG, " %02x",byte);
}
printk_debug("\n");
printk(BIOS_DEBUG, "\n");
}
static void print_mem(void)
@@ -28,10 +28,10 @@ static void print_mem(void)
unsigned int i;
unsigned int start = 0xfffff000;
for(i=start;i<0xffffffff;i++) {
if((i & 0xf)==0) printk_debug("\n %08x:",i);
printk_debug(" %02x",(unsigned char)*((unsigned char *)i));
if((i & 0xf)==0) printk(BIOS_DEBUG, "\n %08x:",i);
printk(BIOS_DEBUG, " %02x",(unsigned char)*((unsigned char *)i));
}
printk_debug(" %02x\n",(unsigned char)*((unsigned char *)i));
printk(BIOS_DEBUG, " %02x\n",(unsigned char)*((unsigned char *)i));
}
static void print_pci_regs_all(void)
@@ -51,7 +51,7 @@ static void print_pci_regs_all(void)
if(!dev->enabled) {
continue;
}
printk_debug("\n%02x:%02x:%02x aka %s",
printk(BIOS_DEBUG, "\n%02x:%02x:%02x aka %s",
bus, device, function, dev_path(dev));
print_pci_regs(dev);
}
@@ -65,19 +65,19 @@ static void print_cpuid()
unsigned index;
unsigned eax, ebx, ecx, edx;
index = 0x80000007;
printk_debug("calling cpuid 0x%08x\n", index);
printk(BIOS_DEBUG, "calling cpuid 0x%08x\n", index);
asm volatile(
"cpuid"
: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
: "a" (index)
);
printk_debug("cpuid[%08x]: %08x %08x %08x %08x\n",
printk(BIOS_DEBUG, "cpuid[%08x]: %08x %08x %08x %08x\n",
index, eax, ebx, ecx, edx);
if (edx & (3 << 1)) {
index = 0xC0010042;
printk_debug("Reading msr: 0x%08x\n", index);
printk(BIOS_DEBUG, "Reading msr: 0x%08x\n", index);
msr = rdmsr(index);
printk_debug("msr[0x%08x]: 0x%08x%08x\n",
printk(BIOS_DEBUG, "msr[0x%08x]: 0x%08x%08x\n",
index, msr.hi, msr.lo);
}
@@ -85,23 +85,23 @@ static void print_cpuid()
static void print_smbus_regs(struct device *dev)
{
int j;
printk_debug("smbus: %s[%d]->", dev_path(dev->bus->dev), dev->bus->link);
printk_debug("%s", dev_path(dev));
printk(BIOS_DEBUG, "smbus: %s[%d]->", dev_path(dev->bus->dev), dev->bus->link);
printk(BIOS_DEBUG, "%s", dev_path(dev));
for(j = 0; j < 256; j++) {
int status;
unsigned char byte;
status = smbus_read_byte(dev, j);
if (status < 0) {
// printk_debug("bad device status= %08x\r\n", status);
// printk(BIOS_DEBUG, "bad device status= %08x\r\n", status);
break;
}
if ((j & 0xf) == 0) {
printk_debug("\r\n%02x: ", j);
printk(BIOS_DEBUG, "\r\n%02x: ", j);
}
byte = status & 0xff;
printk_debug("%02x ", byte);
printk(BIOS_DEBUG, "%02x ", byte);
}
printk_debug("\r\n");
printk(BIOS_DEBUG, "\r\n");
}
static void print_smbus_regs_all(struct device *dev)
@@ -133,28 +133,28 @@ static void print_msr_dualcore(void)
unsigned index;
unsigned eax, ebx, ecx, edx;
index = 0x80000008;
printk_debug("calling cpuid 0x%08x\n", index);
printk(BIOS_DEBUG, "calling cpuid 0x%08x\n", index);
asm volatile(
"cpuid"
: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
: "a" (index)
);
printk_debug("cpuid[%08x]: %08x %08x %08x %08x\n",
printk(BIOS_DEBUG, "cpuid[%08x]: %08x %08x %08x %08x\n",
index, eax, ebx, ecx, edx);
printk_debug("core number %d\n", ecx & 0xff);
printk(BIOS_DEBUG, "core number %d\n", ecx & 0xff);
index = 0xc001001f;
printk_debug("Reading msr: 0x%08x\n", index);
printk(BIOS_DEBUG, "Reading msr: 0x%08x\n", index);
msr = rdmsr(index);
printk_debug("msr[0x%08x]: 0x%08x%08x bit 54 is %d\n",
printk(BIOS_DEBUG, "msr[0x%08x]: 0x%08x%08x bit 54 is %d\n",
index, msr.hi, msr.lo, (msr.hi>> (54-32)) & 1);
#if 0
msr.hi |= (1<<(54-32));
wrmsr(index, msr);
msr = rdmsr(index);
printk_debug("msr[0x%08x]: 0x%08x%08x\n",
printk(BIOS_DEBUG, "msr[0x%08x]: 0x%08x%08x\n",
index, msr.hi, msr.lo);
#endif
@@ -166,7 +166,7 @@ static void print_cache_size(void)
unsigned int n, eax, ebx, ecx, edx;
index = 0x80000000;
printk_debug("calling cpuid 0x%08x\n", index);
printk(BIOS_DEBUG, "calling cpuid 0x%08x\n", index);
asm volatile(
"cpuid"
: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
@@ -176,25 +176,25 @@ static void print_cache_size(void)
if (n >= 0x80000005) {
index = 0x80000005;
printk_debug("calling cpuid 0x%08x\n", index);
printk(BIOS_DEBUG, "calling cpuid 0x%08x\n", index);
asm volatile(
"cpuid"
: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
: "a" (index)
);
printk_debug("CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
printk(BIOS_DEBUG, "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
}
if (n >= 0x80000006) {
index = 0x80000006;
printk_debug("calling cpuid 0x%08x\n", index);
printk(BIOS_DEBUG, "calling cpuid 0x%08x\n", index);
asm volatile(
"cpuid"
: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
: "a" (index)
);
printk_debug("CPU: L2 Cache: %dK (%d bytes/line)\n",
printk(BIOS_DEBUG, "CPU: L2 Cache: %dK (%d bytes/line)\n",
ecx >> 16, ecx & 0xFF);
}
@@ -220,11 +220,11 @@ static void print_tsc(void) {
tsc_t tsc;
tsc = rdtsc();
printk_debug("tsc: 0x%08x%08x\n",
printk(BIOS_DEBUG, "tsc: 0x%08x%08x\n",
tsc.hi, tsc.lo);
udelay(1);
tsc = rdtsc();
printk_debug("tsc: 0x%08x%08x after udelay(1) \n",
printk(BIOS_DEBUG, "tsc: 0x%08x%08x after udelay(1) \n",
tsc.hi, tsc.lo);
}
@@ -238,11 +238,11 @@ static void debug_init(device_t dev)
switch(dev->path.pnp.device) {
case 0:
parent = dev->bus->dev;
printk_debug("DEBUG: %s", dev_path(parent));
printk(BIOS_DEBUG, "DEBUG: %s", dev_path(parent));
if(parent->chip_ops && parent->chip_ops->name) {
printk_debug(": %s\n", parent->chip_ops->name);
printk(BIOS_DEBUG, ": %s\n", parent->chip_ops->name);
} else {
printk_debug("\n");
printk(BIOS_DEBUG, "\n");
}
break;

2
src/drivers/i2c/adm1026/adm1026.c
View File

@@ -44,7 +44,7 @@ static void adm1026_enable_monitoring(device_t dev)
result = smbus_read_byte(dev, ADM1026_REG_CONFIG1);
if (!(result & CFG1_MONITOR)) {
printk_debug("ADM1026: monitoring would not enable");
printk(BIOS_DEBUG, "ADM1026: monitoring would not enable");
}
}
static void adm1026_noop(device_t dummy)

6
src/drivers/i2c/adm1027/adm1027.c
View File

@@ -26,7 +26,7 @@ static void adm1027_enable_monitoring(device_t dev)
result = smbus_read_byte(dev, ADM1027_REG_CONFIG1);
if (!(result & CFG1_RDY)) {
printk_debug("ADM1027: monitoring not ready\r\n");
printk(BIOS_DEBUG, "ADM1027: monitoring not ready\r\n");
return;
}
result = (result | CFG1_STRT);
@@ -34,9 +34,9 @@ static void adm1027_enable_monitoring(device_t dev)
result = smbus_read_byte(dev, ADM1027_REG_CONFIG1);
if (!(result & CFG1_STRT)) {
printk_debug("ADM1027: monitoring would not enable\r\n");
printk(BIOS_DEBUG, "ADM1027: monitoring would not enable\r\n");
}
printk_debug("ADM1027: monitoring enabled\r\n");
printk(BIOS_DEBUG, "ADM1027: monitoring enabled\r\n");
}
static void adm1027_init(device_t dev)

2
src/drivers/si/3114/si_sata.c
View File

@@ -45,7 +45,7 @@ static void si_sata_init(struct device *dev)
dword &= ~(1<<0);
pci_write_config32(dev, 0x40, dword);
printk_debug("Class code restored.\n");
printk(BIOS_DEBUG, "Class code restored.\n");
}

14
src/drivers/trident/blade3d/blade3d.c
View File

@@ -777,7 +777,7 @@ static int init9880(void)
//if chip revB
if (CHIPREV == 0x02) {
printk_debug("blade3d: chip revision B\n");
printk(BIOS_DEBUG, "blade3d: chip revision B\n");
outp(Port_CRX, 0xc0);
outp(Port_CRX + 1, 0x00);
}
@@ -805,7 +805,7 @@ static void config_OEM_regs(void)
lpMode3_temp = &Mode3_temp[0];
lpInit_reg = &Init_reg[0];
printk_debug("blade3d: config_OEM_regs()\n");
printk(BIOS_DEBUG, "blade3d: config_OEM_regs()\n");
outp(Port_GRX, 0x24);
outp(Port_GRX + 1, 0xe0);
@@ -943,13 +943,13 @@ static void init_SGRAM(void)
}
} else { //SGRAM
printk_debug("blade3d: No SGRAM found.\n");
printk(BIOS_DEBUG, "blade3d: No SGRAM found.\n");
}
}
static void config_video_memory(void)
{
printk_debug("blade3d: Error: no video memory init\n");
printk(BIOS_DEBUG, "blade3d: Error: no video memory init\n");
}
static void set_video_mode(void)
@@ -959,7 +959,7 @@ static void set_video_mode(void)
lpDef_Reg_struct lpMode3_reg;
lpMode3_reg = &Mode3_reg[0];
printk_debug("blade3d: setting video mode\n");
printk(BIOS_DEBUG, "blade3d: setting video mode\n");
outp(0x3c2, 0x67);
for (i = 0; i < Length_Mode3_reg; i++) {
if (lpMode3_reg[i].rPort == Port_BRX) {
@@ -982,7 +982,7 @@ static void set_video_mode(void)
static void set_font(void)
{
printk_debug("blade3d: setting font (not implemented)\n");
printk(BIOS_DEBUG, "blade3d: setting font (not implemented)\n");
}
static void clear_MEM(void)
@@ -1008,7 +1008,7 @@ static void clear_MEM(void)
static void trident_blade3d_init(struct device *dev)
{
printk_info("blade3d: initializing video card\n");
printk(BIOS_INFO, "blade3d: initializing video card\n");
init9880();
}

4
src/include/assert.h
View File

@@ -48,13 +48,13 @@
/* GCC and CAR versions */
#define ASSERT(x) { \
if (!(x)) { \
printk_emerg("ASSERTION FAILED: file '%s', " \
printk(BIOS_EMERG, "ASSERTION FAILED: file '%s', " \
" line %d\n", __FILE__, __LINE__); \
/* die(""); */ \
} \
}
#define BUG() { \
printk_emerg("BUG ENCOUNTERED: SYSTEM HALTED at file '%s', " \
printk(BIOS_EMERG, "BUG ENCOUNTERED: SYSTEM HALTED at file '%s', " \
" line %d\n", __FILE__, __LINE__); \
/* die(""); */ \
}

2
src/include/cpu/x86/bist.h
View File

@@ -5,7 +5,7 @@ static void report_bist_failure(u32 bist)
{
if (bist != 0) {
#if CONFIG_USE_PRINTK_IN_CAR
printk_emerg("BIST failed: %08x", bist);
printk(BIOS_EMERG, "BIST failed: %08x", bist);
#else
print_emerg("BIST failed: ");
print_emerg_hex32(bist);

32
src/lib/cbfs.c
View File

@@ -42,13 +42,13 @@ static int cbfs_decompress(int algo, void *src, void *dst, int len)
case CBFS_COMPRESS_LZMA:
if (!ulzma(src, dst)) {
printk_err("CBFS: LZMA decompression failed!\n");
printk(BIOS_ERR, "CBFS: LZMA decompression failed!\n");
return -1;
}
return 0;
default:
printk_info( "CBFS: Unknown compression type %d\n", algo);
printk(BIOS_INFO, "CBFS: Unknown compression type %d\n", algo);
return -1;
}
}
@@ -63,20 +63,20 @@ static struct cbfs_header *cbfs_master_header(void)
struct cbfs_header *header;
void *ptr = (void *)*((unsigned long *) CBFS_HEADPTR_ADDR);
printk_spew("Check CBFS header at %p\n", ptr);
printk(BIOS_SPEW, "Check CBFS header at %p\n", ptr);
header = (struct cbfs_header *) ptr;
printk_spew("magic is %08x\n", ntohl(header->magic));
printk(BIOS_SPEW, "magic is %08x\n", ntohl(header->magic));
if (ntohl(header->magic) != CBFS_HEADER_MAGIC) {
printk_err("ERROR: No valid CBFS header found!\n");
printk(BIOS_ERR, "ERROR: No valid CBFS header found!\n");
if (header->magic == 0xffffffff) {
printk_err("Maybe the ROM isn't entirely mapped yet?\n"
printk(BIOS_ERR, "Maybe the ROM isn't entirely mapped yet?\n"
"See (and report to) http://www.coreboot.org/Infrastructure_Projects#CBFS\n");
}
return NULL;
}
printk_spew("Found CBFS header at %p\n", ptr);
printk(BIOS_SPEW, "Found CBFS header at %p\n", ptr);
return header;
}
@@ -94,17 +94,17 @@ struct cbfs_file *cbfs_find(const char *name)
while(1) {
struct cbfs_file *file = (struct cbfs_file *) offset;
if (!cbfs_check_magic(file)) return NULL;
printk_spew("Check %s\n", CBFS_NAME(file));
printk(BIOS_SPEW, "Check %s\n", CBFS_NAME(file));
if (!strcmp(CBFS_NAME(file), name))
return file;
int flen = ntohl(file->len);
int foffset = ntohl(file->offset);
printk_spew("CBFS: follow chain: %p + %x + %x + align -> ", (void *)offset, foffset, flen);
printk(BIOS_SPEW, "CBFS: follow chain: %p + %x + %x + align -> ", (void *)offset, foffset, flen);
unsigned long oldoffset = offset;
offset = ALIGN(offset + foffset + flen, align);
printk_spew("%p\n", (void *)offset);
printk(BIOS_SPEW, "%p\n", (void *)offset);
if (offset <= oldoffset) return NULL;
if (offset < 0xFFFFFFFF - ntohl(header->romsize))
@@ -117,13 +117,13 @@ void *cbfs_find_file(const char *name, int type)
struct cbfs_file *file = cbfs_find(name);
if (file == NULL) {
printk_info( "CBFS: Could not find file %s\n",
printk(BIOS_INFO, "CBFS: Could not find file %s\n",
name);
return NULL;
}
if (ntohl(file->type) != type) {
printk_info( "CBFS: File %s is of type %x instead of"
printk(BIOS_INFO, "CBFS: File %s is of type %x instead of"
"type %x\n", name, file->type, type);
return NULL;
@@ -193,7 +193,7 @@ void * cbfs_load_stage(const char *name)
if (stage == NULL)
return (void *) -1;
printk_info("Stage: loading %s @ 0x%x (%d bytes), entry @ 0x%llx\n",
printk(BIOS_INFO, "Stage: loading %s @ 0x%x (%d bytes), entry @ 0x%llx\n",
name,
(u32) stage->load, stage->memlen,
stage->entry);
@@ -206,7 +206,7 @@ void * cbfs_load_stage(const char *name)
stage->len))
return (void *) -1;
printk_debug("Stage: done loading.\n");
printk(BIOS_DEBUG, "Stage: done loading.\n");
entry = stage->entry;
// entry = ntohl((u32) stage->entry);
@@ -223,13 +223,13 @@ int cbfs_execute_stage(const char *name)
return 1;
if (ntohl(stage->compression) != CBFS_COMPRESS_NONE) {
printk_info( "CBFS: Unable to run %s: Compressed file"
printk(BIOS_INFO, "CBFS: Unable to run %s: Compressed file"
"Not supported for in-place execution\n", name);
return 1;
}
/* FIXME: This isn't right */
printk_info( "CBFS: run @ %p\n", (void *) ntohl((u32) stage->entry));
printk(BIOS_INFO, "CBFS: run @ %p\n", (void *) ntohl((u32) stage->entry));
return run_address((void *) ntohl((u32) stage->entry));
}

30
src/lib/cbmem.c
View File

@@ -23,7 +23,7 @@
#include <console/console.h>
#if 1
#define debug(x...) printk_debug(x)
#define debug(x...) printk(BIOS_DEBUG, x)
#else
#define debug(x...)
#endif
@@ -110,13 +110,13 @@ void *cbmem_add(u32 id, u64 size)
}
if (cbmem_toc[0].magic != CBMEM_MAGIC) {
printk_err("ERROR: CBMEM was not initialized yet.\n");
printk(BIOS_ERR, "ERROR: CBMEM was not initialized yet.\n");
return NULL;
}
/* Will the entry fit at all? */
if (size > cbmem_toc[0].size) {
printk_err("ERROR: Not enough memory for table %x\n", id);
printk(BIOS_ERR, "ERROR: Not enough memory for table %x\n", id);
return NULL;
}
@@ -132,7 +132,7 @@ void *cbmem_add(u32 id, u64 size)
}
if (i >= MAX_CBMEM_ENTRIES) {
printk_err("ERROR: No more CBMEM entries available.\n");
printk(BIOS_ERR, "ERROR: No more CBMEM entries available.\n");
return NULL;
}
@@ -214,19 +214,19 @@ void cbmem_list(void)
if (cbmem_toc[i].magic != CBMEM_MAGIC)
continue;
printk_debug("%2d. ", i);
printk(BIOS_DEBUG, "%2d. ", i);
switch (cbmem_toc[i].id) {
case CBMEM_ID_FREESPACE: printk_debug("FREE SPACE "); break;
case CBMEM_ID_GDT: printk_debug("GDT "); break;
case CBMEM_ID_ACPI: printk_debug("ACPI "); break;
case CBMEM_ID_CBTABLE: printk_debug("COREBOOT "); break;
case CBMEM_ID_PIRQ: printk_debug("IRQ TABLE "); break;
case CBMEM_ID_MPTABLE: printk_debug("SMP TABLE "); break;
case CBMEM_ID_RESUME: printk_debug("ACPI RESUME"); break;
default: printk_debug("%08x ", cbmem_toc[i].id);
case CBMEM_ID_FREESPACE: printk(BIOS_DEBUG, "FREE SPACE "); break;
case CBMEM_ID_GDT: printk(BIOS_DEBUG, "GDT "); break;
case CBMEM_ID_ACPI: printk(BIOS_DEBUG, "ACPI "); break;
case CBMEM_ID_CBTABLE: printk(BIOS_DEBUG, "COREBOOT "); break;
case CBMEM_ID_PIRQ: printk(BIOS_DEBUG, "IRQ TABLE "); break;
case CBMEM_ID_MPTABLE: printk(BIOS_DEBUG, "SMP TABLE "); break;
case CBMEM_ID_RESUME: printk(BIOS_DEBUG, "ACPI RESUME"); break;
default: printk(BIOS_DEBUG, "%08x ", cbmem_toc[i].id);
}
printk_debug("%08llx ", cbmem_toc[i].base);
printk_debug("%08llx\n", cbmem_toc[i].size);
printk(BIOS_DEBUG, "%08llx ", cbmem_toc[i].base);
printk(BIOS_DEBUG, "%08llx\n", cbmem_toc[i].size);
}
}
#endif

2
src/lib/clog2.c
View File

@@ -17,7 +17,7 @@ unsigned long log2(unsigned long x)
if (! x) {
#ifdef DEBUG_LOG2
printk_warning("%s called with invalid parameter of 0\n",
printk(BIOS_WARNING, "%s called with invalid parameter of 0\n",
__func__);
#endif
return -1;

12
src/lib/generic_dump_spd.c
View File

@@ -69,25 +69,25 @@ void dump_spd_registers(void)
{
unsigned device;
device = SMBUS_MEM_DEVICE_START;
printk_debug("\n");
printk(BIOS_DEBUG, "\n");
while(device <= SMBUS_MEM_DEVICE_END) {
int status = 0;
int i;
printk_debug("dimm %02x", device);
printk(BIOS_DEBUG, "dimm %02x", device);
for(i = 0; (i < 256) && (status == 0); i++) {
unsigned char byte;
if ((i % 20) == 0) {
printk_debug("\n%3d: ", i);
printk(BIOS_DEBUG, "\n%3d: ", i);
}
status = smbus_read_byte(device, i, &byte);
if (status != 0) {
printk_debug("bad device\n");
printk(BIOS_DEBUG, "bad device\n");
continue;
}
printk_debug("%02x ", byte);
printk(BIOS_DEBUG, "%02x ", byte);
}
device += SMBUS_MEM_DEVICE_INC;
printk_debug("\n");
printk(BIOS_DEBUG, "\n");
}
}
#endif

2
src/lib/generic_sdram.c
View File

@@ -7,7 +7,7 @@
static inline void print_debug_sdram_8(const char *strval, uint32_t val)
{
#if CONFIG_USE_INIT
printk_debug("%s%02x\r\n", strval, val);
printk(BIOS_DEBUG, "%s%02x\r\n", strval, val);
#else
print_debug(strval); print_debug_hex8(val); print_debug("\r\n");
#endif

6
src/lib/lzma.c
View File

@@ -29,19 +29,19 @@ unsigned long ulzma(unsigned char * src, unsigned char * dst)
memcpy(properties, src, LZMA_PROPERTIES_SIZE);
outSize = *(UInt32 *)(src + LZMA_PROPERTIES_SIZE);
if (LzmaDecodeProperties(&state.Properties, properties, LZMA_PROPERTIES_SIZE) != LZMA_RESULT_OK) {
printk_warning("lzma: Incorrect stream properties.\n");
printk(BIOS_WARNING, "lzma: Incorrect stream properties.\n");
return 0;
}
mallocneeds = (LzmaGetNumProbs(&state.Properties) * sizeof(CProb));
if (mallocneeds > 15980) {
printk_warning("lzma: Decoder scratchpad too small!\n");
printk(BIOS_WARNING, "lzma: Decoder scratchpad too small!\n");
return 0;
}
state.Probs = (CProb *)scratchpad;
res = LzmaDecode(&state, src + LZMA_PROPERTIES_SIZE + 8, (SizeT)0xffffffff, &inProcessed,
dst, outSize, &outProcessed);
if (res != 0) {
printk_warning("lzma: Decoding error = %d\n", res);
printk(BIOS_WARNING, "lzma: Decoding error = %d\n", res);
return 0;
}
return outSize;

2
src/lib/malloc.c
View File

@@ -4,7 +4,7 @@
#if 0
#define MALLOCDBG(x)
#else
#define MALLOCDBG(x...) printk_spew(x)
#define MALLOCDBG(x...) printk(BIOS_SPEW, x)
#endif
extern unsigned char _heap, _eheap;
static void *free_mem_ptr = &_heap; /* Start of heap */

24
src/lib/ramtest.c
View File

@@ -34,7 +34,7 @@ static void ram_fill(unsigned long start, unsigned long stop)
* Fill.
*/
#if CONFIG_USE_PRINTK_IN_CAR
printk_debug("DRAM fill: 0x%08lx-0x%08lx\r\n", start, stop);
printk(BIOS_DEBUG, "DRAM fill: 0x%08lx-0x%08lx\r\n", start, stop);
#else
print_debug("DRAM fill: ");
print_debug_hex32(start);
@@ -46,7 +46,7 @@ static void ram_fill(unsigned long start, unsigned long stop)
/* Display address being filled */
if (!(addr & 0xfffff)) {
#if CONFIG_USE_PRINTK_IN_CAR
printk_debug("%08lx \r", addr);
printk(BIOS_DEBUG, "%08lx \r", addr);
#else
print_debug_hex32(addr);
print_debug(" \r");
@@ -60,7 +60,7 @@ static void ram_fill(unsigned long start, unsigned long stop)
#endif
/* Display final address */
#if CONFIG_USE_PRINTK_IN_CAR
printk_debug("%08lx\r\nDRAM filled\r\n", addr);
printk(BIOS_DEBUG, "%08lx\r\nDRAM filled\r\n", addr);
#else
print_debug_hex32(addr);
print_debug("\r\nDRAM filled\r\n");
@@ -75,7 +75,7 @@ static void ram_verify(unsigned long start, unsigned long stop)
* Verify.
*/
#if CONFIG_USE_PRINTK_IN_CAR
printk_debug("DRAM verify: 0x%08lx-0x%08lx\r\n", start, stop);
printk(BIOS_DEBUG, "DRAM verify: 0x%08lx-0x%08lx\r\n", start, stop);
#else
print_debug("DRAM verify: ");
print_debug_hex32(start);
@@ -88,7 +88,7 @@ static void ram_verify(unsigned long start, unsigned long stop)
/* Display address being tested */
if (!(addr & 0xfffff)) {
#if CONFIG_USE_PRINTK_IN_CAR
printk_debug("%08lx \r", addr);
printk(BIOS_DEBUG, "%08lx \r", addr);
#else
print_debug_hex32(addr);
print_debug(" \r");
@@ -98,7 +98,7 @@ static void ram_verify(unsigned long start, unsigned long stop)
if (value != addr) {
/* Display address with error */
#if CONFIG_USE_PRINTK_IN_CAR
printk_err("Fail: @0x%08lx Read value=0x%08lx\r\n", addr, value);
printk(BIOS_ERR, "Fail: @0x%08lx Read value=0x%08lx\r\n", addr, value);
#else
print_err("Fail: @0x");
print_err_hex32(addr);
@@ -109,7 +109,7 @@ static void ram_verify(unsigned long start, unsigned long stop)
i++;
if(i>256) {
#if CONFIG_USE_PRINTK_IN_CAR
printk_debug("Aborting.\n\r");
printk(BIOS_DEBUG, "Aborting.\n\r");
#else
print_debug("Aborting.\n\r");
#endif
@@ -119,14 +119,14 @@ static void ram_verify(unsigned long start, unsigned long stop)
}
/* Display final address */
#if CONFIG_USE_PRINTK_IN_CAR
printk_debug("%08lx", addr);
printk(BIOS_DEBUG, "%08lx", addr);
#else
print_debug_hex32(addr);
#endif
if (i) {
#if CONFIG_USE_PRINTK_IN_CAR
printk_debug("\r\nDRAM did _NOT_ verify!\r\n");
printk(BIOS_DEBUG, "\r\nDRAM did _NOT_ verify!\r\n");
#else
print_debug("\r\nDRAM did _NOT_ verify!\r\n");
#endif
@@ -134,7 +134,7 @@ static void ram_verify(unsigned long start, unsigned long stop)
}
else {
#if CONFIG_USE_PRINTK_IN_CAR
printk_debug("\r\nDRAM range verified.\r\n");
printk(BIOS_DEBUG, "\r\nDRAM range verified.\r\n");
#else
print_debug("\r\nDRAM range verified.\r\n");
#endif
@@ -150,7 +150,7 @@ void ram_check(unsigned long start, unsigned long stop)
* are tested. -Tyson
*/
#if CONFIG_USE_PRINTK_IN_CAR
printk_debug("Testing DRAM : %08lx - %08lx\r\n", start, stop);
printk(BIOS_DEBUG, "Testing DRAM : %08lx - %08lx\r\n", start, stop);
#else
print_debug("Testing DRAM : ");
print_debug_hex32(start);
@@ -161,7 +161,7 @@ void ram_check(unsigned long start, unsigned long stop)
ram_fill(start, stop);
ram_verify(start, stop);
#if CONFIG_USE_PRINTK_IN_CAR
printk_debug("Done.\r\n");
printk(BIOS_DEBUG, "Done.\r\n");
#else
print_debug("Done.\r\n");
#endif

6
src/lib/usbdebug_direct.c
View File

@@ -23,7 +23,7 @@
#include <console/console.h>
#else
#if CONFIG_USE_PRINTK_IN_CAR==0
#define printk_debug(fmt, arg...) do {} while(0)
#define printk(BIOS_DEBUG, fmt, arg...) do {} while(0)
#endif
#endif
@@ -304,7 +304,7 @@ static int ehci_reset_port(struct ehci_regs *ehci_regs, int port)
delay_time += delay;
} while ((portsc & PORT_RESET) && (--loop > 0));
if (!loop) {
printk_debug("ehci_reset_port forced done");
printk(BIOS_DEBUG, "ehci_reset_port forced done");
}
}
@@ -342,7 +342,7 @@ static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port)
#define DBGP_DEBUG 1
#if DBGP_DEBUG
# define dbgp_printk printk_debug
# define dbgp_printk(fmt, arg...) printk(BIOS_DEBUG, fmt, arg)
#else
#define dbgp_printk(fmt, arg...) do {} while(0)
#endif

4
src/mainboard/amd/db800/mainboard.c
View File

@@ -23,8 +23,8 @@
static void init(struct device *dev)
{
printk_debug("AMD DB800 ENTER %s\n", __func__);
printk_debug("AMD DB800 EXIT %s\n", __func__);
printk(BIOS_DEBUG, "AMD DB800 ENTER %s\n", __func__);
printk(BIOS_DEBUG, "AMD DB800 EXIT %s\n", __func__);
}
static void enable_dev(struct device *dev)

42
src/mainboard/amd/dbm690t/acpi_tables.c
View File

@@ -49,9 +49,9 @@ static void dump_mem(u32 start, u32 end)
print_debug("dump_mem:");
for (i = start; i < end; i++) {
if ((i & 0xf) == 0) {
printk_debug("\n%08x:", i);
printk(BIOS_DEBUG, "\n%08x:", i);
}
printk_debug(" %02x", (u8)*((u8 *)i));
printk(BIOS_DEBUG, " %02x", (u8)*((u8 *)i));
}
print_debug("\n");
}
@@ -147,7 +147,7 @@ unsigned long write_acpi_tables(unsigned long start)
start = (start + 0x0f) & -0x10;
current = start;
printk_info("ACPI: Writing ACPI tables at %lx...\n", start);
printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
/* We need at least an RSDP and an RSDT Table */
rsdp = (acpi_rsdp_t *) current;
@@ -165,13 +165,13 @@ unsigned long write_acpi_tables(unsigned long start)
* We explicitly add these tables later on:
*/
/* If we want to use HPET Timers Linux wants an MADT */
printk_debug("ACPI: * HPET\n");
printk(BIOS_DEBUG, "ACPI: * HPET\n");
hpet = (acpi_hpet_t *) current;
current += sizeof(acpi_hpet_t);
acpi_create_hpet(hpet);
acpi_add_table(rsdp, hpet);
printk_debug("ACPI: * MADT\n");
printk(BIOS_DEBUG, "ACPI: * MADT\n");
madt = (acpi_madt_t *) current;
acpi_create_madt(madt);
current += madt->header.length;
@@ -179,14 +179,14 @@ unsigned long write_acpi_tables(unsigned long start)
#if 0
/* SRAT */
printk_debug("ACPI: * SRAT\n");
printk(BIOS_DEBUG, "ACPI: * SRAT\n");
srat = (acpi_srat_t *) current;
acpi_create_srat(srat);
current += srat->header.length;
acpi_add_table(rsdp, srat);
/* SLIT */
printk_debug("ACPI: * SLIT\n");
printk(BIOS_DEBUG, "ACPI: * SLIT\n");
slit = (acpi_slit_t *) current;
acpi_create_slit(slit);
current += slit->header.length;
@@ -194,7 +194,7 @@ unsigned long write_acpi_tables(unsigned long start)
#endif
/* SSDT */
printk_debug("ACPI: * SSDT\n");
printk(BIOS_DEBUG, "ACPI: * SSDT\n");
ssdt = (acpi_header_t *)current;
acpi_create_ssdt_generator(ssdt, "DYNADATA");
@@ -214,7 +214,7 @@ unsigned long write_acpi_tables(unsigned long start)
} else {
c = (uint8_t) ('A' + i - 1 - 6);
}
printk_debug("ACPI: * SSDT for PCI%c Aka hcid = %d\n", c, sysconf.hcid[i]); /* pci0 and pci1 are in dsdt */
printk(BIOS_DEBUG, "ACPI: * SSDT for PCI%c Aka hcid = %d\n", c, sysconf.hcid[i]); /* pci0 and pci1 are in dsdt */
current = (current + 0x07) & -0x08;
ssdtx = (acpi_header_t *) current;
switch (sysconf.hcid[i]) {
@@ -243,20 +243,20 @@ unsigned long write_acpi_tables(unsigned long start)
#endif
/* FACS */
printk_debug("ACPI: * FACS\n");
printk(BIOS_DEBUG, "ACPI: * FACS\n");
facs = (acpi_facs_t *) current;
current += sizeof(acpi_facs_t);
acpi_create_facs(facs);
/* DSDT */
printk_debug("ACPI: * DSDT\n");
printk(BIOS_DEBUG, "ACPI: * DSDT\n");
dsdt = (acpi_header_t *) current;
memcpy((void *)dsdt, (void *)AmlCode,
((acpi_header_t *) AmlCode)->length);
current += dsdt->length;
printk_debug("ACPI: * DSDT @ %p Length %x\n", dsdt, dsdt->length);
printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x\n", dsdt, dsdt->length);
/* FADT */
printk_debug("ACPI: * FADT\n");
printk(BIOS_DEBUG, "ACPI: * FADT\n");
fadt = (acpi_fadt_t *) current;
current += sizeof(acpi_fadt_t);
@@ -264,28 +264,28 @@ unsigned long write_acpi_tables(unsigned long start)
acpi_add_table(rsdp, fadt);
#if DUMP_ACPI_TABLES == 1
printk_debug("rsdp\n");
printk(BIOS_DEBUG, "rsdp\n");
dump_mem(rsdp, ((void *)rsdp) + sizeof(acpi_rsdp_t));
printk_debug("rsdt\n");
printk(BIOS_DEBUG, "rsdt\n");
dump_mem(rsdt, ((void *)rsdt) + sizeof(acpi_rsdt_t));
printk_debug("madt\n");
printk(BIOS_DEBUG, "madt\n");
dump_mem(madt, ((void *)madt) + madt->header.length);
printk_debug("srat\n");
printk(BIOS_DEBUG, "srat\n");
dump_mem(srat, ((void *)srat) + srat->header.length);
printk_debug("slit\n");
printk(BIOS_DEBUG, "slit\n");
dump_mem(slit, ((void *)slit) + slit->header.length);
printk_debug("ssdt\n");
printk(BIOS_DEBUG, "ssdt\n");
dump_mem(ssdt, ((void *)ssdt) + ssdt->length);
printk_debug("fadt\n");
printk(BIOS_DEBUG, "fadt\n");
dump_mem(fadt, ((void *)fadt) + fadt->header.length);
#endif
printk_info("ACPI: done.\n");
printk(BIOS_INFO, "ACPI: done.\n");
return current;
}

2
src/mainboard/amd/dbm690t/fadt.c
View File

@@ -46,7 +46,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
acpi_header_t *header = &(fadt->header);
pm_base &= 0xFFFF;
printk_debug("pm_base: 0x%04x\n", pm_base);
printk(BIOS_DEBUG, "pm_base: 0x%04x\n", pm_base);
/* Prepare the header */
memset((void *)fadt, 0, sizeof(acpi_fadt_t));

4
src/mainboard/amd/dbm690t/irq_tables.c
View File

@@ -73,7 +73,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
printk_info("Writing IRQ routing tables to 0x%lx...", addr);
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (u8 *) (addr);
@@ -113,7 +113,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->checksum = sum;
}
printk_info("write_pirq_routing_table done.\n");
printk(BIOS_INFO, "write_pirq_routing_table done.\n");
return (unsigned long)pirq_info;
}

16
src/mainboard/amd/dbm690t/mainboard.c
View File

@@ -61,7 +61,7 @@ static void enable_onboard_nic()
{
u8 byte;
printk_info("%s.\n", __func__);
printk(BIOS_INFO, "%s.\n", __func__);
/* set index register 0C50h to 13h (miscellaneous control) */
outb(0x13, 0xC50); /* CMIndex */
@@ -100,7 +100,7 @@ static void get_ide_dma66()
struct device *sm_dev;
struct device *ide_dev;
printk_info("%s.\n", __func__);
printk(BIOS_INFO, "%s.\n", __func__);
sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
byte = pci_read_config8(sm_dev, 0xA9);
@@ -137,7 +137,7 @@ static void set_thermal_config()
byte = ADT7461_read_byte(0x02); /* read status register to clear it */
ARA_read_byte(0x05); /* A hardware alert can only be cleared by the master sending an ARA as a read command */
printk_info("Init adt7461 end , status 0x02 %02x\n", byte);
printk(BIOS_INFO, "Init adt7461 end , status 0x02 %02x\n", byte);
/* sb600 settings for thermal config */
/* set SB600 GPIO 64 to GPIO with pull-up */
@@ -190,19 +190,19 @@ void dbm690t_enable(device_t dev)
struct mainboard_config *mainboard =
(struct mainboard_config *)dev->chip_info;
printk_info("Mainboard DBM690T Enable. dev=0x%p\n", dev);
printk(BIOS_INFO, "Mainboard DBM690T Enable. dev=0x%p\n", dev);
#if (CONFIG_GFXUMA == 1)
msr_t msr, msr2;
/* TOP_MEM: the top of DRAM below 4G */
msr = rdmsr(TOP_MEM);
printk_info("%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
printk(BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
__func__, msr.lo, msr.hi);
/* TOP_MEM2: the top of DRAM above 4G */
msr2 = rdmsr(TOP_MEM2);
printk_info("%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
printk(BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
__func__, msr2.lo, msr2.hi);
switch (msr.lo) {
@@ -224,7 +224,7 @@ void dbm690t_enable(device_t dev)
}
uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
printk_info("%s: uma size 0x%08llx, memory start 0x%08llx\n",
printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n",
__func__, uma_memory_size, uma_memory_base);
/* TODO: TOP_MEM2 */
@@ -244,7 +244,7 @@ int add_mainboard_resources(struct lb_memory *mem)
* in some circumstances we want the memory mentioned as reserved.
*/
#if (CONFIG_GFXUMA == 1)
printk_info("uma_memory_base=0x%llx, uma_memory_size=0x%llx \n",
printk(BIOS_INFO, "uma_memory_base=0x%llx, uma_memory_size=0x%llx \n",
uma_memory_base, uma_memory_size);
lb_add_memory_range(mem, LB_MEM_RESERVED,
uma_memory_base, uma_memory_size);

2
src/mainboard/amd/dbm690t/mptable.c
View File

@@ -199,7 +199,7 @@ void *smp_write_config_table(void *v)
mc->mpe_checksum =
smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
printk_debug("Wrote the mp table end at: %p - %p\n",
printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
mc, smp_next_mpe_entry(mc));
return smp_next_mpe_entry(mc);
}

12
src/mainboard/amd/dbm690t/romstage.c
View File

@@ -134,7 +134,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
printk_debug("bsp_apicid=0x%x\n", bsp_apicid);
printk(BIOS_DEBUG, "bsp_apicid=0x%x\n", bsp_apicid);
setup_dbm690t_resource_map();
@@ -160,7 +160,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Read FIDVID_STATUS */
msr=rdmsr(0xc0010042);
printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
printk(BIOS_DEBUG, "begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
enable_fid_change();
enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
@@ -168,16 +168,16 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* show final fid and vid */
msr=rdmsr(0xc0010042);
printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
printk(BIOS_DEBUG, "end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
} else {
printk_debug("Changing FIDVID not supported\n");
printk(BIOS_DEBUG, "Changing FIDVID not supported\n");
}
needs_reset = optimize_link_coherent_ht();
needs_reset |= optimize_link_incoherent_ht(sysinfo);
rs690_htinit();
printk_debug("needs_reset=0x%x\n", needs_reset);
printk(BIOS_DEBUG, "needs_reset=0x%x\n", needs_reset);
if (needs_reset) {
@@ -188,7 +188,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
allow_all_aps_stop(bsp_apicid);
/* It's the time to set ctrl now; */
printk_debug("sysinfo->nodes: %2x sysinfo->ctrl: %2x spd_addr: %2x\n",
printk(BIOS_DEBUG, "sysinfo->nodes: %2x sysinfo->ctrl: %2x spd_addr: %2x\n",
sysinfo->nodes, sysinfo->ctrl, spd_addr);
fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);

42
src/mainboard/amd/mahogany/acpi_tables.c
View File

@@ -49,9 +49,9 @@ static void dump_mem(u32 start, u32 end)
print_debug("dump_mem:");
for (i = start; i < end; i++) {
if ((i & 0xf) == 0) {
printk_debug("\n%08x:", i);
printk(BIOS_DEBUG, "\n%08x:", i);
}
printk_debug(" %02x", (u8)*((u8 *)i));
printk(BIOS_DEBUG, " %02x", (u8)*((u8 *)i));
}
print_debug("\n");
}
@@ -147,7 +147,7 @@ unsigned long write_acpi_tables(unsigned long start)
start = (start + 0x0f) & -0x10;
current = start;
printk_info("ACPI: Writing ACPI tables at %lx...\n", start);
printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
/* We need at least an RSDP and an RSDT Table */
rsdp = (acpi_rsdp_t *) current;
@@ -165,13 +165,13 @@ unsigned long write_acpi_tables(unsigned long start)
* We explicitly add these tables later on:
*/
/* If we want to use HPET Timers Linux wants an MADT */
printk_debug("ACPI: * HPET\n");
printk(BIOS_DEBUG, "ACPI: * HPET\n");
hpet = (acpi_hpet_t *) current;
current += sizeof(acpi_hpet_t);
acpi_create_hpet(hpet);
acpi_add_table(rsdp, hpet);
printk_debug("ACPI: * MADT\n");
printk(BIOS_DEBUG, "ACPI: * MADT\n");
madt = (acpi_madt_t *) current;
acpi_create_madt(madt);
current += madt->header.length;
@@ -179,14 +179,14 @@ unsigned long write_acpi_tables(unsigned long start)
#if 0
/* SRAT */
printk_debug("ACPI: * SRAT\n");
printk(BIOS_DEBUG, "ACPI: * SRAT\n");
srat = (acpi_srat_t *) current;
acpi_create_srat(srat);
current += srat->header.length;
acpi_add_table(rsdp, srat);
/* SLIT */
printk_debug("ACPI: * SLIT\n");
printk(BIOS_DEBUG, "ACPI: * SLIT\n");
slit = (acpi_slit_t *) current;
acpi_create_slit(slit);
current += slit->header.length;
@@ -194,7 +194,7 @@ unsigned long write_acpi_tables(unsigned long start)
#endif
/* SSDT */
printk_debug("ACPI: * SSDT\n");
printk(BIOS_DEBUG, "ACPI: * SSDT\n");
ssdt = (acpi_header_t *)current;
acpi_create_ssdt_generator(ssdt, "DYNADATA");
@@ -214,7 +214,7 @@ unsigned long write_acpi_tables(unsigned long start)
} else {
c = (uint8_t) ('A' + i - 1 - 6);
}
printk_debug("ACPI: * SSDT for PCI%c Aka hcid = %d\n", c, sysconf.hcid[i]); /* pci0 and pci1 are in dsdt */
printk(BIOS_DEBUG, "ACPI: * SSDT for PCI%c Aka hcid = %d\n", c, sysconf.hcid[i]); /* pci0 and pci1 are in dsdt */
current = (current + 0x07) & -0x08;
ssdtx = (acpi_header_t *) current;
switch (sysconf.hcid[i]) {
@@ -243,20 +243,20 @@ unsigned long write_acpi_tables(unsigned long start)
#endif
/* FACS */
printk_debug("ACPI: * FACS\n");
printk(BIOS_DEBUG, "ACPI: * FACS\n");
facs = (acpi_facs_t *) current;
current += sizeof(acpi_facs_t);
acpi_create_facs(facs);
/* DSDT */
printk_debug("ACPI: * DSDT\n");
printk(BIOS_DEBUG, "ACPI: * DSDT\n");
dsdt = (acpi_header_t *) current;
memcpy((void *)dsdt, (void *)AmlCode,
((acpi_header_t *) AmlCode)->length);
current += dsdt->length;
printk_debug("ACPI: * DSDT @ %p Length %x\n", dsdt, dsdt->length);
printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x\n", dsdt, dsdt->length);
/* FADT */
printk_debug("ACPI: * FADT\n");
printk(BIOS_DEBUG, "ACPI: * FADT\n");
fadt = (acpi_fadt_t *) current;
current += sizeof(acpi_fadt_t);
@@ -264,28 +264,28 @@ unsigned long write_acpi_tables(unsigned long start)
acpi_add_table(rsdp, fadt);
#if DUMP_ACPI_TABLES == 1
printk_debug("rsdp\n");
printk(BIOS_DEBUG, "rsdp\n");
dump_mem(rsdp, ((void *)rsdp) + sizeof(acpi_rsdp_t));
printk_debug("rsdt\n");
printk(BIOS_DEBUG, "rsdt\n");
dump_mem(rsdt, ((void *)rsdt) + sizeof(acpi_rsdt_t));
printk_debug("madt\n");
printk(BIOS_DEBUG, "madt\n");
dump_mem(madt, ((void *)madt) + madt->header.length);
printk_debug("srat\n");
printk(BIOS_DEBUG, "srat\n");
dump_mem(srat, ((void *)srat) + srat->header.length);
printk_debug("slit\n");
printk(BIOS_DEBUG, "slit\n");
dump_mem(slit, ((void *)slit) + slit->header.length);
printk_debug("ssdt\n");
printk(BIOS_DEBUG, "ssdt\n");
dump_mem(ssdt, ((void *)ssdt) + ssdt->length);
printk_debug("fadt\n");
printk(BIOS_DEBUG, "fadt\n");
dump_mem(fadt, ((void *)fadt) + fadt->header.length);
#endif
printk_info("ACPI: done.\n");
printk(BIOS_INFO, "ACPI: done.\n");
return current;
}

2
src/mainboard/amd/mahogany/fadt.c
View File

@@ -46,7 +46,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
acpi_header_t *header = &(fadt->header);
pm_base &= 0xFFFF;
printk_debug("pm_base: 0x%04x\n", pm_base);
printk(BIOS_DEBUG, "pm_base: 0x%04x\n", pm_base);
/* Prepare the header */
memset((void *)fadt, 0, sizeof(acpi_fadt_t));

4
src/mainboard/amd/mahogany/irq_tables.c
View File

@@ -73,7 +73,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
printk_info("Writing IRQ routing tables to 0x%lx...", addr);
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (u8 *) (addr);
@@ -113,7 +113,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->checksum = sum;
}
printk_info("write_pirq_routing_table done.\n");
printk(BIOS_INFO, "write_pirq_routing_table done.\n");
return (unsigned long)pirq_info;
}

14
src/mainboard/amd/mahogany/mainboard.c
View File

@@ -101,21 +101,21 @@ void mahogany_enable(device_t dev)
struct mainboard_config *mainboard =
(struct mainboard_config *)dev->chip_info;
printk_info("Mainboard MAHOGANY Enable. dev=0x%p\n", dev);
printk(BIOS_INFO, "Mainboard MAHOGANY Enable. dev=0x%p\n", dev);
#if (CONFIG_GFXUMA == 1)
msr_t msr, msr2;
/* TOP_MEM: the top of DRAM below 4G */
msr = rdmsr(TOP_MEM);
printk_info
("%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
printk
(BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
__func__, msr.lo, msr.hi);
/* TOP_MEM2: the top of DRAM above 4G */
msr2 = rdmsr(TOP_MEM2);
printk_info
("%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
printk
(BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
__func__, msr2.lo, msr2.hi);
/* refer to UMA Size Consideration in 780 BDG. */
@@ -134,7 +134,7 @@ void mahogany_enable(device_t dev)
}
uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
printk_info("%s: uma size 0x%08llx, memory start 0x%08llx\n",
printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n",
__func__, uma_memory_size, uma_memory_base);
/* TODO: TOP_MEM2 */
@@ -153,7 +153,7 @@ int add_mainboard_resources(struct lb_memory *mem)
* in some circumstances we want the memory mentioned as reserved.
*/
#if (CONFIG_GFXUMA == 1)
printk_info("uma_memory_start=0x%x, uma_memory_size=0x%x \n",
printk(BIOS_INFO, "uma_memory_start=0x%x, uma_memory_size=0x%x \n",
uma_memory_base, uma_memory_size);
lb_add_memory_range(mem, LB_MEM_RESERVED,
uma_memory_base, uma_memory_size);

2
src/mainboard/amd/mahogany/mptable.c
View File

@@ -206,7 +206,7 @@ void *smp_write_config_table(void *v)
mc->mpe_checksum =
smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
printk_debug("Wrote the mp table end at: %p - %p\n",
printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
mc, smp_next_mpe_entry(mc));
return smp_next_mpe_entry(mc);
}

12
src/mainboard/amd/mahogany/romstage.c
View File

@@ -133,7 +133,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
printk_debug("bsp_apicid=0x%x\n", bsp_apicid);
printk(BIOS_DEBUG, "bsp_apicid=0x%x\n", bsp_apicid);
setup_mahogany_resource_map();
@@ -159,7 +159,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Read FIDVID_STATUS */
msr=rdmsr(0xc0010042);
printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
printk(BIOS_DEBUG, "begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
enable_fid_change();
enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
@@ -167,16 +167,16 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* show final fid and vid */
msr=rdmsr(0xc0010042);
printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
printk(BIOS_DEBUG, "end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
} else {
printk_debug("Changing FIDVID not supported\n");
printk(BIOS_DEBUG, "Changing FIDVID not supported\n");
}
needs_reset = optimize_link_coherent_ht();
needs_reset |= optimize_link_incoherent_ht(sysinfo);
rs780_htinit();
printk_debug("needs_reset=0x%x\n", needs_reset);
printk(BIOS_DEBUG, "needs_reset=0x%x\n", needs_reset);
if (needs_reset) {
print_info("ht reset -\r\n");
@@ -186,7 +186,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
allow_all_aps_stop(bsp_apicid);
/* It's the time to set ctrl now; */
printk_debug("sysinfo->nodes: %2x sysinfo->ctrl: %2x spd_addr: %2x\n",
printk(BIOS_DEBUG, "sysinfo->nodes: %2x sysinfo->ctrl: %2x spd_addr: %2x\n",
sysinfo->nodes, sysinfo->ctrl, spd_addr);
fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);

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