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tegra124: Add tegra_dc_i2c_aux_read to allow reading EDID.

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To read EDID, we need to access I2C via DP AUX channel.

BRANCH=none
BUG=chrome-os-partner:25933
TEST=emerge-nyan coreboot chromeos-bootimage

Original-Change-Id: I2666b5d46843485b79265a537f19bd8eab5e1a26
Original-Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/188858
Original-Reviewed-by: Gabe Black <gabeblack@chromium.org>
Original-Commit-Queue: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 8f8e98ff5038b57f89332aee75573095c3933dd2)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I5b1b6ab2940c8265483059fd94a2c4db2a41144a
Reviewed-on: http://review.coreboot.org/7735
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Hung-Te Lin
2014-03-05 21:09:58 +08:00
committed by Marc Jones
parent 042f849ef9
commit c04d3dd7b3
1 changed files with 41 additions and 0 deletions
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41
src/soc/nvidia/tegra124/dp.c
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@ -2,6 +2,7 @@
* drivers/video/tegra/dc/dp.c * drivers/video/tegra/dc/dp.c
* *
* Copyright (c) 2011-2013, NVIDIA Corporation. * Copyright (c) 2011-2013, NVIDIA Corporation.
* Copyright 2014 Google Inc.
* *
* This software is licensed under the terms of the GNU General Public * This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and * License version 2, as published by the Free Software Foundation, and
@ -322,6 +323,46 @@ static int tegra_dc_dp_dpcd_write(struct tegra_dc_dp_data *dp, u32 cmd,
return ret; return ret;
} }
/* TODO(hungte) Change this to static when EDID parsing functions are ready. */
int tegra_dc_i2c_aux_read(struct tegra_dc_dp_data *dp, u32 i2c_addr,
u8 addr, u8 *data, u32 *size, u32 *aux_stat);
int tegra_dc_i2c_aux_read(struct tegra_dc_dp_data *dp, u32 i2c_addr,
u8 addr, u8 *data, u32 *size, u32 *aux_stat)
{
u32 finished = 0;
int ret = 0;
do {
u32 cur_size = MIN(DP_AUX_MAX_BYTES, *size - finished);
u32 len = 1;
ret = tegra_dc_dpaux_write_chunk(
dp, DPAUX_DP_AUXCTL_CMD_I2CWR, i2c_addr,
&addr, &len, aux_stat);
if (ret) {
printk(BIOS_ERR, "%s: error sending address to read.\n",
__func__);
break;
}
ret = tegra_dc_dpaux_read_chunk(
dp, DPAUX_DP_AUXCTL_CMD_I2CRD, i2c_addr,
data, &cur_size, aux_stat);
if (ret) {
printk(BIOS_ERR, "%s: error reading data.\n", __func__);
break;
}
/* cur_size should be the real size returned */
addr += cur_size;
data += cur_size;
finished += cur_size;
} while (*size > finished);
*size = finished;
return ret;
}
static void tegra_dc_dpaux_enable(struct tegra_dc_dp_data *dp) static void tegra_dc_dpaux_enable(struct tegra_dc_dp_data *dp)
{ {
/* clear interrupt */ /* clear interrupt */