diff --git a/src/Kconfig b/src/Kconfig index 4e5578bb1f..dc98ca2c05 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -720,12 +720,6 @@ config ACPI_NHLT help Build support for NHLT (non HD Audio) ACPI table generation. -config ACPI_LPIT - bool - default y - help - Build an ACPI Low Power Idle Table. - #These Options are here to avoid "undefined" warnings. #The actual selection and help texts are in the following menu. diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c index 795a2f84df..abc6e01b0a 100644 --- a/src/acpi/acpi.c +++ b/src/acpi/acpi.c @@ -1264,78 +1264,6 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) acpi_checksum((void *) fadt, header->length); } -/* - * The value of residency couneter register address is MSR value and - * implementation specific.e.e.g, scenerios: - * 1. For CNL: space_id:0,residency_counter.addrl:0x632 and ACPI_LPIT - * selected in soc Kconfig sysfs file thet kernel creates is - * /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us. - * 2. For CNL: space_id:0, residency_counter.addrl:0xfe000000 + 0x193C - * and ACPI_LPIT elected in soc Kconfig sysfs file thet kernel creates is - * /sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us - * which gets populated with integer values whenever system goes in s0ix. - */ -__weak void soc_residency_counter(struct acpi_lpit_native *lpit_soc) -{ - lpit_soc->header.unique_id = 0; - - lpit_soc->residency = 0x7530; - lpit_soc->latency = 0xBB8; - - lpit_soc->entry_trigger.space_id = 0x7f; - lpit_soc->entry_trigger.bit_width = 0x01; - lpit_soc->entry_trigger.bit_offset = 0x02; - lpit_soc->entry_trigger.addrl = 0x60; - - lpit_soc->residency_counter.space_id = 0x7f; - lpit_soc->residency_counter.bit_width = 0x40; - lpit_soc->residency_counter.addrl = 0x632; -} - -__weak void system_residency_counter(struct acpi_lpit_native *lpit_system) -{ - lpit_system->header.unique_id = 1; - - lpit_system->counter_frequency = 0x256c; - lpit_system->residency = 0x7530; - lpit_system->latency = 0xBB8; - - lpit_system->entry_trigger.space_id = 0x7f; - lpit_system->entry_trigger.bit_width = 0x01; - lpit_system->entry_trigger.bit_offset = 0x02; - lpit_system->entry_trigger.addrl = 0x60; - - lpit_system->residency_counter.space_id = 0x00; - lpit_system->residency_counter.bit_width = 0x20; - lpit_system->residency_counter.access_size = 0x03; - lpit_system->residency_counter.addrl = 0xfe00193c; -} - -static void acpi_create_lpit_generator(acpi_table_lpit *lpit) -{ - acpi_header_t *header = &(lpit->header); - - memset((void *)lpit, 0, sizeof(acpi_table_lpit)); - - memcpy(header->signature, "LPIT", 4); - header->revision = 2; /* ACPI 1.0/2.0: ?, ACPI 3.0/4.0: 2 */ - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - header->oem_revision = 42; - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = 0; - header->length = sizeof(acpi_table_lpit); - lpit->lpit_soc.header.length = sizeof(struct acpi_lpit_native); - lpit->lpit_system.header.length = sizeof(struct acpi_lpit_native); - - soc_residency_counter(&lpit->lpit_soc); - system_residency_counter(&lpit->lpit_system); - - - /* (Re)calculate length and checksum. */ - header->checksum = acpi_checksum((void *)lpit, header->length); -} - unsigned long __weak fw_cfg_acpi_tables(unsigned long start) { return 0; @@ -1356,7 +1284,6 @@ unsigned long write_acpi_tables(unsigned long start) acpi_tcpa_t *tcpa; acpi_tpm2_t *tpm2; acpi_madt_t *madt; - acpi_table_lpit *lpit; struct device *dev; unsigned long fw; size_t slic_size, dsdt_size; @@ -1562,18 +1489,6 @@ unsigned long write_acpi_tables(unsigned long start) current += madt->header.length; acpi_add_table(rsdp, madt); } - - if (CONFIG(ACPI_LPIT)) { - printk(BIOS_DEBUG, "ACPI: * LPIT\n"); - - lpit = (acpi_table_lpit *)current; - acpi_create_lpit_generator(lpit); - if (lpit->header.length >= sizeof(acpi_table_lpit)) { - current += lpit->header.length; - acpi_add_table(rsdp, lpit); - } - } - current = acpi_align_current(current); printk(BIOS_DEBUG, "current = %lx\n", current); diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c index 1894e7d6ce..8d4bb9849d 100644 --- a/src/device/pciexp_device.c +++ b/src/device/pciexp_device.c @@ -368,20 +368,8 @@ static void pciexp_enable_aspm(struct device *root, unsigned int root_cap, if (endp->disable_pcie_aspm) return; - const uint16_t xcap = pci_read_config16(endp, endp_cap + PCI_EXP_FLAGS); - const uint8_t type = (xcap & PCI_EXP_FLAGS_TYPE) >> 4; - - /* - * PCI_EXP_DEVCAP_L0S and PCI_EXP_DEVCAP_L1 are only valid for PCIe endpoints. - * Refer to "PCI Express Base Specification Revision 2.0" Chapter 7.8.3 - */ - if (type != PCI_EXP_TYPE_ENDPOINT && type != PCI_EXP_TYPE_LEG_END) { - /* Set no limit in acceptable latency */ - devcap = (0x7 << 6) | (0x7 << 9); - } else { - /* Get endpoint device capabilities for acceptable limits */ - devcap = pci_read_config32(endp, endp_cap + PCI_EXP_DEVCAP); - } + /* Get endpoint device capabilities for acceptable limits */ + devcap = pci_read_config32(endp, endp_cap + PCI_EXP_DEVCAP); /* Enable L0s if it is within endpoint acceptable limit */ ok_latency = (devcap & PCI_EXP_DEVCAP_L0S) >> 6; @@ -458,7 +446,7 @@ static void pciexp_tune_dev(struct device *dev) unsigned int root_cap, cap; cap = pci_find_capability(dev, PCI_CAP_ID_PCIE); - if (!cap && (dev->path.type != DEVICE_PATH_GENERIC)) + if (!cap) return; root_cap = pci_find_capability(root, PCI_CAP_ID_PCIE); @@ -492,8 +480,7 @@ void pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, pci_scan_bus(bus, min_devfn, max_devfn); for (child = bus->children; child; child = child->sibling) { - if ((child->path.type != DEVICE_PATH_PCI) && - (child->path.type != DEVICE_PATH_GENERIC)) + if (child->path.type != DEVICE_PATH_PCI) continue; if ((child->path.pci.devfn < min_devfn) || (child->path.pci.devfn > max_devfn)) { diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h index 2bb8683a7f..f6eb772ac7 100644 --- a/src/include/acpi/acpi.h +++ b/src/include/acpi/acpi.h @@ -257,63 +257,6 @@ typedef struct acpi_madt { u32 flags; /* Multiple APIC flags */ } __packed acpi_madt_t; -/******************************************************************************* - * - * LPIT - Low Power Idle Table - * - * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. - * - ******************************************************************************/ - -typedef struct acpi_lpi_state_flags { - u32 disabled:1; - u32 counterunavailable:1; - u32 reserved:30; -} __packed acpi_lpi_state_flags; - -/* LPIT subtable header */ - -typedef struct acpi_lpit_header { - u32 type; /* Subtable type */ - u32 length; /* Subtable length */ - u16 unique_id; - u16 reserved; - acpi_lpi_state_flags flags; -} __packed acpi_lpit_header; - -/* Values for subtable Type above */ - -enum acpi_lpit_type { - ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, - ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ -}; - -/* Masks for Flags field above */ - -#define ACPI_LPIT_STATE_DISABLED (1) -#define ACPI_LPIT_NO_COUNTER (1<<1) - -/* - * LPIT subtables, correspond to Type in struct acpi_lpit_header - */ - -/* 0x00: Native C-state instruction based LPI structure */ - -struct acpi_lpit_native { - struct acpi_lpit_header header; - struct acpi_gen_regaddr entry_trigger; - u32 residency; - u32 latency; - struct acpi_gen_regaddr residency_counter; - u64 counter_frequency; -}; - -typedef struct acpi_table_lpit { - struct acpi_table_header header; /* Common ACPI table header */ - struct acpi_lpit_native lpit_soc; - struct acpi_lpit_native lpit_system; -} __packed acpi_table_lpit; - /* VFCT image header */ typedef struct acpi_vfct_image_hdr { u32 PCIBus; @@ -954,9 +897,6 @@ struct acpi_spmi { unsigned long fw_cfg_acpi_tables(unsigned long start); -void soc_residency_counter(struct acpi_lpit_native *lpit_soc); -void system_residency_counter(struct acpi_lpit_native *lpit_system); - /* These are implemented by the target port or north/southbridge. */ unsigned long write_acpi_tables(unsigned long addr); unsigned long acpi_fill_madt(unsigned long current); diff --git a/src/soc/intel/common/block/pcie/rtd3/rtd3.c b/src/soc/intel/common/block/pcie/rtd3/rtd3.c index c8b63bc751..be412e7967 100644 --- a/src/soc/intel/common/block/pcie/rtd3/rtd3.c +++ b/src/soc/intel/common/block/pcie/rtd3/rtd3.c @@ -80,8 +80,6 @@ pcie_rtd3_acpi_method_on(unsigned int pcie_rp, { acpigen_write_method_serialized("_ON", 0); - acpigen_write_debug_string("PCIe RTD3 _ON"); - /* Assert enable GPIO to turn on device power. */ if (config->enable_gpio.pin_count) { acpigen_enable_tx_gpio(&config->enable_gpio); @@ -113,8 +111,6 @@ pcie_rtd3_acpi_method_off(int pcie_rp, { acpigen_write_method_serialized("_OFF", 0); - acpigen_write_debug_string("PCIe RTD3 _OFF"); - /* Trigger L23 ready entry flow unless disabled by config. */ if (!config->disable_l23) pcie_rtd3_acpi_l23_entry(); @@ -173,7 +169,7 @@ pcie_rtd3_acpi_method_status(int pcie_rp, static void pcie_rtd3_acpi_fill_ssdt(const struct device *dev) { const struct soc_intel_common_block_pcie_rtd3_config *config = config_of(dev); - static const char *const power_res_states[] = {"_PR0", "_PR3"}; + static const char *const power_res_states[] = {"_PR0"}; const struct device *parent = dev->bus->dev; const char *scope = acpi_device_path(parent); const struct opregion opregion = OPREGION("PXCS", PCI_CONFIG, 0, 0xff); @@ -220,8 +216,8 @@ static void pcie_rtd3_acpi_fill_ssdt(const struct device *dev) /* Port number is 1-based, PMC IPC method expects 0-based. */ pcie_rp--; - printk(BIOS_INFO, "%s: Enable RTD3 for %s (%s) on RP #%d\n", scope, dev_path(parent), - config->desc ?: dev->chip_ops->name, pcie_rp + 1); + printk(BIOS_INFO, "%s: Enable RTD3 for %s (%s)\n", scope, dev_path(parent), + config->desc ?: dev->chip_ops->name); /* The RTD3 power resource is added to the root port, not the device. */ acpigen_write_scope(scope); diff --git a/src/soc/intel/tigerlake/acpi/tcss_dma.asl b/src/soc/intel/tigerlake/acpi/tcss_dma.asl index d00f79432d..085990dbfd 100644 --- a/src/soc/intel/tigerlake/acpi/tcss_dma.asl +++ b/src/soc/intel/tigerlake/acpi/tcss_dma.asl @@ -32,20 +32,12 @@ Method (_S0W, 0x0) Method (_PR0) { - If (DUID == 0) { - Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) - } Else { - Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT1 }) - } + Return (Package() { \_SB.PCI0.D3C }) } Method (_PR3) { - If (DUID == 0) { - Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) - } Else { - Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT1 }) - } + Return (Package() { \_SB.PCI0.D3C }) } /* @@ -72,6 +64,24 @@ Method (D3CE, 0, Serialized) */ Name (SD3C, 0) +Method (_PS0, 0, Serialized) +{ + If (DUID == 0) { + \_SB.PCI0.TBT0._ON() + } Else { + \_SB.PCI0.TBT1._ON() + } +} + +Method (_PS3, 0, Serialized) +{ + If (DUID == 0) { + \_SB.PCI0.TBT0._OFF() + } Else { + \_SB.PCI0.TBT1._OFF() + } +} + Method (_DSW, 3) { /* If entering Sx (Arg1 > 1), need to skip TCSS D3Cold & TBT RTD3/D3Cold. */ diff --git a/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl b/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl index 9e1b324bfe..08d890087c 100644 --- a/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl +++ b/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl @@ -227,20 +227,12 @@ Method (_S0W, 0x0, NotSerialized) Method (_PR0) { - If ((TUID == 0) || (TUID == 1)) { - Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) - } Else { - Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT1 }) - } + Return (Package() { \_SB.PCI0.D3C }) } Method (_PR3) { - If ((TUID == 0) || (TUID == 1)) { - Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) - } Else { - Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT1 }) - } + Return (Package() { \_SB.PCI0.D3C }) } /*