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arch/arm: Correct checkpatch errors

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Correct whitespace issues in arch/arm and arch/arm64.
Enclose complex values in parenthesis.

Change-Id: I74b68f485adff1e6f0fa433e51e12b59ccea654b
Signed-off-by: Logan Carlson <logancarlson@google.com>
Reviewed-on: https://review.coreboot.org/19989
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
This commit is contained in:
Logan Carlson
2017-05-30 15:31:10 -06:00
committed by Martin Roth
parent f848ed091e
commit c058d1c0f8
7 changed files with 25 additions and 25 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/arch/arm/div0.c
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@@ -19,7 +19,7 @@ void __div0(void); // called from asm so no need for a prototype in a header
/* Replacement (=dummy) for GNU/Linux division-by zero handler */
/* recursion is ok here because we have no formats ... */
void __div0 (void)
void __div0(void)
{
printk(BIOS_EMERG, "DIVIDE BY ZERO! continuing ...\n");
}

4
src/arch/arm/eabi_compat.c
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@@ -20,8 +20,8 @@
#include <console/console.h>
/* FIXME(dhendrix): prototypes added for assembler */
int raise (int signum) __attribute__((used));
int raise (int signum)
int raise(int signum) __attribute__((used));
int raise(int signum)
{
printk(BIOS_CRIT, "raise: Signal # %d caught\n", signum);
return 0;

10
src/arch/arm/include/armv4/arch/smp/spinlock.h
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@@ -15,12 +15,12 @@
#define _ARCH_SMP_SPINLOCK_H
#define DECLARE_SPIN_LOCK(x)
#define barrier() do {} while(0)
#define barrier() do {} while (0)
#define spin_is_locked(lock) 0
#define spin_unlock_wait(lock) do {} while(0)
#define spin_lock(lock) do {} while(0)
#define spin_unlock(lock) do {} while(0)
#define cpu_relax() do {} while(0)
#define spin_unlock_wait(lock) do {} while (0)
#define spin_lock(lock) do {} while (0)
#define spin_unlock(lock) do {} while (0)
#define cpu_relax() do {} while (0)
#include <smp/node.h>
#define boot_cpu() 1

6
src/arch/arm/include/armv7.h
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@@ -54,8 +54,8 @@
* However, we use the CP15 based instructions because we use
* -march=armv5 in U-Boot
*/
#define CP15ISB asm volatile ("mcr p15, 0, %0, c7, c5, 4" : : "r" (0))
#define CP15DSB asm volatile ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0))
#define CP15DMB asm volatile ("mcr p15, 0, %0, c7, c10, 5" : : "r" (0))
#define CP15ISB (asm volatile ("mcr p15, 0, %0, c7, c5, 4" : : "r" (0)))
#define CP15DSB (asm volatile ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)))
#define CP15DMB (asm volatile ("mcr p15, 0, %0, c7, c10, 5" : : "r" (0)))
#endif /* ARMV7_H */

4
src/arch/arm/include/smp/spinlock.h
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@@ -29,9 +29,9 @@ typedef struct {
#define SPIN_LOCK_UNLOCKED (spinlock_t) { 1 }
#define DECLARE_SPIN_LOCK(x) static spinlock_t x = SPIN_LOCK_UNLOCKED;
#define barrier() __asm__ __volatile__("": : :"memory")
#define barrier() (__asm__ __volatile__("" : : : "memory"))
#define spin_is_locked(x) (*(volatile char *)(&(x)->lock) != 0)
#define spin_unlock_wait(x) do { barrier(); } while(spin_is_locked(x))
#define spin_unlock_wait(x) do { barrier(); } while (spin_is_locked(x))
static inline __attribute__((always_inline)) void spin_lock(spinlock_t *lock)
{